EPM9560WC208-20 vs EPM9560WI208-20 比較
詳細な並列比較: EPM9560WC208-20 メーカー: Altera および EPM9560WI208-20 メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
Altera
EPM9560WC208-20 - 560-Macrocell CPLD, 23.6ns, PQFP-208 | Intel/Altera
EPM9560WC208-20 Obsolete
仕様比較
| パラメータ | EPM9560WC208-20 | EPM9560WI208-20 |
|---|---|---|
| ブランド | Altera | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | NRND |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $25.80 | $105.00 |
| Family | MAX 9000 | — |
| Device Type | CPLD (EPLD) | EE PLD / Complex Programmable Logic Device (CPLD) |
| Macrocells | 560 | — |
| Logic Array Blocks (LABs) | 35 | 16 |
| User I/O Pins | 149 | — |
| Maximum Propagation Delay (tPD) | 23.6 ns | — |
| パッケージ | PQFP-208 (RQFP/WQFP) | — |
| Process Technology | CMOS, EEPROM-based | 0.35 micron CMOS EEPROM |
| Supply Voltage (VCCINT) | 5 V (typical, see datasheet) | — |
| I/O Voltage (VCCIO) | 3.3 V or 5 V (multi-voltage I/O) | — |
| In-System Programmability | Yes, JTAG BST (IEEE 1149.1) | — |
| Pin/Package Suffix | W = power PQFP; -20 = 23.6 ns speed grade | — |
| 動作温度 | Commercial (0C to +70C) [DATA_NEEDED: exact temp grade] | — |
| 実装タイプ | Surface Mount | Surface Mount |
| RoHS ステータス | Non-compliant (legacy PQFP) [DATA_NEEDED: confirm from official doc] | — |
| Lead-Free | [DATA_NEEDED] | — |
| ハロゲンフリー | [DATA_NEEDED] | — |
| MSLレベル | [DATA_NEEDED] | — |
| Device Family | — | MAX 9000 |
| Macrocells / Logic Cells | — | 560 |
| Maximum User I/O Pins | — | 212 |
| Pin-to-Pin Propagation Delay (tPD) | — | 23.6 ns |
| Speed Grade | — | -20 |
| Programmability | — | In-system via JTAG (IEEE 1149.1) |
| Package Type | — | CQFP-208 (Ceramic Quad Flat Pack) |
| Terminal Form | — | Gull Wing |
| Number of Terminals | — | 208 |
| Package Code | — | QFP |
| Package Shape | — | Square |
| Operating Temperature Grade | — | Industrial |
| Design Tools | — | MAX+PLUS II, Quartus |
| Compliance | — | [DATA_NEEDED: RoHS status] |