IAUC120N04S6N009ATMA1 vs IAUCN04S7L042GATMA1 比較
詳細な並列比較: IAUC120N04S6N009ATMA1 メーカー: Infineon および IAUCN04S7L042GATMA1 メーカー: Infineon。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
Infineon
IAUC120N04S6N009ATMA1 - 40V 120A 0.9mΩ OptiMOS 6 MOSFET | Infineon
IAUC120N04S6N009ATMA1 ✓ 生産中Infineon
IAUCN04S7L042GATMA1 - 40V 77A OptiMOS 7 N-MOSFET, PG-THSOG-4 | Infineon
IAUCN04S7L042GATMA1 ✓ 生産中仕様比較
| パラメータ | IAUC120N04S6N009ATMA1 | IAUCN04S7L042GATMA1 |
|---|---|---|
| ブランド | Infineon | Infineon |
| カテゴリ | MOSFETs | MOSFETs |
| ライフサイクル状態 | 有効 | 有効 |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $1.60 | $0.86 |
| Manufacturer | Infineon Technologies | Infineon Technologies |
| Part Family | OptiMOS 6 40V | — |
| Polarity / Channel Type | N-Channel | N-Channel enhancement mode |
| Drain-Source Voltage (V_DSS) | 40 V | — |
| Continuous Drain Current (I_D, Tc) | 120 A | — |
| パルスドレイン電流 | [DATA_NEEDED: pulsed I_D value] | — |
| R_DS(on) max @ V_GS=10V | 0.9 mΩ | — |
| Gate Threshold Voltage V_GS(th) typ | [DATA_NEEDED: V_GS(th) typical value] | — |
| Total Gate Charge Q_g typ | [DATA_NEEDED: Q_g typical] | — |
| Power Dissipation (Tc) | 150 W | — |
| Thermal Resistance R_thJC max | 1.0 K/W | — |
| 動作接合温度 | -55 °C to +175 °C | — |
| パッケージ | PG-TDSON-8-33 (5x6 mm) | PG-THSOG-4 (SSO4G 5x6) leaded surface mount |
| 実装タイプ | Surface Mount | Surface Mount (IMS substrate / FR4 with thermal vias) |
| Automotive Qualification | AEC-Q101 | — |
| MSLレベル | 1 | 1 |
| RoHS | Compliant | — |
| Lead-Free / Halogen-Free | Yes (per Infineon product page) | — |
| Product Family | — | OptiMOS 7 40V |
| Technology | — | Trench N-Channel MOSFET |
| Drain-Source Voltage (VDS) | — | 40 V |
| Continuous Drain Current (ID, Tj) | — | 77 A |
| Maximum Power Dissipation (PD, Tc) | — | 50 W |
| 動作温度範囲 | — | -55C to +175C (Tj) |
| Automotive Qualified | — | Yes (Automotive grade, AEC-Q101 expected for Infineon OptiMOS 7 automotive parts) |
| RoHS ステータス | — | Compliant |
| Packing | — | Tape & Reel (per -ATMA1 suffix) |
| Target Substrate | — | IMS substrate and legacy FR4 designs |
| On-State Resistance RDS(on) | — | [DATA_NEEDED: RDS(on) max @ VGS=10V] |
| Gate Threshold Voltage VGS(th) | — | [DATA_NEEDED: VGS(th) typical/min/max] |
| Total Gate Charge Qg | — | [DATA_NEEDED: Qg @ VGS=10V] |