MPC561CZP40 vs MPC561MVR56 比較
詳細な並列比較: MPC561CZP40 メーカー: NXP Semiconductors および MPC561MVR56 メーカー: NXP Semiconductors。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | MPC561CZP40 | MPC561MVR56 |
|---|---|---|
| ブランド | NXP Semiconductors | NXP Semiconductors |
| カテゴリ | Microcontrollers | Microcontrollers |
| ライフサイクル状態 | ラストバイ | NRND |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $51.75 | $45.20 |
| Core Architecture | PowerPC (MPC5xx / Qorivva family) | PowerPC MPC5xx (Qorivva) |
| Core Count | Single-core | — |
| データバス幅 | 32-bit | 32-bit |
| 最大クロック周波数 | 40 MHz | 56 MHz |
| Program Memory Type | ROMless (no internal Flash) | ROMless (external memory required) |
| Package Type | 388-PBGA (Plastic Ball Grid Array) | — |
| Package Dimensions | 27 x 27 mm | — |
| 動作温度範囲 | -40C to +85C | -40C to +125C (Automotive Grade) |
| Automotive Grade | AEC-Q100 Grade compliant (Automotive) | — |
| Supply Voltage Range | [DATA_NEEDED: Vcore/Vio supply range] | — |
| On-chip SRAM Size | [DATA_NEEDED: SRAM bytes] | — |
| External Bus Interface | Yes (32-bit bus, chip-selects via SIU) | — |
| ADC Channels | QADC (Queued ADC) - multi-channel | — |
| Timer Processing Unit | TPU - integrated motion-control timer | — |
| Peripheral Pin Multiplexing | Yes (SIU-controlled routing) | — |
| 実装タイプ | Surface Mount (BGA) | Surface Mount (BGA) |
| Lead-free / RoHS | Lead-free finish; RoHS compliance varies by date code | — |
| MSLレベル | MSL3 (typical for large PBGA) | — |
| Core Width | — | 32-bit |
| A/D Channels | — | 32 |
| パッケージ | — | 388-PBGA (27x27 mm) |
| Package Height | — | 1.95 mm |
| Processor Series | — | MPC500 / Qorivva |
| Terminal Form | — | Ball |
| Number of Terminals | — | 388 |
| Package Code / Shape | — | BGA / Square |
| Manufacturer | — | NXP Semiconductors (formerly Freescale) |