MPC561CZP40 vs MPC561MVR56 比較
詳細並排比較 MPC561CZP40 由 NXP Semiconductors 與 MPC561MVR56 由 NXP Semiconductors. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | MPC561CZP40 | MPC561MVR56 |
|---|---|---|
| 品牌 | NXP Semiconductors | NXP Semiconductors |
| 類別 | Microcontrollers | Microcontrollers |
| 生命週期狀態 | 最後購買 | NRND |
| Core Architecture | PowerPC (MPC5xx / Qorivva family) | PowerPC MPC5xx (Qorivva) |
| Core Count | Single-core | — |
| 資料匯流排寬度 | 32-bit | 32-bit |
| 最大時脈頻率 | 40 MHz | 56 MHz |
| Program Memory Type | ROMless (no internal Flash) | ROMless (external memory required) |
| Package Type | 388-PBGA (Plastic Ball Grid Array) | — |
| Package Dimensions | 27 x 27 mm | — |
| 工作溫度範圍 | -40C to +85C | -40C to +125C (Automotive Grade) |
| Automotive Grade | AEC-Q100 Grade compliant (Automotive) | — |
| Supply Voltage Range | [DATA_NEEDED: Vcore/Vio supply range] | — |
| On-chip SRAM Size | [DATA_NEEDED: SRAM bytes] | — |
| External Bus Interface | Yes (32-bit bus, chip-selects via SIU) | — |
| ADC Channels | QADC (Queued ADC) - multi-channel | — |
| Timer Processing Unit | TPU - integrated motion-control timer | — |
| Peripheral Pin Multiplexing | Yes (SIU-controlled routing) | — |
| 安裝類型 | Surface Mount (BGA) | Surface Mount (BGA) |
| Lead-free / RoHS | Lead-free finish; RoHS compliance varies by date code | — |
| MSL 等級 | MSL3 (typical for large PBGA) | — |
| Core Width | — | 32-bit |
| A/D Channels | — | 32 |
| 封裝 | — | 388-PBGA (27x27 mm) |
| Package Height | — | 1.95 mm |
| Processor Series | — | MPC500 / Qorivva |
| Terminal Form | — | Ball |
| Number of Terminals | — | 388 |
| Package Code / Shape | — | BGA / Square |
| Manufacturer | — | NXP Semiconductors (formerly Freescale) |