MX674ALCWI+T vs MX574ALEWI+TCDR 比較
詳細な並列比較: MX674ALCWI+T メーカー: Maxim Integrated および MX574ALEWI+TCDR メーカー: Analog Devices。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
Maxim Integrated
MX674ALCWI+T - 12-Bit SAR ADC with Ref, 28-SOIC | Maxim Integrated
MX674ALCWI+T ✓ 生産中Analog Devices
MX574ALEWI+TCDR - 12-Bit 25µs SAR ADC, 28-SOIC | Maxim Integrated
MX574ALEWI+TCDR ✓ 生産中仕様比較
| パラメータ | MX674ALCWI+T | MX574ALEWI+TCDR |
|---|---|---|
| ブランド | Maxim Integrated | Analog Devices |
| カテゴリ | ADC/DAC | ADC/DAC |
| ライフサイクル状態 | 有効 | 有効 |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $21.60 | $17.10 |
| 分解能 | 12 bits | 12 bit |
| Conversion Method | Successive Approximation (SAR) | — |
| Number of Input Channels | 1 | — |
| サンプリングレート | 66 ksps (approx, typical) | — |
| Conversion Time | 15 us (max) | — |
| Architecture | Complete ADC with internal reference and clock | — |
| Input Voltage Ranges | 0-10 V, +/-5 V, +/-10 V, 0-5 V | — |
| Supply Voltage - Analog | +5 V and +/-15 V (single +5 V option) | — |
| Supply Voltage - Digital | +5 V | — |
| Reference | Internal 10V buried-Zener (external override supported) | — |
| Output Interface | 12-bit parallel, 3-state, 8/16-bit uP compatible | — |
| Integral Nonlinearity (INL) | [DATA_NEEDED: INL max LSB] | — |
| Differential Nonlinearity (DNL) | [DATA_NEEDED: DNL max LSB] | — |
| 動作温度範囲 | 0C to +70C (Commercial / 'C' grade) | — |
| パッケージ | 28-SOIC (Wide, 0.3 inch pitch) | 28-pin SOIC wide-body (SOIC-28W) |
| Terminal Form | GULL WING | — |
| Package Code | SOP, RECTANGULAR | — |
| 実装タイプ | Surface Mount | Surface Mount |
| RoHS ステータス | [DATA_NEEDED: RoHS status] | Compliant |
| Manufacturer | — | Analog Devices Inc. (formerly Maxim Integrated) |
| MPN | — | MX574ALEWI+TCDR |
| Converter Type | — | SAR (Successive Approximation Register) ADC |
| Number of Inputs | — | 1 |
| Input Type | — | Single-Ended (unipolar or bipolar ranges via pin strapping) |
| Maximum Conversion Time | — | 25 µs |
| Sample Rate (max) | — | 40 kSPS (typ) |
| Analog Input Ranges | — | 0 to +5 V, 0 to +10 V, ±5 V, ±10 V (software/strap-selectable) |
| Internal Reference | — | +10 V buried Zener, ±0.25 % initial accuracy (typ) |
| Data Interface | — | 12-bit parallel, 8-bit parallel, or serial |
| 出力タイプ | — | Three-state (high-Z) CMOS-compatible |
| Integral Nonlinearity (A grade) | — | ±1 LSB (max) |
| Supply Voltages | — | V+ = +12 V or +15 V, V- = -12 V or -15 V, VCC (digital) = +5 V |
| Power Consumption | — | 150 mW (typ, ±15 V supply) |
| 動作温度 | — | 0 °C to +70 °C (commercial, 'L' grade) |
| AEC-Q100 | — | Not qualified (commercial grade) |