MX674ALCWI+T vs MX574ALEWI+TCDR 비교
다음의 상세 나란히 비교: MX674ALCWI+T 제조: Maxim Integrated 및 MX574ALEWI+TCDR 제조: Analog Devices. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.
Maxim Integrated
MX674ALCWI+T - 12-Bit SAR ADC with Ref, 28-SOIC | Maxim Integrated
MX674ALCWI+T ✓ 활성Analog Devices
MX574ALEWI+TCDR - 12-Bit 25µs SAR ADC, 28-SOIC | Maxim Integrated
MX574ALEWI+TCDR ✓ 활성사양 비교
| 파라미터 | MX674ALCWI+T | MX574ALEWI+TCDR |
|---|---|---|
| 브랜드 | Maxim Integrated | Analog Devices |
| 카테고리 | ADC/DAC | ADC/DAC |
| 수명 주기 상태 | 활성 | 활성 |
| 재고 상태 | In Stock | In Stock |
| 단가 (USD) | $21.60 | $17.10 |
| 분해능 | 12 bits | 12 bit |
| Conversion Method | Successive Approximation (SAR) | — |
| Number of Input Channels | 1 | — |
| 샘플링 속도 | 66 ksps (approx, typical) | — |
| Conversion Time | 15 us (max) | — |
| Architecture | Complete ADC with internal reference and clock | — |
| Input Voltage Ranges | 0-10 V, +/-5 V, +/-10 V, 0-5 V | — |
| Supply Voltage - Analog | +5 V and +/-15 V (single +5 V option) | — |
| Supply Voltage - Digital | +5 V | — |
| Reference | Internal 10V buried-Zener (external override supported) | — |
| Output Interface | 12-bit parallel, 3-state, 8/16-bit uP compatible | — |
| Integral Nonlinearity (INL) | [DATA_NEEDED: INL max LSB] | — |
| Differential Nonlinearity (DNL) | [DATA_NEEDED: DNL max LSB] | — |
| 동작 온도 범위 | 0C to +70C (Commercial / 'C' grade) | — |
| 패키지 | 28-SOIC (Wide, 0.3 inch pitch) | 28-pin SOIC wide-body (SOIC-28W) |
| Terminal Form | GULL WING | — |
| Package Code | SOP, RECTANGULAR | — |
| 실장 유형 | Surface Mount | Surface Mount |
| RoHS 상태 | [DATA_NEEDED: RoHS status] | Compliant |
| Manufacturer | — | Analog Devices Inc. (formerly Maxim Integrated) |
| MPN | — | MX574ALEWI+TCDR |
| Converter Type | — | SAR (Successive Approximation Register) ADC |
| Number of Inputs | — | 1 |
| Input Type | — | Single-Ended (unipolar or bipolar ranges via pin strapping) |
| Maximum Conversion Time | — | 25 µs |
| Sample Rate (max) | — | 40 kSPS (typ) |
| Analog Input Ranges | — | 0 to +5 V, 0 to +10 V, ±5 V, ±10 V (software/strap-selectable) |
| Internal Reference | — | +10 V buried Zener, ±0.25 % initial accuracy (typ) |
| Data Interface | — | 12-bit parallel, 8-bit parallel, or serial |
| 출력 유형 | — | Three-state (high-Z) CMOS-compatible |
| Integral Nonlinearity (A grade) | — | ±1 LSB (max) |
| Supply Voltages | — | V+ = +12 V or +15 V, V- = -12 V or -15 V, VCC (digital) = +5 V |
| Power Consumption | — | 150 mW (typ, ±15 V supply) |
| 동작 온도 | — | 0 °C to +70 °C (commercial, 'L' grade) |
| AEC-Q100 | — | Not qualified (commercial grade) |