P1021NXE2HFB vs P1022NXN2LFB 比較
詳細な並列比較: P1021NXE2HFB メーカー: NXP Semiconductors および P1022NXN2LFB メーカー: NXP Semiconductors。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
NXP Semiconductors
P1022NXN2LFB - QorIQ Dual-Core 1.067 GHz SoC | NXP | Networking
P1022NXN2LFB ⚠ ラストタイムバイ仕様比較
| パラメータ | P1021NXE2HFB | P1022NXN2LFB |
|---|---|---|
| ブランド | NXP Semiconductors | NXP Semiconductors |
| カテゴリ | Microcontrollers | Microcontrollers |
| ライフサイクル状態 | 製造終了 | ラストバイ |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $112.80 | $78.40 |
| Part Number | P1021NXE2HFB | — |
| Manufacturer | NXP Semiconductors | — |
| Series | QorIQ P1 | — |
| Core Architecture | PowerPC e500v2 | — |
| Number of Cores | 2 | — |
| Core Frequency (Max) | 800 MHz | — |
| データバス幅 | 32-bit | — |
| Memory Controller | DDR2/DDR3 with ECC | DDR2/DDR3 with ECC support, up to 32-bit |
| Ethernet | 3x Gigabit Ethernet (GbE) | — |
| PCIe | Yes | — |
| USB | USB 2.0 | USB 2.0 host/device |
| Security Engine (SEC) | Yes (hardware-accelerated) | — |
| QUICC Engine (QE) | Yes, revision r1.1 | — |
| パッケージ | 689-TEPBGA II (31x31 mm) | — |
| 動作温度 | -40C to +125C (industrial/extended) | -40 °C to +125 °C (industrial) |
| Process Technology | 45 nm | — |
| Speed Bin | 800/400/667 MHz | — |
| ライフサイクル状態 | End of Life (per NXP product page) | — |
| RoHS | Compliant (per distributor listings) | — |
| Architecture | — | Power Architecture e500 dual-core (RISC, 32-bit) |
| Clock Speed (Core) | — | 1.067 GHz |
| Platform Version | — | 1067/533/667 ET NE r1.1 |
| Core Count | — | 2 |
| Package Type | — | TEPBGA-689 (Plastic, halogen-free, RoHS-compliant) |
| Package Dimensions | — | 31 x 31 mm, 2.23 mm height |
| ピン数 | — | 689 |
| 電源電圧 | — | 3.13 V to 3.47 V |
| Ethernet MACs | — | 3 x 10/100/1000 Mbps Gigabit |
| PCIe Interfaces | — | 3 x PCIe Gen1 |
| Display Controller | — | 32-bit LCD controller |
| Security Engine | — | Integrated (symmetric/asymmetric crypto acceleration) |
| RoHS Compliance | — | Yes (halogen-free) |
| 実装タイプ | — | Surface Mount (BGA, requires thermal via array under die) |