P5020NXN1QMB vs P5010NXN1QMB557 比較
詳細な並列比較: P5020NXN1QMB メーカー: NXP Semiconductors および P5010NXN1QMB557 メーカー: NXP Semiconductors。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
NXP Semiconductors
P5010NXN1QMB557 - QorIQ P5 2GHz 64-Bit MPU | NXP 1295-FCPBGA
P5010NXN1QMB557 ✓ 生産中仕様比較
| パラメータ | P5020NXN1QMB | P5010NXN1QMB557 |
|---|---|---|
| ブランド | NXP Semiconductors | NXP Semiconductors |
| カテゴリ | Microcontrollers | Microcontrollers |
| ライフサイクル状態 | 有効 | 有効 |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $325.75 | $129.60 |
| Manufacturer | NXP Semiconductors | NXP Semiconductors (formerly Freescale) |
| Series | QorIQ P5 | QorIQ P5 |
| Architecture | PowerPC e5500, 64-bit | — |
| Core Count | 2 | — |
| Maximum Core Frequency | 2.0 GHz | 2.0 GHz |
| 動作温度範囲 | -40 C to +105 C | — |
| パッケージ | 1295-ball FCBGA (HBGA) 37.5 mm x 37.5 mm | 1295-ball FCPBGA (37.5 x 37.5 mm) |
| 実装タイプ | Surface Mount (BGA, 1.0 mm pitch) | Surface Mount (BGA) |
| Ball Pitch | 1.0 mm | 1.00 mm |
| Peripheral Interfaces | 3x 10GE + 8x 1GE Ethernet, 2x PCIe Gen 2, 2x Serial RapidIO Gen 2, 4x TDM | — |
| Memory Controller | DDR3 / DDR3L with ECC, up to 32 GB, 1333 MT/s | — |
| On-die Cache | 256 KB private L2 per core + 512 KB shared platform cache | — |
| Hardware Acceleration | Packet parsing, pattern matching, queue management, SEC 4.0 crypto offload | — |
| Encryption Support | Disabled on NXN1 suffix (no encryption) | — |
| MSLレベル | 3 (168 hours) | — |
| RoHS ステータス | Compliant | Compliant |
| Lead Free | Yes | — |
| Core Architecture | — | PowerPC e5500, 64-bit |
| Number of Cores | — | 1 |
| External Data Bus Width | — | 64-bit |
| Address Bus Width | — | 16-bit (per Microchip USA listing) |
| JESD-30 Package Code | — | S-PBGA-B1295 |
| Process Technology | — | CMOS |
| Integrated Cache | — | Yes (L1 + L2) |
| Low-Power Mode Support | — | Yes |
| 動作温度 | — | [DATA_NEEDED: operating temperature range] |