P5020NXN1QMB vs P5010NXN1QMB557 对比

详细并排对比 P5020NXN1QMB 出自 NXP Semiconductors 和 P5010NXN1QMB557 出自 NXP Semiconductors。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

NXP Semiconductors
P5020NXN1QMB P5020NXN1QMB - QorIQ P5 2-Core 2.0GHz PowerPC e5500 MPU | NXP

P5020NXN1QMB - QorIQ P5 2-Core 2.0GHz PowerPC e5500 MPU | NXP

P5020NXN1QMB ✓ 量产中
NXP Semiconductors
P5010NXN1QMB557 P5010NXN1QMB557 - QorIQ P5 2GHz 64-Bit MPU | NXP 1295-FCPBGA

P5010NXN1QMB557 - QorIQ P5 2GHz 64-Bit MPU | NXP 1295-FCPBGA

P5010NXN1QMB557 ✓ 量产中

规格对比

参数 P5020NXN1QMB P5010NXN1QMB557
品牌 NXP Semiconductors NXP Semiconductors
分类 Microcontrollers Microcontrollers
生命周期状态 有效 有效
库存状态 有库存 有库存
单价(USD) $325.75 $129.60
Manufacturer NXP Semiconductors NXP Semiconductors (formerly Freescale)
Series QorIQ P5 QorIQ P5
Architecture PowerPC e5500, 64-bit —
Core Count 2 —
Maximum Core Frequency 2.0 GHz 2.0 GHz
工作温度范围 -40 C to +105 C —
封装 1295-ball FCBGA (HBGA) 37.5 mm x 37.5 mm 1295-ball FCPBGA (37.5 x 37.5 mm)
安装类型 Surface Mount (BGA, 1.0 mm pitch) Surface Mount (BGA)
Ball Pitch 1.0 mm 1.00 mm
Peripheral Interfaces 3x 10GE + 8x 1GE Ethernet, 2x PCIe Gen 2, 2x Serial RapidIO Gen 2, 4x TDM —
Memory Controller DDR3 / DDR3L with ECC, up to 32 GB, 1333 MT/s —
On-die Cache 256 KB private L2 per core + 512 KB shared platform cache —
Hardware Acceleration Packet parsing, pattern matching, queue management, SEC 4.0 crypto offload —
Encryption Support Disabled on NXN1 suffix (no encryption) —
MSL 等级 3 (168 hours) —
RoHS 状态 Compliant Compliant
Lead Free Yes —
Core Architecture — PowerPC e5500, 64-bit
Number of Cores — 1
External Data Bus Width — 64-bit
Address Bus Width — 16-bit (per Microchip USA listing)
JESD-30 Package Code — S-PBGA-B1295
Process Technology — CMOS
Integrated Cache — Yes (L1 + L2)
Low-Power Mode Support — Yes
工作温度 — [DATA_NEEDED: operating temperature range]

数据手册与资源

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