RTAX2000SL-CGS624V vs RTAX2000SL-1CGS624V 比較
詳細な並列比較: RTAX2000SL-CGS624V メーカー: Microchip Technology および RTAX2000SL-1CGS624V メーカー: Microsemi。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
Microchip Technology
RTAX2000SL-CGS624V - 2M-Gate Rad-Tolerant FPGA | Microchip
RTAX2000SL-CGS624V ✓ 生産中Microsemi
RTAX2000SL-1CGS624V - 2M-Gate Rad-Tolerant FPGA | Actel/Microchip
RTAX2000SL-1CGS624V ✓ 生産中仕様比較
| パラメータ | RTAX2000SL-CGS624V | RTAX2000SL-1CGS624V |
|---|---|---|
| ブランド | Microchip Technology | Microsemi |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | 有効 | 有効 |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $6,500.00 | $0.00 |
| Equivalent System Gates | 2000000 | 2000000 |
| Logic Cells (CLBs) | 21504 | 21504 |
| Technology | CMOS antifuse (nonvolatile) | Digital CMOS, antifuse nonvolatile |
| User I/Os (maximum) | 684 | — |
| Embedded Memory | 540 kbits with optional EDAC protection | Up to 540 kbits with optional EDAC |
| Total Ionizing Dose (TID) | 300 krad (Si) functional / 200 krad (Si) parametric | 300 krad (functional), 200 krad (parametric) |
| Single-Event Upset Rate | Less than 1E-10 errors per bit-day | — |
| Configuration | One-time programmable antifuse, live at power-up | One-time programmable (OTP), live at power-up, single chip |
| Embedded SRAM Features | Built-in FIFO control logic | Built-in FIFO control logic |
| Clock Architecture | Segmentable clock structures | — |
| Routing | Chip-wide highway routing, carry logic | — |
| パッケージ | CG624 ceramic package | 624-ball ceramic CGA (CGS624) |
| Family | RTAX-S/SL Radiation-Tolerant FPGA | — |
| Application Domain | Space-flight systems | — |
| Core Supply Voltage | [DATA_NEEDED: core supply voltage] | [DATA_NEEDED: core supply voltage] |
| I/O Supply Voltage | [DATA_NEEDED: I/O supply voltage] | [DATA_NEEDED: I/O supply voltage] |
| Speed Grade | [DATA_NEEDED: speed grade] | -1 |
| 動作温度 | [DATA_NEEDED: operating temperature range] | [DATA_NEEDED: operating temperature range] |
| System Frequency (typical) | [DATA_NEEDED: system frequency] | — |
| User I/Os (max, package dependent) | — | Up to 684 |
| SEU Rate | — | Less than 1E-10 errors per bit-day |
| Quality / Screening Suffix | — | S (space flow), V suffix qualification level |
| Clocking | — | Segmentable clocks, chip-wide highway routing |
| 実装タイプ | — | Surface Mount |