XC3090L-6TQG176I vs XC3090L-7TQG176C 比較
詳細な並列比較: XC3090L-6TQG176I メーカー: Xilinx および XC3090L-7TQG176C メーカー: Xilinx。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | XC3090L-6TQG176I | XC3090L-7TQG176C |
|---|---|---|
| ブランド | Xilinx | Xilinx |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $21.40 | $21.20 |
| Family | XC3000L Low Voltage Logic Cell Array | XC3000L |
| Product Type | SRAM-based FPGA | — |
| Usable Gates | 900 | 5,000 (typical, up to 9,000 peak) |
| Logic Cells (CLBs) | [DATA_NEEDED: CLB count] | — |
| Speed Grade | -6 (approximately 6 ns combinatorial delay) | — |
| Supply Voltage (VCC) | 3.3 V | — |
| Operating Temperature Grade | Industrial (-40C to +85C) | — |
| パッケージ | TQG176 (176-pin Thin Quad Flat Pack) | 176-pin TQFP (TQG176), 1.4 mm height, surface-mount |
| Configuration Modes | 5 (Master Serial, Slave Serial, Master Parallel, Slave Parallel, Peripheral) | — |
| Configuration Memory | SRAM (volatile, requires external configuration PROM) | SRAM (volatile, requires external PROM) |
| Boundary Scan | JTAG IEEE 1149.1 | — |
| Readback | Supported | — |
| Process Technology | CMOS, 5 V tolerant I/O on selected variants | 0.8 micron CMOS |
| 実装タイプ | Surface Mount | Surface Mount |
| RoHS ステータス | [DATA_NEEDED: RoHS compliance] | unknown |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Device | — | XC3090L |
| Logic Cells / CLBs | — | 100 CLBs (320 F-FFs) |
| User I/O Count | — | 144 (maximum, TQG176) |
| Supply Voltage (Core) | — | 3.0 V to 3.6 V |
| Supply Voltage (I/O VCCO) | — | 3.0 V to 3.6 V |
| Logic Cell Toggle Delay | — | approximately 1.3 to 1.5 ns (-7 speed grade) |
| 動作温度範囲 | — | 0C to +85C (C suffix, commercial) |
| Configuration Mode | — | Serial (master/slave) and JTAG (IEEE 1149.1) |
| MSLレベル | — | 3 (168 hours) [DATA_NEEDED: confirm per package marking] |
| Lead-Free / Lead Content | — | [DATA_NEEDED] |
| Configuration Clock Source | — | Internal oscillator amplifier or external pin |
| Output Drive (per I/O) | — | 8 mA source / 24 mA sink (typical, datasheet TBD by speed grade) |