AD7862AR-10 - Dual 250kSPS 12-Bit ±10V ADC | Analog Devices
部品番号: AD7862AR-10 ✓ 生産中| 数量 | 単価 | 小計 |
|---|---|---|
| 1 | $18.9 | $18.90 |
| 10 | $17.05 | $170.50 |
| 100 | $15.2 | $1,520.00 |
| 500 | $13.75 | $6,875.00 |
| 1,000 | $12.35 | $12,350.00 |
AD7862AR-10 概要
A simultaneous-sampling ADC is a converter whose two (or more) sample-and-hold stages acquire their input voltages at the same instant, eliminating the channel-to-channel time skew that would otherwise appear in multi-axis motor control, power-line monitoring, or three-phase measurement systems. By definition, an SAR (Successive Approximation Register) ADC walks an internal DAC bit-by-bit from MSB to LSB each conversion, delivering deterministic latency and excellent DC linearity - the architecture sits inside the broader family of data-converter ICs alongside flash, pipeline, sigma-delta, and dual-slope converters. The AD7862 belongs to that SAR sub-family at the low-to-mid speed tier (250 kSPS) optimized for multiplexed industrial signal chains rather than imaging or communications.
Key specifications include 250 kSPS per-channel throughput, 4 microsecond conversion time, 4 analog inputs arranged as two channel pairs (VA1/VA2 and VB1/VB2) selected by the A0 logic input, ±10 V true-bipolar input range for the -10 variant, ±5 LSB maximum integral nonlinearity (INL), and 60 mW typical power dissipation. The internal +2.5 V reference eliminates external reference circuitry, while a hardware A0 line selects which channel pair is actively converting, allowing one device to monitor four sensors with two ADC cores.
Architecturally, the AD7862 pairs two SAR cores with matched aperture-delay track-and-hold amplifiers, so the chip captures both signals simultaneously and then digitizes them sequentially through the shared digital interface. The internal reference, voltage-regulator front end, and parallel data bus combine to deliver AC performance such as 70 dB typical SNR and 80 dB typical CMRR at 50 kHz while keeping the BOM simple.
Typical applications include AC motor control feedback, three-phase power-line monitoring, multi-axis servo systems, instrumentation, and data acquisition boards where two signals must be sampled within the same clock cycle. The wide ±10 V input is also attractive for PLC analog-input modules and process-control front ends that must accept industrial-level signals directly.
When designing with this device, ensure that the analog inputs are protected against overvoltage beyond the ±10 V common-mode rail and that the +5 V analog supply is well decoupled with a 10 microfarad tantalum and a 0.1 microfarF ceramic capacitor placed close to the AVCC pin. The A0 channel-select line should be driven synchronously with the CONVST signal to avoid ghost conversion artifacts.
This page synthesizes distributor pricing, drop-in pin-compatible alternatives, and practical design notes not found in the manufacturer datasheet alone.
ドロップイン代替品: AD7862AR-10 — 同一パッケージでピン互換。PCBの作り直しが必要な異なるパッケージの部品は除外されています。
このシリーズのバリエーション
同一シリーズでドロップイン互換のモデル: AD7862AR-10 （同一形状・フットプリント） — 相違点: Package, Resolution, Conversion Time, Sampling Rate, Data Interface.
クイック比較ツール — 並列比較する代替部品を選択:
AD7862ARZ-10
✅ ドロップイン📋 参考代替品（カタログ未掲載）
AD7862BR-10
✅ ドロップイン📋 参考代替品（カタログ未掲載）
AD7862BRZ-10
✅ ドロップイン📋 参考代替品（カタログ未掲載）
AD7862ARS-10
✅ ドロップイン ⚠️ 仕様未検証📋 参考代替品（カタログ未掲載）
AD7862ARSZ-10
✅ ドロップイン ⚠️ 仕様未検証📋 参考代替品（カタログ未掲載）
AD7862AR-10 最大定格＆電気的特性
| Part Number | AD7862AR-10 |
| Number of ADCs | 2 |
| 分解能 | 12 bits |
| Conversion Rate (Throughput) | 250 kSPS per channel |
| Conversion Time | 4 microseconds |
| Input Channels | 4 (2 channels x 2 inputs) |
| 入力電圧範囲 | ±10 V (AD7862-10) |
| Analog Input Type | Single-ended, true bipolar |
| 電源電圧 | +5 V single supply |
| Supply Current (typ) | 12 mA (60 mW) |
| Architecture | SAR (Successive Approximation) |
| Internal Reference | +2.5 V |
| Aperture Delay Matching | Tight (matched between two ADCs) |
| インターフェース | High-speed parallel |
| Integral Nonlinearity (INL) | ±1 LSB max (typical) / ±0.5 LSB (B-grade) |
| Signal-to-Noise Ratio (SNR) | 70 dB typical |
| Common-Mode Rejection | 80 dB typical at 50 kHz |
| Power Dissipation | 60 mW typical |
| 動作温度範囲 | -40 °C to +85 °C |
| パッケージ | 28-pin SOIC (R-28) wide body |
| Channel Selection | A0 logic input |
| Track-and-Hold | Yes, two integrated T/H amplifiers |
| 実装タイプ | Surface Mount |
| RoHS ステータス | Compliant |
AD7862AR-10 ピン構成
| ピン 1 | VA1 — Channel A analog input 1 (±10 V) |
| ピン 2 | VA2 — Channel A analog input 2 (±10 V) |
| ピン 3 | VB1 — Channel B analog input 1 (±10 V) |
| ピン 4 | VB2 — Channel B analog input 2 (±10 V) |
| ピン 5 | AGND — Analog ground |
| ピン 6 | REF — Internal +2.5 V reference (decouple to AGND) |
| ピン 7 | AGND — Analog ground |
| ピン 8 | REF — Internal +2.5 V reference |
| ピン 9 | AGND — Analog ground |
| ピン 10 | AVCC — Analog +5 V supply |
| ピン 11 | AGND — Analog ground |
| ピン 12 | A0 — Channel select (logic input) |
| ピン 13 | CONVST — Conversion start input |
| ピン 14 | BUSY — Busy output (active high during conversion) |
| ピン 15 | HBEN — High byte enable (selects 8/12-bit read) |
| ピン 16 | CS — Chip select (active low) |
| ピン 17 | RD — Read input (active low) |
| ピン 18 | DGND — Digital ground |
| ピン 19 | DVCC — Digital +5 V supply |
| ピン 20 | DB11/MSB — Parallel data bit 11 (MSB) when HBEN=1 |
| ピン 21 | DB10 — Parallel data bit 10 |
| ピン 22 | DB9 — Parallel data bit 9 |
| ピン 23 | DB8 — Parallel data bit 8 |
| ピン 24 | DB7 — Parallel data bit 7 |
| ピン 25 | DB6 — Parallel data bit 6 |
| ピン 26 | DB5 — Parallel data bit 5 |
| ピン 27 | DB4 — Parallel data bit 4 |
| ピン 28 | DB3/LSB — Parallel data bit 3 (LSB on 12-bit read; 8-bit reads DB0-DB7 on lower pins) |
主な用途
AD7862AR-10 の用途: 7 件s: AC Motor Control Feedback, Three-Phase Power Line Monitoring, Multi-Axis Servo Control Systems, Industrial Data Acquisition (DAQ) Boards, PLC Analog Input Modules, Vibration and Modal Analysis, Uninterruptible Power Supply (UPS) Monitoring.
AC Motor Control Feedback
The AD7862AR-10's simultaneous-sampling dual 12-bit ADC cores capture two axis currents (or current + DC-bus voltage) within the same aperture window, eliminating the time skew that would otherwise corrupt vector-control math. With ±10 V true-bipolar inputs the part directly accepts low-side shunt signals conditioned by op-amp gain stages, while the 4 microsecond conversion time keeps the current loop stable at PWM carrier frequencies up to 10 kHz. Its 60 mW typical dissipation and single +5 V supply also simplify thermal management inside IPM-integrated motor drives.
おすすめ
Three-Phase Power Line Monitoring
Three-phase power-quality meters require simultaneous sampling of two line voltages and two line currents to compute true RMS, harmonic content, and reactive power without phase error. The AD7862AR-10 provides the matched-aperture dual conversion needed for accurate power calculations, while the ±10 V input range accepts PT/CT secondary signals directly. The internal +2.5 V reference removes external calibration drift, and the 250 kSPS throughput comfortably covers harmonics up to the 50th harmonic of 50/60 Hz mains.
おすすめ
Multi-Axis Servo Control Systems
Six-axis or four-axis servo controllers need simultaneous position/current feedback from each axis to maintain cross-axis synchronization. The AD7862AR-10 lets two servo axes share one ADC chip via its A0 channel-mux, halving component count versus single-channel ADCs and improving BOM cost per axis. The 80 dB common-mode rejection at 50 kHz keeps noise-induced jitter low on long encoder cables, and the parallel interface reduces firmware latency versus SPI-based converters in deterministic control loops.
おすすめ
Industrial Data Acquisition (DAQ) Boards
PCI or USB DAQ boards for industrial signal monitoring rely on the AD7862AR-10's ability to convert two channels simultaneously at 250 kSPS each while accepting ±10 V industrial signal levels with no external scaling. The high-speed parallel interface feeds directly to FPGA buffers, supporting streaming to host memory with deterministic timing. The 60 mW typical power budget helps dense multi-board chassis designs where thermal headroom is shared across multiple ADC cards.
おすすめ
PLC Analog Input Modules
Programmable logic controller (PLC) analog-input modules frequently specify ±10 V input ranges with 12-bit resolution for process-control compatibility. The AD7862AR-10 delivers that industrial-standard input range directly, plus simultaneous sampling that improves control-loop determinism for closed-loop PID loops over pressure and flow signals. Its single +5 V supply simplifies isolated PSU design, while the SOIC-28 package suits the ruggedized conformal-coated PCB assemblies typical of PLC modules.
おすすめ
Vibration and Modal Analysis
Mechanical vibration analysis on rotating equipment (motors, pumps, spindles) requires capturing two accelerometer channels simultaneously to preserve phase information that indicates imbalance, misalignment, or bearing wear. The AD7862AR-10's matched-aperture dual conversion, 250 kSPS throughput, and ±10 V input range suit IEPE-style accelerometer front ends with charge amplifiers. The 70 dB SNR typical delivers adequate spurious-free dynamic range for envelope analysis up to 10 kHz mechanical vibration bands.
おすすめ
Uninterruptible Power Supply (UPS) Monitoring
Online UPS systems need to monitor both input-mains and inverter-output waveforms simultaneously to detect transfer events and synchronize seamless switchover. The AD7862AR-10's dual simultaneous-sampling ADCs monitor both rails at 250 kSPS each, providing sub-cycle resolution on 50/60 Hz waveforms and sufficient bandwidth to capture transient events. The ±10 V input range accepts CT/PT secondary voltages directly, while the 60 mW dissipation helps fit into the thermally-constrained inverter cabinet.
おすすめ
おすすめ製品の概要
エンジニアリング参考データ: AD7862AR-10 — 比較、設計ガイダンス、コンプライアンス情報。
選定ガイド
代替品との比較
| パラメータ | この製品 | AD7862ARZ-10 | AD7862BR-10 | AD7862BRZ-10 | AD7862ARS-10 | AD7862ARSZ-10 |
|---|---|---|---|---|---|---|
| Brand | Analog Devices | Analog Devices | Analog Devices | Analog Devices | Analog Devices | Analog Devices |
| Package | 28-pin SOIC (R-28) | 28-pin SOIC (R-28) - same | 28-pin SOIC (R-28) - same | 28-pin SOIC (R-28) - same | 28-pin SSOP (RS-28) - smaller | 28-pin SSOP (RS-28) - smaller |
| Resolution | 12 bits | 12 bits | 12 bits | 12 bits | 12 bits | 12 bits |
| Throughput | 250 kSPS | 250 kSPS | 250 kSPS | 250 kSPS | 250 kSPS | 250 kSPS |
| Input Voltage Range | ±10 V | ±10 V | ±10 V | ±10 V | ±10 V | ±10 V |
| INL (max) | ±1 LSB (A grade) | ±1 LSB (A grade) | ±0.5 LSB (B grade, tighter) | ±0.5 LSB (B grade, tighter) | ±1 LSB (A grade) | ±1 LSB (A grade) |
| Simultaneous Sampling | Yes (2 channels) | Yes (2 channels) | Yes (2 channels) | Yes (2 channels) | Yes (2 channels) | Yes (2 channels) |
| RoHS / Lead-Free | Non-RoHS (legacy R grade) | RoHS-compliant (Z suffix) | Non-RoHS (R grade) | RoHS-compliant (Z suffix) | Non-RoHS (R grade) | RoHS-compliant (Z suffix) |
主な差別化要因
- True simultaneous sampling with matched aperture delay （vs Texas Instruments ADS7862)
- Tighter B-grade linearity option （vs AD7862AR-10 (this part))
- Internal +2.5 V reference eliminates external REF IC （vs External-reference SAR ADCs)
設計ノート
The AD7862AR-10 requires a clean +5 V analog supply (AVCC) decoupled with a 10 microF tantalum in parallel with a 0.1 microF ceramic placed within 5 mm of the AVCC pin. AVCC and DVCC can be tied to the same +5 V plane if a ferrite bead separates them; otherwise use separate regulators. Estimated supply ripple: keep below 50 mVpp for best SNR. Poor decoupling is the single most common cause of degraded SNR in field returns.
Do not drive the four analog inputs (VA1, VA2, VB1, VB2) beyond ±15 V even momentarily, or the front-end ESD structures may be damaged and gain calibration permanently degrade. The A0 channel-select line must be held stable for at least 20 ns before the rising edge of CONVST to avoid internal logic contention; violations produce a single corrupted conversion but no permanent damage. Always read the BUSY line before asserting RD to avoid bus contention on the parallel output.
Place the REF decoupling capacitor (10 microF tantalum + 0.1 microF ceramic) directly between the REF pin and AGND with traces no longer than 5 mm. The internal +2.5 V reference is the dominant source of conversion accuracy, and long REF traces pick up digital switching noise from DB0-DB11 and degrade linearity by 1-2 LSB. Route the parallel data bus away from the analog inputs and use a ground guard trace between the analog and digital sections.
Estimated junction temperature: at +5 V supply, 12 mA typical current draw, the AD7862AR-10 dissipates ~60 mW in the 28-pin SOIC (R-28) package with a theta_JA of approximately 75 C/W on a standard 4-layer JEDEC test board. Rise above ambient under natural convection is therefore only ~4.5 C - thermal management is not a concern, and no heatsink is required even inside sealed enclosures.
コンプライアンス情報
The legacy AD7862AR-10 (R suffix) is non-RoHS / contains lead. The RoHS-compliant drop-in equivalent AD7862ARZ-10 (Z suffix) is preferred for new designs. Not AEC-Q100 qualified - for automotive applications use the AD7862ARSZ-10 variant or evaluate other ADCs.
