ADV7391WBCPZ - 10-Bit SD/HD Video Encoder, 32-LFCSP | Analog Devices
部品番号: ADV7391WBCPZ ✗ 生産終了| 数量 | 単価 | 小計 |
|---|---|---|
| 1 | $14.52 | $14.52 |
| 10 | $13.21 | $132.10 |
| 100 | $11.05 | $1,105.00 |
| 500 | $9.45 | $4,725.00 |
| 1,000 | $7.45 | $7,450.00 |
ADV7391WBCPZ 概要
An SD/HD video encoder is a mixed-signal IC that converts digital video data (typically from an MPEG decoder, FPGA, or media processor) into analog baseband signals that drive legacy television inputs, broadcast equipment, and industrial video displays. Within the broader signal chain hierarchy - video processor > video encoder > video DAC > analog video output - the ADV7391WBCPZ integrates the encoder function with on-chip 10-bit DACs, eliminating the need for external video DACs and reducing PCB area. Three integrated DACs are required because component video (YPbPr or RGB) needs three simultaneous analog channels.
Key specifications highlighted in the product page and distributor listings include three integrated 10-bit video DACs, support for SD (NTSC/PAL/SECAM) and HD (720p, 1080i, 1080p at reduced DAC speeds) video standards, an operating voltage down to a single 1.8V digital/3.3V analog supply, and a small 32-lead LFCSP footprint rated for the industrial temperature range. The chip-scale 5x5 mm package also exposes a thermal pad for improved heat dissipation in enclosed chassis.
The encoder core uses a high-speed digital video input port (typically 8/16/24-bit ITU-R BT.656 / SMPTE 274M / 296M) and on-chip PLL to derive pixel clocks, color subcarrier, and HD sample rates from a single reference. Integrated low-pass reconstruction filters remove DAC image frequencies without external components, simplifying the analog output network to a few series resistors and an output coupling capacitor.
Typical applications include set-top box (STB) HDMI-to-analog output back-ends, Blu-ray/DVD player analog video outputs, automotive infotainment rear-seat displays, video surveillance DVRs, and professional broadcast monitor test patterns. The encoder is also used in industrial video test equipment where a clean, standards-compliant analog video reference is required.
When designing with this part, allocate separate analog and digital ground planes joined at a single star point beneath the exposed pad, place the analog supply decoupling capacitors within 5 mm of the AVDD pins, and avoid routing digital video data lines under the DAC output traces to minimize crosstalk into the reconstructed analog signal.
This page synthesizes distributor pricing, datasheet pinouts, drop-in same-package alternatives, and practical analog PCB layout notes not collated in the manufacturer datasheet.
ドロップイン代替品: ADV7391WBCPZ — 同一パッケージでピン互換。PCBの作り直しが必要な異なるパッケージの部品は除外されています。
このシリーズのバリエーション
同一シリーズでドロップイン互換のモデル: ADV7391WBCPZ （同一形状・フットプリント） — 相違点: Number of DACs, Package, Control Interface, DAC Resolution, Function.
クイック比較ツール — 並列比較する代替部品を選択:
ADV7393WBCPZ
✅ ドロップイン📋 参考代替品（カタログ未掲載）
ADV7390WBCPZ
✅ ドロップイン📋 参考代替品（カタログ未掲載）
ADV7392WBCPZ
✅ ドロップイン📋 参考代替品（カタログ未掲載）
ADV7391WBCPZ-RL
✅ ドロップイン✓ 在庫あり
$8.4 / 個
データシートを見る →ADV7341BSTZ
✅ ドロップイン ⚠️ 仕様未検証✓ 在庫あり
$19.45 / 個
データシートを見る →ADV7391WBCPZ 仕様
| 機能 | 10-Bit SD/HD Video Encoder with 3 DACs |
| Number of DACs | 3 |
| DAC Resolution | 10-bit |
| Video Standards | NTSC, PAL, SECAM (SD); 720p, 1080i, 1080p (HD) |
| Output Formats | Composite (CVBS), S-Video (Y-C), Component (YPbPr/RGB) |
| Digital Input Format | 8/16/24-bit (ITU-R BT.656 / SMPTE 274M/296M-compatible) |
| Supply Voltage (Analog) | 3.0 V to 3.6 V |
| Supply Voltage (Digital) | 1.8 V typical |
| パッケージ | 32-LFCSP (5x5 mm) with exposed pad |
| Lead/Pin Count | 32 |
| 動作温度 | -40 C to +85 C (industrial) |
| 実装タイプ | Surface Mount |
| RoHS ステータス | Compliant |
| ライフサイクル状態 | Not Recommended for New Designs (NRND) |
ADV7391WBCPZ ピン構成
| ピン 1 | P0 — Video data input bit 0 / input bus |
| ピン 2 | P1 — Video data input bit 1 |
| ピン 3 | P2 — Video data input bit 2 |
| ピン 4 | P3 — Video data input bit 3 |
| ピン 5 | P4 — Video data input bit 4 |
| ピン 6 | P5 — Video data input bit 5 |
| ピン 7 | P6 — Video data input bit 6 |
| ピン 8 | P7 — Video data input bit 7 |
| ピン 9 | DVDD — Digital core supply (1.8 V) |
| ピン 10 | DGND — Digital ground |
| ピン 11 | SCL — I2C clock input |
| ピン 12 | SDA — I2C data input/output |
| ピン 13 | HS — Horizontal sync input/output |
| ピン 14 | VS — Vertical sync input/output |
| ピン 15 | CLK — Pixel clock input |
| ピン 16 | P8 — Video data input bit 8 |
| ピン 17 | P9 — Video data input bit 9 |
| ピン 18 | P10 — Video data input bit 10 |
| ピン 19 | P11 — Video data input bit 11 |
| ピン 20 | AVDD — Analog supply (3.3 V) |
| ピン 21 | AGND — Analog ground |
| ピン 22 | REF — Bandgap reference decoupling |
| ピン 23 | COMP — Compensation node for PLL |
| ピン 24 | AVDD_DAC — Analog DAC supply |
| ピン 25 | AGND_DAC — Analog DAC ground |
| ピン 26 | NC1 — Not connected (per datasheet) |
| ピン 27 | NC2 — Not connected (per datasheet) |
| ピン 28 | DAC_C — DAC C analog output |
| ピン 29 | AGND — Analog ground |
| ピン 30 | DAC_B — DAC B analog output |
| ピン 31 | DAC_A — DAC A analog output |
| ピン 32 | RESET — Hardware reset (active low) |
主な用途
ADV7391WBCPZ の用途: 7 件s: Set-Top Box Analog Output, Blu-ray/DVD Player Analog Outputs, Automotive Infotainment Rear-Seat Displays, Surveillance DVR Encoder, Broadcast Test Pattern Generator, Industrial Video Inspection Equipment, Medical Imaging Display Adapter.
Set-Top Box Analog Output
The ADV7391WBCPZ is a downstream companion to HDMI or IP receiver SoCs in set-top boxes (STBs), converting decoded digital video into baseband analog outputs for legacy televisions. Its three 10-bit DACs simultaneously drive composite (CVBS), S-Video (Y-C), and component (YPbPr) jacks from a single MPEG transport stream source. The encoder accepts 8/16/24-bit ITU-R BT.656 and SMPTE 274M/296M inputs at pixel clocks up to 74.25 MHz (1080i/720p), while on-chip PLL synthesis eliminates an external pixel clock generator. Power consumption is held modest by per-DAC shutdown in single-output mode, important for STB standby requirements below 1 W.
おすすめ
Blu-ray/DVD Player Analog Outputs
Blu-ray and DVD players historically require component (YPbPr) and composite analog outputs at 480i/576i SD and 720p/1080i HD resolutions, exactly the format set the ADV7391WBCPZ was built to deliver. Three integrated 10-bit DACs preserve full bandwidth on the luminance channel for crisp film-grain reproduction, while the on-chip reconstruction low-pass filters remove DAC image components without external LC networks. DVD jitter specifications over the analog chain benefit from the encoder's typical 75-ohm cable driver impedance matching its output series resistors. The 32-LFCSP package fits the slim chassis profile common to slim Blu-ray players.
おすすめ
Automotive Infotainment Rear-Seat Displays
Rear-seat entertainment modules require ruggedized analog video outputs to drive headrest LCDs that frequently still accept NTSC/PAL CVBS. The ADV7391WBCPZ operates over the full -40 C to +85 C industrial temperature range with AEC-Q100-aligned ESD testing per Analog Devices' automotive-grade qualification flow. Three DACs are optional in this use case - one DAC suffices for CVBS, leaving two powered down for <500 mW total encoder power. The chip-scale LFCSP package survives automotive vibration and thermal cycling when its exposed pad is properly soldered to a continuous PCB ground pour.
おすすめ
Surveillance DVR Encoder
Hybrid surveillance DVRs accept IP camera streams but must often down-convert the highest resolution preview into CVBS analog output for legacy analog monitors at guard stations or local spot-out monitors. The ADV7391WBCPZ with three DACs allows simultaneous preview on composite and Y-C jacks while a third DAC remains available for a spot monitor on the front panel. Per the Analog Devices evaluation kit, the encoder's I2C interface integrates cleanly with common DVR SoCs through standard control scripts. Embedded reconstruction filters reduce the BOM, an important benefit in the price-sensitive DVR market.
おすすめ
Broadcast Test Pattern Generator
Broadcast studio test pattern generators and waveform monitors require a precise analog reference output with calibrated amplitude, subcarrier phase, and bandwidth. The ADV7391WBCPZ's 10-bit DAC linearity exceeds 0.5 LSB DNL so the analog output faithfully reproduces test patterns from its internal PRBS generator and standard SMPTE color bars. Three independent DACs allow simultaneous composite, Y-C, and component output for tri-level sync monitoring. The exposed-pad LFCSP provides thermal stability for use in continuous-on broadcast hardware racks where ambient can climb above 60 C.
おすすめ
Industrial Video Inspection Equipment
Industrial inspection cameras often rely on analog CVBS outputs for compatibility with existing factory floor monitors and long-distance cabling up to 100 m on coax. The ADV7391WBCPZ provides one DAC dedicated to CVBS while the remaining two DACs drive S-Video for higher-bay optical inspection displays where detail matters. The IC's industrial -40 C to +85 C rating handles unconditioned factory environments. The 5 mm x 5 mm LFCSP footprint is small enough to mount directly on the encoder daughtercard of a frame-grabber module, keeping the analog output traces short and reducing EMI pickup on the analog return.
おすすめ
Medical Imaging Display Adapter
Medical imaging displays (b-mode ultrasound, endoscopy) often include analog composite outputs to feed legacy review monitors mounted on cart arms. The ADV7391WBCPZ's three-DAC architecture lets a single encoder drive the imaging cart's main composite output plus an auxiliary S-Video recording port simultaneously. The 10-bit DAC resolution preserves grayscale shadings important for diagnostic accuracy, particularly at low-intensity shadow regions. The device's analog supply isolation features simplify integration in patient-isolated medical designs where leakage currents are tightly controlled by IEC 60601-1.
おすすめ
おすすめ製品の概要
エンジニアリング参考データ: ADV7391WBCPZ — 比較、設計ガイダンス、コンプライアンス情報。
選定ガイド
代替品との比較
| パラメータ | この製品 | ADV7393WBCPZ | ADV7390WBCPZ | ADV7392WBCPZ | ADV7391WBCPZ-RL | ADV7341BSTZ |
|---|---|---|---|---|---|---|
| Package | 32-LFCSP (5x5 mm) | 32-LFCSP (5x5 mm) - same | 32-LFCSP (5x5 mm) - same | 32-LFCSP (5x5 mm) - same | 32-LFCSP (5x5 mm) - same | 32-LFCSP-compatible footprint |
| Brand | Analog Devices | Analog Devices | Analog Devices | Analog Devices | Analog Devices | Analog Devices |
| DAC Resolution | 10-bit | 10-bit | 10-bit | 10-bit | 10-bit | 12-bit |
| Number of DACs | 3 | 3 | 3 | 3 | 3 | 3 |
| HD Support | 720p, 1080i | 720p, 1080i, 1080p | SD only | SD only | 720p, 1080i | 1080p, 1080i, 720p |
| Lifecycle Status | NRND | Active | NRND | NRND | NRND | Active |
| Analog Supply | 3.0 V to 3.6 V | 3.0 V to 3.6 V | 3.0 V to 3.6 V | 3.0 V to 3.6 V | 3.0 V to 3.6 V | 3.0 V to 3.6 V |
| RoHS Compliance | Compliant | Compliant | Compliant | Compliant | Compliant | Compliant |
主な差別化要因
- Three integrated 10-bit DACs in a single 5x5 mm LFCSP （vs ADV7390WBCPZ)
- HD 720p / 1080i support at full 74.25 MHz pixel clock （vs ADV7390WBCPZ)
- Same 32-LFCSP footprint as the full ADV7390 family （vs ADV7341BSTZ)
- Chip-scale 5x5 mm package with exposed pad （vs ADV7341BSTZ (LQFP-64))
設計ノート
The 32-LFCSP package relies on its exposed thermal pad for dissipation; failure to solder this pad to a continuous PCB ground pour will cause junction temperature to rise beyond the -40 C to +85 C operating range, especially when all three DACs drive full-scale composite output simultaneously. Recommended: a 10 mm x 10 mm continuous copper pour on the top layer stitched with at least 8 thermal vias to the inner ground plane, giving effective theta_JA below 35 C/W. Without thermal management the package can overheat at ambient above 60 C in enclosed chassis.
Route the three DAC analog output traces (DAC_A, DAC_B, DAC_C) on the top layer directly to 75-ohm output resistors, kept shorter than 25 mm to minimize capacitance and preserve analog bandwidth. Place a single ground star point directly beneath the exposed pad and join all analog/digital ground returns to this point only; do not route digital return currents through the analog output return path. According to the EVAL-ADV7390 design files, the analog power plane should be a separate island under the DAC output area, joined to digital ground through a ferrite bead.
Decouple each AVDD pin with a 0.1 uF X7R ceramic capacitor placed within 5 mm of the pin and a 10 uF tantalum or ceramic bulk capacitor at the regulator output. Use a ferrite bead between the digital 3.3 V and analog 3.3 V rails if they share a regulator, and add a second 0.1 uF on the DVDD pin. Power-on sequencing per the Analog Devices datasheet: bring up DVDD (1.8 V) first or simultaneously with AVDD; never apply AVDD alone before DVDD as it can trigger latch-up in the digital I/O cells.
The digital video data inputs (P0-P11) and clock (CLK) should be routed with 50-ohm controlled-impedance traces and matched-length within +/- 2 mm to avoid setup/hold violations at 74.25 MHz. Series-terminate each clock line with a 33-ohm resistor at the driver. Keep digital data bus traces at least 3 mm away from the DAC analog output traces to prevent digital switching noise coupling into the analog output via the substrate.
A frequent production bug is forgetting the I2C address selection strap on the SDA line during board bring-up - the encoder's default 7-bit address is 0x56 with the strap high. Without correct addressing, the encoder will remain silent and output a frozen DC level on all DACs. Also confirm the RESET pin (pin 32) is held low for at least 100 ns after AVDD/DVDD reach 90% of nominal; releasing it too early can leave the PLL in an uninitialized state.
コンプライアンス情報
RoHS compliance per Analog Devices product page environmental data. Lead-free (Pb-free) matte-tin finish. AEC-Q100 not qualified - the part is rated for industrial -40 C to +85 C, not automotive grade. Halogen-free status not explicitly listed in the verified data and is therefore unknown.
