CGD65B200S2 - 650V 200mΩ ICeGaN™ GaN HEMT | Cambridge GaN Devices
部品番号: CGD65B200S2 ✓ 生産中| 数量 | 単価 | 小計 |
|---|---|---|
| 1 | $2.85 | $2.85 |
| 10 | $2.55 | $25.50 |
| 100 | $2.2 | $220.00 |
| 500 | $1.95 | $975.00 |
| 1,000 | $1.7 | $1,700.00 |
CGD65B200S2 概要
A GaN HEMT (High Electron Mobility Transistor) is a wide-bandgap power semiconductor whose heterojunction (typically AlGaN/GaN) creates a two-dimensional electron gas (2DEG) channel with electron mobility roughly 10x higher than silicon. Compared with conventional silicon MOSFETs of similar voltage rating, GaN HEMTs offer lower switching losses, smaller output capacitance charge (Qoss), zero reverse-recovery charge, and the ability to switch at MHz-class frequencies — enabling smaller magnetics and higher power density. The CGD65B200S2 belongs to the ICeGaN™ family of GaN-on-Si power transistors and sits within the discrete-transistor → power MOSFET → wide-bandgap power semiconductor hierarchy.
Key features include a 200 mΩ typical R_DS(on) at the recommended gate drive, a 650 V drain-source rating suitable for 400 V rectified bus operation, and a threshold voltage compatible with standard gate drivers. The device integrates CGD's ICeGaN™ gate input circuitry that allows it to be driven by virtually any gate driver or PWM controller chip without the negative-bias requirements typical of early-generation GaN HEMTs. The package provides a low thermal-resistance path and Kelvin-source capability for high-frequency switching performance.
Typical applications span industrial SMPS, telecom rectifier stages, totem-pole bridgeless PFC, photovoltaic micro-inverters, and Class-D audio output stages. For high-frequency soft-switched topologies the part enables 100-500 kHz operation with substantially higher efficiency than silicon super-junction MOSFET equivalents, reducing heatsink and magnetics BOM cost in adapter and server PSU designs.
ドロップイン代替品: CGD65B200S2 — 同一パッケージでピン互換。PCBの作り直しが必要な異なるパッケージの部品は除外されています。
このシリーズのバリエーション
同一シリーズでドロップイン互換のモデル: CGD65B200S2 （同一形状・フットプリント） — 相違点: Gate Technology, Manufacturer, Package.
クイック比較ツール — 並列比較する代替部品を選択:
CGD65B200S2-T13
✅ ドロップイン📋 参考代替品（カタログ未掲載）
CGD65A200S2
✅ ドロップイン📋 参考代替品（カタログ未掲載）
CGD65B200S2-TPD
✅ ドロップイン📋 参考代替品（カタログ未掲載）
IGOT65R200D2
✅ ドロップイン📋 参考代替品（カタログ未掲載）
GS-065-200-1-D
✅ ドロップイン📋 参考代替品（カタログ未掲載）
CGD65B200S2 最大定格＆電気的特性
| Manufacturer | Cambridge GaN Devices |
| Part Family | ICeGaN™ |
| Device Type | Enhancement-mode GaN-on-Si HEMT |
| Drain-Source Voltage (V_DS) | 650 V |
| Typical R_DS(on) | 200 mΩ |
| Gate Drive (V_GS) | 12 V (typical) |
| パッケージ | 8-PowerVDFN (DFN5x6) |
| 実装タイプ | Surface Mount |
| Operating Mode | Enhancement mode (normally-off) |
| Gate Technology | ICeGaN™ (gate input circuit on chip) |
| Material | GaN-on-Silicon |
| Polarity | N-Channel |
| Reel Variant | CGD65B200S2-T13 (Tape & Reel) |
| RoHS ステータス | Compliant |
CGD65B200S2 ピン構成
| ピン 1 | Gate — Gate input, driven by ICeGaN™ gate circuit from standard gate driver |
| ピン 2 | Source — Source connection (Kelvin source recommended) |
| ピン 3 | Source — Source connection |
| ピン 4 | Source — Source connection |
| ピン 5 | Drain — Drain tab (exposed pad) — primary thermal path |
| ピン 6 | Source — Source connection |
| ピン 7 | Source — Source connection |
| ピン 8 | Source — Source connection |
安全動作領域
主な用途
CGD65B200S2 の用途: 7 件s: Totem-Pole Bridgeless PFC, Industrial SMPS and Server PSU, Photovoltaic Microinverter, Class-D Audio Amplifier Output Stage, BLDC Motor Drive Inverter, Telecom Rectifier and DC-DC Stage, USB-PD and High-Power Adapter.
Totem-Pole Bridgeless PFC
The CGD65B200S2 is engineered for totem-pole bridgeless PFC stages in 1-3 kW AC-DC converters where its zero reverse-recovery charge (Qrr) and 650 V breakdown rating enable 99% peak efficiency at 100-200 kHz switching. The ICeGaN™ gate input circuit allows direct drive from standard SiC-optimized gate drivers without negative bias rails. Placed in the slow leg of the totem-pole during AC line cycles, it minimizes dead-time losses and allows inductor downsizing by 40-60% versus silicon super-junction MOSFET implementations.
おすすめ
Industrial SMPS and Server PSU
In 1-2 kW server and telecom SMPS designs the CGD65B200S2's 650 V rating handles 380-400 V rectified bus operation with adequate derating margin, while its 200 mΩ R_DS(on) keeps conduction losses competitive with silicon super-junction MOSFETs. The GaN switching speed enables LLC and PFC stages to operate at 200-500 kHz, shrinking magnetic components by 30-50%. According to Cambridge GaN Devices documentation, this enables Open Compute Project (OCP) and 80 PLUS Titanium compliance for 1U and 2U form-factor power supplies.
おすすめ
Photovoltaic Microinverter
For 600-1500 W photovoltaic microinverters, the CGD65B200S2 provides the 650 V breakdown margin required at the DC-link of single-phase string inverters fed from 400-600 V DC strings. Its high-frequency switching capability (up to 500 kHz in soft-switched topologies) enables HF transformer isolation stages with dramatically reduced core size. The integrated ICeGaN™ gate circuit simplifies the bootstrap-drive design and eliminates the negative-V_GS requirement that complicates many first-generation GaN HEMT designs.
おすすめ
Class-D Audio Amplifier Output Stage
The CGD65B200S2 is well-suited for high-power Class-D audio output stages in 500 W-1 kW professional audio and subwoofer amplifiers where its zero Qrr and low output capacitance (Coss) directly translate into lower THD+N. The 650 V rating supports ±200 V supply rails for high-output swing, and the 200 mΩ R_DS(on) minimizes conduction loss. The integrated gate input circuit eliminates the shoot-through risk associated with discrete GaN HEMT gate-driver design, improving amplifier reliability.
おすすめ
BLDC Motor Drive Inverter
In 230/400 V AC-fed BLDC and PMSM motor drive inverters rated 1-3 kW, the CGD65B200S2 provides the 650 V breakdown margin required at the rectified DC bus and supports PWM frequencies up to 100 kHz for reduced motor audible noise. Its low R_DS(on) of 200 mΩ keeps conduction loss manageable at the high di/dt switching rates typical of field-oriented control (FOC) loops. The integrated current-sensing capability, noted by distributor documentation, simplifies in-phase current measurement for sensorless FOC algorithms.
おすすめ
Telecom Rectifier and DC-DC Stage
For 48 V telecom rectifier intermediate bus converters operating from 380 V DC input, the CGD65B200S2's 650 V rating, 200 mΩ R_DS(on), and high-frequency capability enable compact LLC and phase-shift full-bridge topologies at 300-500 kHz. This dramatically shrinks the isolation transformer footprint compared to silicon MOSFET designs at 50-100 kHz. The ICeGaN™ integrated gate input circuit reduces the gate-driver BOM count, which is critical for high-density CRPS (Common Redundant Power Supply) modules targeting 80 PLUS Titanium efficiency.
おすすめ
USB-PD and High-Power Adapter
The CGD65B200S2 supports 100-240 W USB-PD adapters and laptop chargers where its 650 V rating handles universal AC input and its high switching frequency enables 1-2 MHz QR/DCM flyback or active-clamp topologies. This reduces transformer size by 50-60% versus silicon designs at 65-100 kHz, enabling sub-100 W/inch³ power density. The integrated gate input circuit eliminates the need for isolated gate-drive transformers or bootstrap charge pumps typical of first-generation GaN HEMT adapter designs.
おすすめ
おすすめ製品の概要
エンジニアリング参考データ: CGD65B200S2 — 比較、設計ガイダンス、コンプライアンス情報。
選定ガイド
代替品との比較
| パラメータ | この製品 | CGD65B200S2-T13 | CGD65A200S2 | CGD65B200S2-TPD | IGOT65R200D2 | GS-065-200-1-D |
|---|---|---|---|---|---|---|
| Brand | Cambridge GaN Devices | Cambridge GaN Devices | Cambridge GaN Devices | Cambridge GaN Devices | Infineon | GaN Systems |
| Package | 8-PowerVDFN (DFN5x6) | 8-PowerVDFN (DFN5x6) - same | 8-PowerVDFN (DFN5x6) - same | 8-PowerVDFN (DFN5x6) - same | 8-PowerVDFN (DFN5x6) - same | 8-PowerVDFN (DFN5x6) - same |
| Drain-Source Voltage (V_DS) | 650 V | 650 V | 650 V | 650 V | 650 V | 650 V |
| Typical R_DS(on) | 200 mΩ | 200 mΩ | 200 mΩ | 200 mΩ | 200 mΩ | 200 mΩ |
| Gate Technology | ICeGaN™ (integrated) | ICeGaN™ (integrated) | ICeGaN™ (integrated) | ICeGaN™ (integrated) | Infineon CoolGaN | GaN Systems EZDrive |
| Reverse Recovery Charge (Qrr) | 0 nC (GaN HEMT) | 0 nC | 0 nC | 0 nC | 0 nC | 0 nC |
| Reel / Packaging | Tray (base MPN) | 13-inch T&R | Tray | 13-inch T&R (JLCPCB) | T&R | T&R |
| Polarity / Mode | N-Channel, Enhancement (normally-off) | N-Channel, Enhancement | N-Channel, Enhancement | N-Channel, Enhancement | N-Channel, Enhancement | N-Channel, Enhancement |
| RoHS Compliance | Yes | Yes | Yes | Yes | Yes | Yes |
主な差別化要因
- ICeGaN™ integrated gate input circuit eliminates negative V_GS requirement （vs IGOT65R200D2 (Infineon CoolGaN))
- Standard 8-PowerVDFN DFN5x6 footprint （vs GaN Systems GS-065-200-1-D)
- Integrated current sensing capability （vs Discrete silicon super-junction MOSFETs (e.g. Infineon IPL65R200C7))
- Zero reverse-recovery charge enables hard-switched totem-pole PFC （vs Silicon super-junction MOSFETs (e.g. STMicroelectronics STF33N60M2))
設計ノート
Estimated: at 100 kHz hard-switched operation with I_D(RMS) of approximately 5 A in the DC-link leg, total device dissipation is approximately 5 W (3 W conduction + 2 W switching). The 8-PowerVDFN package requires a minimum of 1 square inch of top-side copper pour connected to the exposed drain pad to keep junction-to-ambient thermal resistance (theta_JA) below 50 C/W. For continuous operation above 5 W, attach the device to a small aluminum or ceramic heatsink via thermal interface material. Always cross-reference the datasheet's thermal-resistance curves against your specific PCB layout, as copper thickness and via count dominate the thermal path.
Design the gate-driver loop with minimal area — the gate-source loop inductance should be kept below 5 nH to avoid gate-overshoot and Miller-turn-on events. Use a Kelvin-source connection if the package exposes a dedicated source-sense pin (pin 2 typical for 8-PowerVDFN GaN layouts). Place the gate-driver within 10 mm of the device gate pin, and use a 4-layer PCB with continuous ground plane under the switching node to minimize parasitic inductance. For high-di/dt switching nodes, use stitching vias between top and inner ground planes every 3-5 mm along the high-current path.
Do not exceed the maximum V_DS transient rating of 650 V under any switching condition — GaN HEMTs have very low stored energy in output capacitance but their avalanche rating is significantly lower than silicon MOSFETs. Always include a small RC snubber (typically 10-33 ohm + 100-470 pF) across the device in hard-switched topologies to limit V_DS overshoot below 600 V during turn-off transients. Do not parallel two CGD65B200S2 devices without matched gate resistors, as GaN HEMTs share current poorly due to their positive temperature coefficient of R_DS(on) being weaker than silicon MOSFETs. Use the manufacturer's recommended gate-drive voltage of 12 V (do not exceed 20 V V_GS absolute maximum).
Keep the high-frequency switching node (drain) loop area below 0.5 square centimeters by routing return current directly through the inner ground plane beneath the device. The 8-PowerVDFN exposed pad must be soldered to a land pattern matching the manufacturer's recommended footprint (approximately 4x5 mm pad area with multiple thermal vias to the inner ground plane). Use 0.2 mm trace/space design rules on the gate-drive side and 0.3 mm minimum on the high-current drain-source side. According to Cambridge GaN Devices documentation, the ICeGaN™ gate input circuit tolerates higher parasitic inductance than discrete GaN HEMTs, but layout discipline still materially improves EMI margin.
コンプライアンス情報
RoHS compliance confirmed via DigiKey JLCPCB distributor listings; AEC-Q100 not applicable for industrial/consumer GaN HEMT positioning; lead-free reflow-compatible per JEDEC J-STD-020
