CS5561-ISZ - 24-bit Sigma-Delta ADC | Cirrus Logic
部品番号: CS5561-ISZ ✓ 生産中| 数量 | 単価 | 小計 |
|---|---|---|
| 1 | $18.5 | $18.50 |
| 10 | $16.2 | $162.00 |
| 100 | $13.85 | $1,385.00 |
| 500 | $11.95 | $5,975.00 |
| 1,000 | $10.4 | $10,400.00 |
CS5561-ISZ 概要
An ADC (Analog-to-Digital Converter) is an integrated circuit that converts continuous analog voltage signals into discrete digital codes. The sigma-delta (also written as delta-sigma or SD) modulator topology is a category of oversampling converters that trades raw speed for very high resolution, excellent noise rejection, and tight linearity. In the broader system taxonomy, the CS5561-ISZ sits as: ADC -> data converter -> data acquisition IC -> signal chain IC -> semiconductor. Sigma-delta ADCs excel in low-frequency precision applications such as weigh scales, temperature monitoring, strain-gauge bridges, and audio band processing where noise shaping rejects out-of-band interference.
Key features of the CS5561-ISZ include 24-bit resolution, single-channel (1-input) input mux configuration, sigma-delta modulator, and SSOP-24 surface-mount packaging. According to the Cirrus Logic CS5561 datasheet, this family is classified as a high-throughput delta-sigma A/D converter family, targeting measurement systems that demand high dynamic range. The interface is typically an SPI/serial digital interface, common to the CS556x series.
Typical applications include precision weigh scales and load-cell readouts, industrial process automation, temperature and strain measurement, data acquisition front-ends, and laboratory instrumentation. The wide input range and high effective number of bits (ENOB) also support medical monitoring and transducer conditioning.
When designing with this part, the analog front-end (signal conditioning, reference, and PGA) is critical. Provide a low-noise, low-drift voltage reference and adequate decoupling on AVDD and DVDD rails. Route analog and digital grounds separately and join at a single point. Allow adequate warm-up time before calibration, as the modulator settles within hundreds of milliseconds.
ドロップイン代替品: CS5561-ISZ — 同一パッケージでピン互換。PCBの作り直しが必要な異なるパッケージの部品は除外されています。
このシリーズのバリエーション
同一シリーズでドロップイン互換のモデル: CS5561-ISZ (同一形状・フットプリント) — 相違点: Interface, Manufacturer, Package, Part Number, RoHS Status.
クイック比較ツール — 並列比較する代替部品を選択:
CS5561-IS
✅ ドロップイン📋 参考代替品(カタログ未掲載)
CS5561-ISZR
✅ ドロップイン📋 参考代替品(カタログ未掲載)
CS5561-ISZ 最大定格&電気的特性
| Manufacturer | Cirrus Logic |
| Part Number | CS5561-ISZ |
| 分解能 | 24 bit |
| Number of Inputs | 1 |
| Architecture | Sigma-Delta |
| パッケージ | SSOP-24 |
| 実装タイプ | Surface Mount |
| Input Type | Single-ended / Differential (verify datasheet) |
| インターフェース | Serial (SPI/QSPI/MICROWIRE compatible - verify) |
| RoHS ステータス | Compliant (verify) |
CS5561-ISZ ピン構成
| ピン 1 | [DATA_NEEDED] — Pin function per datasheet - verify against CS5561 datasheet pinout diagram |
| ピン 2 | [DATA_NEEDED] — Pin function per datasheet |
| ピン 3 | [DATA_NEEDED] — Pin function per datasheet |
| ピン 4 | [DATA_NEEDED] — Pin function per datasheet |
| ピン 5 | [DATA_NEEDED] — Pin function per datasheet |
| ピン 6 | [DATA_NEEDED] — Pin function per datasheet |
| ピン 7 | [DATA_NEEDED] — Pin function per datasheet |
| ピン 8 | [DATA_NEEDED] — Pin function per datasheet |
| ピン 9 | [DATA_NEEDED] — Pin function per datasheet |
| ピン 10 | [DATA_NEEDED] — Pin function per datasheet |
| ピン 11 | [DATA_NEEDED] — Pin function per datasheet |
| ピン 12 | [DATA_NEEDED] — Pin function per datasheet |
| ピン 13 | [DATA_NEEDED] — Pin function per datasheet |
| ピン 14 | [DATA_NEEDED] — Pin function per datasheet |
| ピン 15 | [DATA_NEEDED] — Pin function per datasheet |
| ピン 16 | [DATA_NEEDED] — Pin function per datasheet |
| ピン 17 | [DATA_NEEDED] — Pin function per datasheet |
| ピン 18 | [DATA_NEEDED] — Pin function per datasheet |
| ピン 19 | [DATA_NEEDED] — Pin function per datasheet |
| ピン 20 | [DATA_NEEDED] — Pin function per datasheet |
| ピン 21 | [DATA_NEEDED] — Pin function per datasheet |
| ピン 22 | [DATA_NEEDED] — Pin function per datasheet |
| ピン 23 | [DATA_NEEDED] — Pin function per datasheet |
| ピン 24 | [DATA_NEEDED] — Pin function per datasheet |
主な用途
CS5561-ISZ の用途: 6 件s: Precision Weigh Scale / Load Cell Readout, Industrial Process Control / Data Acquisition, Temperature Measurement Front End, Medical Monitoring / Patient Measurement, Strain Gauge / Bridge Sensor Conditioning, Laboratory Test & Measurement Instrumentation.
Precision Weigh Scale / Load Cell Readout
The CS5561-ISZ is well suited to precision weigh-scale and load-cell readouts because its 24-bit sigma-delta architecture provides the dynamic range needed to resolve microvolt-level bridge signals. The single-channel input configuration simplifies the analog front-end by dedicating one channel to the differential load-cell bridge, eliminating channel switching noise. With a low-noise reference and proper guarding, the converter can deliver effective number of bits (ENOB) in the high 20s, suitable for commercial weighing scales and laboratory balances. Designers typically pair it with an instrumentation-amp front end and a low-noise LDO on AVDD.
おすすめ
Industrial Process Control / Data Acquisition
In industrial process control the CS5561-ISZ handles single-channel high-precision monitoring of parameters like pressure, flow, or temperature with high dynamic range. The SSOP-24 surface-mount package mounts directly on a backplane or 4-20 mA loop card, keeping board space compact. The sigma-delta topology inherently rejects 50/60 Hz line-frequency noise when the data rate is set accordingly, making it tolerant of electrically noisy factory floors. Use optical or transformer isolation on the SPI bus to protect the digital side from ground loops.
おすすめ
Temperature Measurement Front End
Thermocouple and RTD temperature measurement systems depend on a 24-bit ADC to resolve sub-millikelvin temperature differences with cold-junction compensation. The CS5561-ISZ's single-channel input accommodates a single high-precision sensor chain - typically a thermocouple amplifier front end followed by the ADC's differential inputs. Low drift of the front-end reference sets achievable system accuracy, and the sigma-delta architecture's intrinsic noise rejection allows the data rate to be tuned for optimal line-noise rejection in heater-control installations.
おすすめ
Medical Monitoring / Patient Measurement
Medical monitoring instruments that measure low-level biopotential signals (ECG, EEG, EMG, pulse oximetry front-ends, body composition analyzers) benefit from the high dynamic range of the CS5561-ISZ. The 24-bit sigma-delta converter resolves signals in the microvolt range while rejecting 50/60 Hz power-line interference, critical for cardiac and neurological monitoring. The single-input channel configuration simplifies patient-isolation circuitry and aligns with dedicated-channel medical equipment architectures.
おすすめ
Strain Gauge / Bridge Sensor Conditioning
Strain-gauge and bridge-based pressure or torque sensors demand a 24-bit ADC to resolve the millivolt-level differential outputs of the Wheatstone bridge. The CS5561-ISZ accepts a single differential bridge input and outputs serial conversion data through its SPI-compatible interface, ready for direct hand-off to a microcontroller or DSP. The architecture's digital post-processing and noise shaping allow software calibration of offset and span, eliminating many analog trim pots and reducing per-unit calibration cost.
おすすめ
Laboratory Test & Measurement Instrumentation
Bench-top multimeters, picoammeters, and precision source-measure units rely on 24-bit ADCs in the signal chain to achieve the 6.5 to 7.5-digit resolution demanded by metrology applications. The CS5561-ISZ provides a compact SSOP-24 footprint suitable for integration into handheld or bench instrument form factors. Its single-channel low-noise input accommodates direct connection to high-impedance probes, while its serial interface simplifies isolation barrier implementation necessary for floating measurements on high-voltage test points.
おすすめ
おすすめ製品の概要
エンジニアリング参考データ: CS5561-ISZ — 比較、設計ガイダンス、コンプライアンス情報。
選定ガイド
代替品との比較
| パラメータ | この製品 | CS5561-IS | CS5561-ISZR | AD7195BRUZ | ADS131A04IPBR |
|---|---|---|---|---|---|
| Brand | Cirrus Logic | Cirrus Logic | Cirrus Logic | Analog Devices | Texas Instruments |
| Package | SSOP-24 | SSOP-24 (same) | SSOP-24 (same) | TSSOP-24 (different - cross-package) | TQFP-32 (different - cross-package) |
| Resolution | 24-bit | 24-bit | 24-bit | 24-bit | 24-bit |
| Architecture | Sigma-Delta | Sigma-Delta | Sigma-Delta | Sigma-Delta | Sigma-Delta |
| Number of Input Channels | 1 | 1 | 1 | Up to 4 differential | 4 |
| Digital Interface | Serial (SPI compatible) | Serial (SPI compatible) | Serial (SPI compatible) | SPI/QSPI/MICROWIRE/DSP-compatible | SPI |
| Typical 1kU Price | $10.40 (2026-10-13) | Similar (slight grade premium) | Similar | $9-12 typical | $6-9 typical |
| RoHS Compliance | Compliant (verify) | Compliant | Compliant | Compliant | Compliant |
主な差別化要因
- Single-channel sigma-delta architecture optimized for dedicated transducer measurement (vs AD7195BRUZ)
- Cirrus Logic heritage and CS556x family pinout compatibility (vs ADS131A04IPBR)
- Compact SSOP-24 footprint for space-constrained instrumentation (vs ADS131A04IPBR (TQFP-32))
設計ノート
Provide separate, well-decoupled analog (AVDD) and digital (DVDD) supply rails to the CS5561-ISZ. Use a low-noise LDO (such as an ADP151 or LP2985) for AVDD rather than a switching regulator. Place 10 uF tantalum + 0.1 uF ceramic bypass capacitors directly at each supply pin. Avoid sharing AVDD with digital loads, as coupling through the substrate will degrade SNR. Estimated: for 1 LSB of resolution = VREF / 2^24, even microvolts of regulator noise are significant.
A common pitfall when designing with the CS5561-ISZ is to omit a precision voltage reference - the ADC's absolute accuracy is bounded by the reference drift. Use an external low-noise, low-drift reference such as ADR4550 or REF5025 instead of relying on internal reference. Allow at least 500 ms of warm-up time after power-up before initiating calibration or taking measurements.
Separate analog and digital ground planes with a single-point connection under the ADC's GND pin to avoid ground loops. Route analog input traces as differential pairs with ground guard, and keep digital SPI traces physically separated from analog input traces by at least 3 mm. Place input RC anti-aliasing filters as close to the ADC inputs as possible to maximize common-mode rejection.
The SPI clock signal to the CS5561-ISZ must be clean and avoid reflections on long PCB traces. Place a 33 ohm series damping resistor near the source if the SPI bus exceeds 50 mm. Keep the SPI bus clock speed below the maximum rating shown in the datasheet; overspeeding causes bit shift errors and corrupted conversion data. Estimated: at 50 MHz SPI clock with 50 mm trace, propagation delay is approximately 0.4 ns per 100 mm.
コンプライアンス情報
RoHS and REACH compliance attested by Cirrus Logic product page; AEC-Q100 not applicable for this data converter grade.