DSPIC33FJ06GS101-E/SO - 16-bit DSC 40MIPS 6KB Flash | Microchip
部品番号: DSPIC33FJ06GS101-E/SO ✓ 生産中| 数量 | 単価 | 小計 |
|---|---|---|
| 1 | $4.6 | $4.60 |
| 10 | $4.14 | $41.40 |
| 100 | $3.69 | $369.00 |
| 500 | $3.32 | $1,660.00 |
| 1,000 | $2.98 | $2,980.00 |
DSPIC33FJ06GS101-E/SO 概要
A digital signal controller combines the computational core of a 16-bit microcontroller with the numeric throughput of a DSP engine. Within the power-management hierarchy, the DSC sits above basic MCUs and below standalone DSPs, executing closed-loop control math (PID, compensation filters) while integrating converters, timers, and analog peripherals on one chip - the ideal class for digitally controlled switch-mode power supplies.
Key features include a dsPIC33F core with DSP multiply-accumulate instructions running at 40 MIPS, up to three 16-bit timers (pairable into one 32-bit timer), two input capture and two output compare channels with glitchless 16-bit PWM, and a 6-channel 10-bit ADC targeted at power-conversion feedback loops. The device supports I2C, SPI, and UART/USART serial interfaces for system communication.
The GS family is explicitly architected for digital power: high-resolution PWM modules, fast analog comparators, and ADC sampling synchronized to the PWM period enable multi-loop control of converters at switching frequencies well into the hundreds of kilohertz. The 6 KB FLASH accommodates compact control firmware typical of single- or dual-loop converter designs.
Typical applications include AC-to-DC converters, DC-to-DC converters, power factor correction (PFC) stages, uninterruptible power supplies (UPS), LED drivers, and battery chargers - all fields Microchip lists for the GS family in its SMPS datasheet documentation.
Design consideration: the part operates from a 3.0 V to 3.6 V supply, so level-shift the PWM outputs when driving gate drivers referenced to different rails, and pair PGECx/PGEDx pins correctly during ICSP programming.
This page adds value beyond the Microchip datasheet by aggregating distributor pricing context, drop-in alternatives, comparison tables, and practical design notes in one structured reference.
ドロップイン代替品: DSPIC33FJ06GS101-E/SO — 同一パッケージでピン互換。PCBの作り直しが必要な異なるパッケージの部品は除外されています。
このシリーズのバリエーション
同一シリーズでドロップイン互換のモデル: DSPIC33FJ06GS101-E/SO （同一形状・フットプリント） — 相違点: Operating Temperature, ADC Resolution, Package, Programming Interface.
クイック比較ツール — 並列比較する代替部品を選択:
DSPIC33FJ06GS101-I/SO
✅ ドロップイン📋 参考代替品（カタログ未掲載）
DSPIC33FJ06GS101AT-I/SO
✅ ドロップイン✓ 在庫あり
$3.95 / 個
データシートを見る →DSPIC33FJ06GS101A-E/SO
✅ ドロップイン ⚠️ 仕様未検証📋 参考代替品（カタログ未掲載）
DSPIC33FJ06GS101-E/SO 最大定格＆電気的特性
| Core | dsPIC33F 16-bit DSC |
| Performance | 40 MIPS |
| Program Memory (FLASH) | 6 KB |
| RAM | 256 bytes |
| 電源電圧 | 3.0 V to 3.6 V |
| Internal Clock Speed | 60 MHz (Fcy 40 MIPS) |
| ADC Resolution | 10-bit |
| ADC Channels | 6 |
| Timers | Up to three 16-bit timers (pairable to one 32-bit) |
| Input Capture Channels | Up to 2 |
| Output Compare / PWM Channels | Up to 2 (16-bit glitchless PWM) |
| Communication Interfaces | I2C, SPI, UART/USART |
| 動作温度 | -40C to +125C (E grade) |
| パッケージ | 18-pin SOIC |
| 実装タイプ | Surface Mount |
| Programming Interface | ICSP (PGECx/PGEDx pairs) |
| ライフサイクル状態 | Active (In Production) |
DSPIC33FJ06GS101-E/SO 18-pin soic ピン配置ガイド
DSPIC33FJ06GS101-E/SO (18-pin soic パッケージ) のピン配置。 このデジタルICには、GPIO、通信インターフェース (UART、SPI、I2C)、および電源ピンが含まれています。代替ピン機能と設定オプションについては、メーカーのデータシートを参照してください。組み込みシステム設計とPCBレイアウトに不可欠です。
詳細なピン配置データはありません: DSPIC33FJ06GS101-E/SO.
詳細は データシート をご参照ください。
主な用途
DSPIC33FJ06GS101-E/SO の用途: 6 件s: AC-to-DC Converters, DC-to-DC Converters, Power Factor Correction (PFC), Uninterruptible Power Supplies (UPS), LED Drivers and Lighting Power, Battery Chargers.
AC-to-DC Converters
The DSPIC33FJ06GS101-E/SO fits AC-to-DC converter control because its high-speed PWM, synchronized 10-bit ADC, and DSP math execute the outer voltage loop and inner current loop deterministically at 40 MIPS. Microchip's GS-family datasheet explicitly lists AC-to-DC converters as a target application for these SMPS DSCs. In a typical flyback or forward converter, the PWM module drives the primary switch while the ADC samples the output and current-shunt signals synchronized to the PWM period, minimizing control latency and switching noise in the feedback. The 6 KB FLASH holds the compensator, protection state machine, and soft-start logic. Design consideration: the 3.0 V to 3.6 V supply requires a 3.3 V-compatible gate driver or level shifter between the PWM output and the power MOSFET.
おすすめ
DC-to-DC Converters
For DC-to-DC converters - including quarter-brick intermediate-bus modules referenced in Microchip's GS-family material - the DSPIC33FJ06GS101-E/SO provides the precise, glitchless 16-bit PWM and fast feedback sampling needed for stable closed-loop operation at high switching frequency. The two output-compare channels support single or dual compare modes, and the input-capture channels can monitor switch timing. The ADC's 6 channels cover output voltage, input voltage, and current-sense feedback, while DSP multiply-accumulate instructions run PID or Type-III compensators without additional hardware. The extended -40C to +125C E grade suits sealed power modules with high internal ambient temperatures. Firmware footprint is modest: 6 KB FLASH accommodates the control loop, protection, and PMBus-lite telemetry in typical single-output designs.
おすすめ
Power Factor Correction (PFC)
Power factor correction stages demand fast current-loop control, and the DSPIC33FJ06GS101-E/SO addresses this with its high-speed PWM, analog comparators, and synchronized ADC sampling - a peripheral set Microchip designed specifically for PFC in the GS family. In a boost-PFC topology, the controller shapes the input current to follow the rectified line voltage: the ADC samples inductor current each switching cycle, and the 40 MIPS DSP core updates the PWM duty with average-current-mode control. Glitchless PWM updates prevent duty-step artifacts that distort the current waveform and degrade THD. The 6-channel, 10-bit ADC covers current sense, bus voltage, and line-voltage inputs. The extended temperature grade tolerates the elevated ambient inside sealed AC-line power supplies.
おすすめ
Uninterruptible Power Supplies (UPS)
The GS-family datasheet names UPS as a primary application, and the DSPIC33FJ06GS101-E/SO supports inverter, charger, and transfer-control subfunctions in compact UPS designs. The high-speed PWM synthesizes the inverter sine-wave reference through a modulated carrier, while the 10-bit ADC monitors battery voltage, output voltage, and current simultaneously across its 6 channels. DSP instructions execute the sine-wave table lookup and closed-loop output regulation at 40 MIPS, keeping total harmonic distortion low without floating-point hardware. The E-grade temperature rating of -40C to +125C is valuable in UPS enclosures where battery charging heat raises ambient temperature. For full single-chip UPS control with more loops, pair with or migrate to higher-memory GSX family members sharing the same architecture.
おすすめ
LED Drivers and Lighting Power
Digitally controlled LED drivers benefit from the DSPIC33FJ06GS101-E/SO's combination of precise PWM dimming resolution and closed-loop current regulation. The 16-bit glitchless PWM channels provide smooth dimming without visible steps, while the 10-bit ADC monitors LED current via a shunt resistor each switching cycle, letting the 40 MIPS core regulate current despite forward-voltage variation with temperature. Microchip's GS-family documentation targets this class of digital power conversion directly. The extended -40C to +125C operating range suits LED driver enclosures, where self-heating commonly pushes ambient above 85C - a scenario where the industrial -I grade would be marginal and the E grade provides headroom. Firmware for constant-current control, dimming curves, and fault protection fits comfortably in 6 KB FLASH.
おすすめ
Battery Chargers
Battery charging profiles - constant current, constant voltage, and termination detection - map naturally onto the DSPIC33FJ06GS101-E/SO's peripherals. The high-speed PWM controls the buck or flyback charging stage, the 6-channel 10-bit ADC tracks battery voltage, charge current, and pack temperature, and the 40 MIPS DSP core executes the state-machine logic and compensation math in real time. The E-grade -40C to +125C range covers automotive and outdoor charging installations where the industrial grade is insufficient. Microchip's GS-family application space explicitly includes charger-type power conversion. Design note: charge-current sensing typically uses a low-side shunt into one ADC channel; synchronize sampling to PWM off-times via the ADC trigger features to avoid reading switching noise. Fault protection (over-voltage, over-temperature) runs as an interrupt-driven fast loop.
おすすめ
おすすめ製品の概要
エンジニアリング参考データ: DSPIC33FJ06GS101-E/SO — 比較、設計ガイダンス、コンプライアンス情報。
選定ガイド
代替品との比較
| パラメータ | この製品 | DSPIC33FJ06GS101-I/SO | DSPIC33FJ06GS101AT-I/SO | DSPIC33FJ06GS101A-E/SO |
|---|---|---|---|---|
| Package | 18-pin SOIC | 18-pin SOIC - same | 18-pin SOIC - same | 18-pin SOIC - same |
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Performance | 40 MIPS | 40 MIPS | 40 MIPS | 40 MIPS |
| FLASH Program Memory | 6 KB | 6 KB | 6 KB | 6 KB |
| RAM | 256 bytes | 256 bytes | 256 bytes | 256 bytes |
| Operating Temperature | -40C to +125C (E grade) | -40C to +85C (I grade) | -40C to +85C (I grade) | -40C to +125C (E grade) |
| Silicon Revision | Base silicon | Base silicon | A-step (errata fixes) | A-step (errata fixes) |
| Supply Voltage | 3.0 V to 3.6 V | 3.0 V to 3.6 V | 3.0 V to 3.6 V | 3.0 V to 3.6 V |
主な差別化要因
- Extended -40C to +125C temperature rating （vs DSPIC33FJ06GS101-I/SO)
- A-step silicon errata resolution available （vs DSPIC33FJ06GS101-I/SO)
- Purpose-built digital-power peripheral set （vs General-purpose 16-bit MCUs)
設計ノート
The DSPIC33FJ06GS101-E/SO requires a 3.0 V to 3.6 V supply. Place a 0.1 uF ceramic decoupling capacitor at each VDD pin, as close to the pin as possible, plus one bulk 4.7 uF to 10 uF capacitor per the dsPIC33FJ06GS101 datasheet (70000318g) power connections section. In digital power applications the DSC often shares a rail with noisy converter circuitry - use an RC or LC filter or a small LDO to isolate the controller supply from switching ripple to protect ADC accuracy.
Route PWM outputs to the gate driver with short, direct traces and a series resistor (typically 10-33 ohm, estimated value - tune on the bench) to damp ringing. Keep the analog feedback traces (ADC inputs) away from PWM and gate-drive nets, and use a local analog ground island referenced at a single point to the power ground. Synchronize ADC sampling to PWM off-times using the ADC trigger features to sample current when switching noise is lowest.
Programming requires a matched PGECx/PGEDx pair: if ICSPCLK uses PGEC2, ICSPDAT must use PGED2 - mismatched pairs will fail to connect, per Microchip ICSP documentation. Do not leave MCLR floating; use the standard 10 k pull-up (estimated typical value) and ICSP series resistor. Also verify the silicon errata for your silicon revision: stepping to the A-revision (DSPIC33FJ06GS101AT-I/SO) resolves documented base-silicon errata items.
コンプライアンス情報
Compliance status not stated in the provided web data. The -E temperature grade suits harsh environments, but the part is not listed as AEC-Q100 qualified; verify RoHS/REACH certificates on Microchip's product page before specifying in regulated markets.
