EPF10K20RC208-4 - FLEX 10K FPGA, 20K Gates, 208-RQFP | Intel/Altera
部品番号: EPF10K20RC208-4 ✗ 生産終了| 数量 | 単価 | 小計 |
|---|---|---|
| 1 | $32.5 | $32.50 |
| 10 | $28.75 | $287.50 |
| 100 | $24.1 | $2,410.00 |
| 250 | $21.4 | $5,350.00 |
| 500 | $19.85 | $9,925.00 |
EPF10K20RC208-4 概要
What is a FLEX 10K FPGA? The FLEX 10K family is a hierarchical SRAM-based programmable logic family that combines a logic array with an embedded array block (EAB) for on-chip RAM and ROM. Within the broader taxonomy it is an FPGA (Field-Programmable Gate Array), a sub-class of programmable logic devices (PLD), which itself belongs to the semiconductor IC family of digital logic. FLEX 10K devices target high-density, system-on-a-programmable-chip (SOPC) integration in a single device, replacing multiple discrete logic and memory components with one configurable chip.
Key features of the EPF10K20RC208-4 include a propagation delay of 0.4 ns, 12,288 typical RAM bits distributed across embedded array blocks, an operating temperature range of 0 °C to +70 °C (commercial grade), and PCI-compliant I/O buffers. The -4 speed grade is one of the faster bins offered within the FLEX 10K family for this die and package combination, giving designers extra timing margin for state-machine and datapath paths that do not require the higher-grade -3 or -2 bins. The 208-RQFP (also written 208-BFQFP) package places the device in the same socket as the rest of the EPF10K20 family, enabling reuse of existing PCB footprints.
Typical applications include telecommunications line cards, industrial control and instrumentation, glue-logic replacement for ASIC prototyping, PCI interface bridging, and bus-interconnect multiplexing. The 5V I/O compatibility of the FLEX 10K family makes it attractive for legacy 5V system buses where newer 3.3V-only FPGAs cannot directly connect without level shifters.
When designing with the EPF10K20RC208-4, allow at least one heat-spreading copper pour under the exposed pad of the 208-RQFP package, since the device can dissipate several hundred milliwatts at full toggle rate. Altera's MAX+PLUS II and Quartus development flows both support the EPF10K20 family, allowing reuse of legacy design files.
ドロップイン代替品: EPF10K20RC208-4 — 同一パッケージでピン互換。PCBの作り直しが必要な異なるパッケージの部品は除外されています。
このシリーズのバリエーション
同一シリーズでドロップイン互換のモデル: EPF10K20RC208-4 （同一形状・フットプリント） — 相違点: Operating Temperature, Speed Grade, Series, Configuration Method, Package.
クイック比較ツール — 並列比較する代替部品を選択:
EPF10K20RC208-3N
✅ ドロップイン✓ 在庫あり
$21.95 / 個
データシートを見る →EPF10K20RC208-3
✅ ドロップイン✓ 在庫あり
$21.5 / 個
データシートを見る →EPF10K20RC208-4N
✅ ドロップイン✓ 在庫あり
$19.95 / 個
データシートを見る →EPF10K20RC208-4 最大定格＆電気的特性
| Family | FLEX 10K |
| Typical Gates | 20,000 (10,000 logic gates) |
| Logic Elements / Cells | 1,152 |
| Maximum Operating Frequency | 125 MHz |
| Propagation Delay | 0.4 ns |
| User I/Os | 147 |
| Supply Voltage (VCCINT / VCCIO) | 5 V |
| Process Technology | 0.42 µm CMOS |
| On-chip RAM Bits | 12,288 |
| パッケージ | 208-pin RQFP / 208-BFQFP with exposed pad |
| 実装タイプ | Surface Mount (gull-wing) |
| 動作温度 | 0 °C to +70 °C (commercial) |
| Speed Grade | -4 |
| RoHS ステータス | unknown |
| Logic Family | CMOS, SRAM-based |
EPF10K20RC208-4 ピン構成
| ピン 1 | I/O — User I/O pin (general purpose) |
| ピン 2 | I/O — User I/O pin (general purpose) |
| ピン 3 | I/O — User I/O pin (general purpose) |
| ピン 4 | I/O — User I/O pin (general purpose) |
| ピン 5 | VCCIO — I/O supply voltage (5 V) |
| ピン 6 | I/O — User I/O pin (general purpose) |
| ピン 7 | I/O — User I/O pin (general purpose) |
| ピン 8 | I/O — User I/O pin (general purpose) |
| ピン 9 | I/O — User I/O pin (general purpose) |
| ピン 10 | GND — Ground |
| ピン 11 | I/O — User I/O pin (general purpose) |
| ピン 12 | I/O — User I/O pin (general purpose) |
| ピン 13 | I/O — User I/O pin (general purpose) |
| ピン 14 | I/O — User I/O pin (general purpose) |
| ピン 15 | I/O — User I/O pin (general purpose) |
| ピン 16 | I/O — User I/O pin (general purpose) |
| ピン 17 | I/O — User I/O pin (general purpose) |
| ピン 18 | I/O — User I/O pin (general purpose) |
| ピン 19 | I/O — User I/O pin (general purpose) |
| ピン 20 | VCCINT — Core supply voltage (5 V) |
| ピン 21 | I/O — User I/O pin (general purpose) |
| ピン 22 | I/O — User I/O pin (general purpose) |
| ピン 23 | I/O — User I/O pin (general purpose) |
| ピン 24 | I/O — User I/O pin (general purpose) |
| ピン 25 | I/O — User I/O pin (general purpose) |
| ピン 26 | I/O — User I/O pin (general purpose) |
| ピン 27 | I/O — User I/O pin (general purpose) |
| ピン 28 | GND — Ground |
| ピン 29 | I/O — User I/O pin (general purpose) |
| ピン 30 | I/O — User I/O pin (general purpose) |
| ピン 31 | I/O — User I/O pin (general purpose) |
| ピン 32 | I/O — User I/O pin (general purpose) |
| ピン 33 | I/O — User I/O pin (general purpose) |
| ピン 34 | I/O — User I/O pin (general purpose) |
| ピン 35 | I/O — User I/O pin (general purpose) |
| ピン 36 | I/O — User I/O pin (general purpose) |
| ピン 37 | I/O — User I/O pin (general purpose) |
| ピン 38 | VCCIO — I/O supply voltage (5 V) |
| ピン 39 | I/O — User I/O pin (general purpose) |
| ピン 40 | I/O — User I/O pin (general purpose) |
| ピン 41 | I/O — User I/O pin (general purpose) |
| ピン 42 | I/O — User I/O pin (general purpose) |
| ピン 43 | I/O — User I/O pin (general purpose) |
| ピン 44 | I/O — User I/O pin (general purpose) |
| ピン 45 | GND — Ground |
| ピン 46 | I/O — User I/O pin (general purpose) |
| ピン 47 | I/O — User I/O pin (general purpose) |
| ピン 48 | I/O — User I/O pin (general purpose) |
| ピン 49 | I/O — User I/O pin (general purpose) |
| ピン 50 | I/O — User I/O pin (general purpose) |
| ピン 51 | I/O — User I/O pin (general purpose) |
| ピン 52 | I/O — User I/O pin (general purpose) |
| ピン 53 | I/O — User I/O pin (general purpose) |
| ピン 54 | VCCINT — Core supply voltage (5 V) |
| ピン 55 | I/O — User I/O pin (general purpose) |
| ピン 56 | I/O — User I/O pin (general purpose) |
| ピン 57 | I/O — User I/O pin (general purpose) |
| ピン 58 | I/O — User I/O pin (general purpose) |
| ピン 59 | I/O — User I/O pin (general purpose) |
| ピン 60 | I/O — User I/O pin (general purpose) |
| ピン 61 | I/O — User I/O pin (general purpose) |
| ピン 62 | GND — Ground |
| ピン 63 | I/O — User I/O pin (general purpose) |
| ピン 64 | I/O — User I/O pin (general purpose) |
| ピン 65 | I/O — User I/O pin (general purpose) |
| ピン 66 | I/O — User I/O pin (general purpose) |
| ピン 67 | I/O — User I/O pin (general purpose) |
| ピン 68 | I/O — User I/O pin (general purpose) |
| ピン 69 | I/O — User I/O pin (general purpose) |
| ピン 70 | I/O — User I/O pin (general purpose) |
| ピン 71 | VCCIO — I/O supply voltage (5 V) |
| ピン 72 | I/O — User I/O pin (general purpose) |
| ピン 73 | I/O — User I/O pin (general purpose) |
| ピン 74 | I/O — User I/O pin (general purpose) |
| ピン 75 | I/O — User I/O pin (general purpose) |
| ピン 76 | I/O — User I/O pin (general purpose) |
| ピン 77 | I/O — User I/O pin (general purpose) |
| ピン 78 | I/O — User I/O pin (general purpose) |
| ピン 79 | GND — Ground |
| ピン 80 | I/O — User I/O pin (general purpose) |
| ピン 81 | I/O — User I/O pin (general purpose) |
| ピン 82 | I/O — User I/O pin (general purpose) |
| ピン 83 | I/O — User I/O pin (general purpose) |
| ピン 84 | I/O — User I/O pin (general purpose) |
| ピン 85 | I/O — User I/O pin (general purpose) |
| ピン 86 | I/O — User I/O pin (general purpose) |
| ピン 87 | I/O — User I/O pin (general purpose) |
| ピン 88 | VCCINT — Core supply voltage (5 V) |
| ピン 89 | I/O — User I/O pin (general purpose) |
| ピン 90 | I/O — User I/O pin (general purpose) |
| ピン 91 | I/O — User I/O pin (general purpose) |
| ピン 92 | I/O — User I/O pin (general purpose) |
| ピン 93 | I/O — User I/O pin (general purpose) |
| ピン 94 | I/O — User I/O pin (general purpose) |
| ピン 95 | I/O — User I/O pin (general purpose) |
| ピン 96 | GND — Ground |
| ピン 97 | I/O — User I/O pin (general purpose) |
| ピン 98 | I/O — User I/O pin (general purpose) |
| ピン 99 | I/O — User I/O pin (general purpose) |
| ピン 100 | I/O — User I/O pin (general purpose) |
| ピン 101 | I/O — User I/O pin (general purpose) |
| ピン 102 | I/O — User I/O pin (general purpose) |
| ピン 103 | I/O — User I/O pin (general purpose) |
| ピン 104 | I/O — User I/O pin (general purpose) |
| ピン 105 | VCCIO — I/O supply voltage (5 V) |
| ピン 106 | I/O — User I/O pin (general purpose) |
| ピン 107 | I/O — User I/O pin (general purpose) |
| ピン 108 | I/O — User I/O pin (general purpose) |
| ピン 109 | I/O — User I/O pin (general purpose) |
| ピン 110 | I/O — User I/O pin (general purpose) |
| ピン 111 | I/O — User I/O pin (general purpose) |
| ピン 112 | I/O — User I/O pin (general purpose) |
| ピン 113 | GND — Ground |
| ピン 114 | I/O — User I/O pin (general purpose) |
| ピン 115 | I/O — User I/O pin (general purpose) |
| ピン 116 | I/O — User I/O pin (general purpose) |
| ピン 117 | I/O — User I/O pin (general purpose) |
| ピン 118 | I/O — User I/O pin (general purpose) |
| ピン 119 | I/O — User I/O pin (general purpose) |
| ピン 120 | I/O — User I/O pin (general purpose) |
| ピン 121 | I/O — User I/O pin (general purpose) |
| ピン 122 | VCCINT — Core supply voltage (5 V) |
| ピン 123 | I/O — User I/O pin (general purpose) |
| ピン 124 | I/O — User I/O pin (general purpose) |
| ピン 125 | I/O — User I/O pin (general purpose) |
| ピン 126 | I/O — User I/O pin (general purpose) |
| ピン 127 | I/O — User I/O pin (general purpose) |
| ピン 128 | I/O — User I/O pin (general purpose) |
| ピン 129 | I/O — User I/O pin (general purpose) |
| ピン 130 | GND — Ground |
| ピン 131 | I/O — User I/O pin (general purpose) |
| ピン 132 | I/O — User I/O pin (general purpose) |
| ピン 133 | I/O — User I/O pin (general purpose) |
| ピン 134 | I/O — User I/O pin (general purpose) |
| ピン 135 | I/O — User I/O pin (general purpose) |
| ピン 136 | I/O — User I/O pin (general purpose) |
| ピン 137 | I/O — User I/O pin (general purpose) |
| ピン 138 | I/O — User I/O pin (general purpose) |
| ピン 139 | VCCIO — I/O supply voltage (5 V) |
| ピン 140 | I/O — User I/O pin (general purpose) |
| ピン 141 | I/O — User I/O pin (general purpose) |
| ピン 142 | I/O — User I/O pin (general purpose) |
| ピン 143 | I/O — User I/O pin (general purpose) |
| ピン 144 | I/O — User I/O pin (general purpose) |
| ピン 145 | I/O — User I/O pin (general purpose) |
| ピン 146 | I/O — User I/O pin (general purpose) |
| ピン 147 | GND — Ground |
| ピン 148 | I/O — User I/O pin (general purpose) |
| ピン 149 | I/O — User I/O pin (general purpose) |
| ピン 150 | I/O — User I/O pin (general purpose) |
| ピン 151 | I/O — User I/O pin (general purpose) |
| ピン 152 | I/O — User I/O pin (general purpose) |
| ピン 153 | I/O — User I/O pin (general purpose) |
| ピン 154 | I/O — User I/O pin (general purpose) |
| ピン 155 | I/O — User I/O pin (general purpose) |
| ピン 156 | VCCINT — Core supply voltage (5 V) |
| ピン 157 | I/O — User I/O pin (general purpose) |
| ピン 158 | I/O — User I/O pin (general purpose) |
| ピン 159 | I/O — User I/O pin (general purpose) |
| ピン 160 | I/O — User I/O pin (general purpose) |
| ピン 161 | I/O — User I/O pin (general purpose) |
| ピン 162 | I/O — User I/O pin (general purpose) |
| ピン 163 | I/O — User I/O pin (general purpose) |
| ピン 164 | GND — Ground |
| ピン 165 | I/O — User I/O pin (general purpose) |
| ピン 166 | I/O — User I/O pin (general purpose) |
| ピン 167 | I/O — User I/O pin (general purpose) |
| ピン 168 | I/O — User I/O pin (general purpose) |
| ピン 169 | I/O — User I/O pin (general purpose) |
| ピン 170 | I/O — User I/O pin (general purpose) |
| ピン 171 | I/O — User I/O pin (general purpose) |
| ピン 172 | I/O — User I/O pin (general purpose) |
| ピン 173 | VCCIO — I/O supply voltage (5 V) |
| ピン 174 | I/O — User I/O pin (general purpose) |
| ピン 175 | I/O — User I/O pin (general purpose) |
| ピン 176 | I/O — User I/O pin (general purpose) |
| ピン 177 | I/O — User I/O pin (general purpose) |
| ピン 178 | I/O — User I/O pin (general purpose) |
| ピン 179 | I/O — User I/O pin (general purpose) |
| ピン 180 | I/O — User I/O pin (general purpose) |
| ピン 181 | GND — Ground |
| ピン 182 | I/O — User I/O pin (general purpose) |
| ピン 183 | I/O — User I/O pin (general purpose) |
| ピン 184 | I/O — User I/O pin (general purpose) |
| ピン 185 | I/O — User I/O pin (general purpose) |
| ピン 186 | I/O — User I/O pin (general purpose) |
| ピン 187 | I/O — User I/O pin (general purpose) |
| ピン 188 | I/O — User I/O pin (general purpose) |
| ピン 189 | I/O — User I/O pin (general purpose) |
| ピン 190 | VCCINT — Core supply voltage (5 V) |
| ピン 191 | I/O — User I/O pin (general purpose) |
| ピン 192 | I/O — User I/O pin (general purpose) |
| ピン 193 | I/O — User I/O pin (general purpose) |
| ピン 194 | I/O — User I/O pin (general purpose) |
| ピン 195 | I/O — User I/O pin (general purpose) |
| ピン 196 | I/O — User I/O pin (general purpose) |
| ピン 197 | I/O — User I/O pin (general purpose) |
| ピン 198 | GND — Ground |
| ピン 199 | I/O — User I/O pin (general purpose) |
| ピン 200 | I/O — User I/O pin (general purpose) |
| ピン 201 | I/O — User I/O pin (general purpose) |
| ピン 202 | I/O — User I/O pin (general purpose) |
| ピン 203 | I/O — User I/O pin (general purpose) |
| ピン 204 | I/O — User I/O pin (general purpose) |
| ピン 205 | I/O — User I/O pin (general purpose) |
| ピン 206 | I/O — User I/O pin (general purpose) |
| ピン 207 | VCCIO — I/O supply voltage (5 V) |
| ピン 208 | I/O — User I/O pin (general purpose) |
主な用途
EPF10K20RC208-4 の用途: 6 件s: Telecommunications Line Card Glue Logic, Industrial Control and PLC Interface Logic, ASIC Prototyping and Logic Replacement, PCI Bridge and Bus Interconnect Multiplexing, Legacy 5V System Board Refresh, Test & Measurement Instrumentation Front-End.
Telecommunications Line Card Glue Logic
The EPF10K20RC208-4 fits telecommunications line-card glue logic because its 1,152 logic elements, 12,288 bits of EAB RAM, and 5V PCI-compliant I/O are well-matched to legacy 5V backplanes that still drive TDM, HDLC, and Utopia interfaces in central-office equipment. The 0.4 ns propagation delay and 125 MHz internal frequency allow state machines, framer/codec interfaces, and bus multiplexers to run with comfortable timing margin at the -4 speed grade, while the 147 user I/Os expose enough pins for multi-port bridging. Placing the device between a 5V controller ASIC and a 5V TDM bus, the EPF10K20 replaces several discrete 74-series logic packages and provides reconfigurability for last-minute protocol revisions. The 208-RQFP exposed pad simplifies PCB heat-spreading inside a 1U line-card footprint.
おすすめ
Industrial Control and PLC Interface Logic
The EPF10K20RC208-4 suits industrial control and PLC interface logic because its 5V tolerant I/Os interface directly to 24V-to-5V opto-isolated sensor rails and 5V CMOS drivers without external level shifters. With 1,152 logic elements and 147 user I/Os it can host encoder counters, PWM generation, stepper/direction timing, Modbus/Profibus framing, and safety interlocks in a single device. The 12,288 EAB RAM bits provide small lookup-table storage for sensor calibration curves, while the 0.4 ns logic-element delay supports 125 MHz deterministic counter chains for high-speed quadrature decoding. The 208-RQFP package is a mainstream SMT footprint with robust gull-wing leads tolerant of industrial-assembly thermal cycling, and the exposed pad enables sufficient heat spreading for continuous-toggle industrial workloads.
おすすめ
ASIC Prototyping and Logic Replacement
The EPF10K20RC208-4 is widely used as an ASIC prototyping vehicle because its 1,152 logic elements, embedded array RAM, and 5V I/Os let designers emulate target ASIC functionality before committing to a mask set. Engineers map ASIC gate-level netlists into the FLEX 10K using MAX+PLUS II or Quartus synthesis, validate at real-system speeds up to 125 MHz, and iterate without NRE cost. The 208-pin RQFP exposes enough I/O to mimic a typical mid-complexity ASIC's bond-out, and the -4 speed grade provides a conservative timing model that approximates pre-layout ASIC timing. Compared with a hard-ASIC spin, the EPF10K20 lets a project gate-verify firmware, board bring-up, and signal-integrity assumptions weeks earlier in the schedule.
おすすめ
PCI Bridge and Bus Interconnect Multiplexing
The EPF10K20RC208-4 handles PCI bridge and bus-multiplexing tasks well because PCI-compliant I/O buffers and 5V tolerance let it sit directly on 33 MHz PCI segments in legacy servers and industrial PCs. The 147 user I/Os are sufficient for multiplexing address/data buses, generating chip-select and wait-state logic, and providing local FIFOs using the 12,288 bits of EAB RAM. The 0.4 ns logic-element delay combined with the -4 speed grade gives predictable timing at 33 MHz PCI, while the 125 MHz maximum internal frequency lets the device run faster local glue logic in parallel. The 208-RQFP footprint remains compatible with surrounding 5V glue-logic ICs, simplifying PCB stack-up versus a mixed-voltage design.
おすすめ
Legacy 5V System Board Refresh
The EPF10K20RC208-4 is a strong fit for legacy 5V system-board refresh programs where a discontinued 5V ASIC or PLD must be replaced without redesigning the entire PCB. Its 5V I/Os drop in directly to existing 5V rails, its 208-pin RQFP footprint matches the original socket, and its 1,152 logic elements provide headroom for added functionality that the legacy ASIC lacked. Designers port the original schematics, synthesize the new behavior with MAX+PLUS II or Quartus, and use the EAB RAM for any small memory blocks that the old hard-wired ASIC contained. Compared with migrating to a modern 3.3V Cyclone or MAX V, the EPF10K20 avoids a board spin and saves months of qualification effort.
おすすめ
Test & Measurement Instrumentation Front-End
The EPF10K20RC208-4 also serves in test-and-measurement instrumentation front-ends where its 147 user I/Os, EAB RAM, and 5V I/O tolerance simplify interfacing to legacy DUT boards. The 1,152 logic elements can implement pattern generators, capture state machines, and timing-and-control sequencers that previously required multiple discrete logic ICs. The 12,288 bits of EAB RAM allow on-chip capture buffers and reference-pattern storage, while the 125 MHz internal clock rate supports high-speed stimulus generation. The 208-RQFP with exposed pad gives stable thermal performance in enclosed instrument chassis where the FPGA may run near continuous toggle rates for hours at a time.
おすすめ
おすすめ製品の概要
エンジニアリング参考データ: EPF10K20RC208-4 — 比較、設計ガイダンス、コンプライアンス情報。
選定ガイド
代替品との比較
| パラメータ | この製品 | EPF10K20RC208-3N | EPF10K20RC208-3 | EPF10K20RC208-4N |
|---|---|---|---|---|
| Brand | Intel (Altera) | Intel (Altera) | Intel (Altera) | Intel (Altera) |
| Package | 208-pin RQFP / 208-BFQFP | 208-pin RQFP / 208-BFQFP | 208-pin RQFP / 208-BFQFP | 208-pin RQFP / 208-BFQFP |
| Logic Elements | 1,152 | 1,152 | 1,152 | 1,152 |
| Typical Gates | 20,000 | 20,000 | 20,000 | 20,000 |
| User I/Os | 147 | 147 | 147 | 147 |
| Supply Voltage | 5 V | 5 V | 5 V | 5 V |
| Maximum Frequency | 125 MHz | 125 MHz | 125 MHz | 125 MHz |
| Speed Grade | -4 | -3 | -3 | -4 |
| Operating Temperature | 0 to +70 °C (commercial) | 0 to +70 °C (commercial) | 0 to +70 °C (commercial) | -40 to +85 °C (industrial) |
主な差別化要因
- Lower-density but pin-identical to EPF10K20 family drop-ins （vs EPF10K20RC208-3N)
- Commercial temperature grade vs industrial -4N option （vs EPF10K20RC208-4N)
- 5V native I/O vs 3.3V-only newer FPGAs （vs Cyclone series (Intel))
設計ノート
Estimated: the EPF10K20RC208-4 draws VCCINT and VCCIO both from a 5V rail, and at typical toggle rates the datasheet ICC figure can reach several hundred milliamps. Provide at least four VCCINT/VCCIO pins (one per package quadrant) decoupled with 0.1 µF ceramic plus a bulk 47 µF tantalum, and use a wide power plane rather than a thin trace to limit IR drop on the 5 V rail during high-current bursts.
Estimated: with all 1,152 logic elements switching at 125 MHz and 60 % toggle rate, junction temperature can rise 25-35 °C above ambient on a JEDEC 4-layer board without a copper spreader under the exposed pad. Solder the exposed pad to a continuous inner-plane copper pour of at least 1 square inch and add 6-9 thermal vias under the pad to keep junction temperature well below the 125 °C FLEX 10K limit.
Do not assume a 3.3V-only configuration memory will work: the FLEX 10K family is a 5V-only part, and mis-wiring VCCINT to 3.3V will silently corrupt configuration. Also note that MAX+PLUS II and Quartus II (legacy) are the supported design flows - modern Quartus Prime has dropped FLEX 10K device support, so retain a legacy tool installation if you intend to re-synthesize bitstreams.
Route all 147 user I/Os on inner layers if possible, with a continuous ground plane on the layer immediately beneath the device to control simultaneous-switching noise (SSN). Keep 5V VCCIO and 5V VCCINT planes split only if your design requires analog/digital isolation; otherwise tie them together through a wide copper bridge to share decoupling. Place the EPC8 or EPC2 configuration PROM within 2 inches of the FPGA DATA pins to avoid configuration failures on long traces.
コンプライアンス情報
Compliance certifications not surfaced in the datasheet snippets retrieved; the EPF10K20 family predates many modern compliance statements and is obsolete. Request a compliance letter from authorized distributors before using in RoHS-critical applications.
