ICL7109IPL+ - 12-Bit Dual-Slope ADC | Analog Devices
部品番号: ICL7109IPL+ ✓ 生産中ICL7109IPL+ 概要
An integrating ADC is a voltage-to-digital conversion category that measures input voltage through repeated integration and de-integration cycles. Dual-slope conversion averages the input over time, making it well suited to low-bandwidth measurements where noise rejection and predictable conversion behavior are more important than very high sampling rates. The ICL7109 occupies a position within the broader ADC, data-converter, and semiconductor hierarchy.
The primary device characteristics include 12-bit resolution, one analog input, dual-slope conversion, microprocessor-compatible parallel outputs, and three-state output capability. Three-state outputs permit multiple devices to share a bus when their output drivers are disabled. The low-power operating approach and low input bias current also make the converter useful in instrumentation arrangements where analog multiplexing would otherwise add leakage and crosstalk concerns.
The ICL7109 uses a zero-integrator phase to reduce overrange hangover, crosstalk, and hysteresis effects between conversions. This behavior is particularly useful in multi-channel measurement systems that use separate converters for sensitive channels. The 40-pin PDIP package favors through-hole construction, thermal robustness, and straightforward prototyping rather than compact surface-mount assembly.
Typical applications include digital voltmeters, process-control instrumentation, laboratory measurement equipment, weighing systems, temperature bridges, and low-rate sensor acquisition. It is especially appropriate when the input signal is slow-changing and a dedicated low-power conversion channel is preferable to a high-speed multiplexing ADC.
Designers should follow the Analog Devices ICL7109 datasheet for reference voltage, input range, conversion timing, output-code interpretation, and external-component requirements. The zero-integrator phase must also be considered when calculating measurement-cycle timing, because it affects the interval between completed conversions and the behavior following an overrange event.
This page combines the manufacturer product information with practical selection guidance, a structured comparison against a documented converter alternative, and design-focused explanations of conversion timing, bus interfacing, input behavior, and package considerations. These engineering-oriented details help distinguish the ICL7109 from faster SAR converters, multiplexed ADC systems, and general-purpose digital interface devices.
ドロップイン代替品: ICL7109IPL+ — 同一パッケージでピン互換。PCBの作り直しが必要な異なるパッケージの部品は除外されています。
TC7109ACPL
✅ ドロップイン📋 参考代替品（カタログ未掲載）
ICL7109IPL+ 最大定格＆電気的特性
| Converter Type | Dual-slope analog-to-digital converter |
| 分解能 | 12 bit |
| Input Channels | 1 channel |
| 出力タイプ | 3-state binary |
| インターフェースタイプ | Microprocessor-compatible parallel |
| パッケージ | 40-pin PDIP |
| Terminal Count | 40 terminals |
| 実装タイプ | Through-hole |
| Conversion Architecture | Dual-slope |
| Integration Feature | Zero-integrator phase |
| Low-Power Feature | Low-power operation |
| Input Bias Current | Low input bias current |
| Overrange Behavior | Zero-integrator phase reduces overrange hangover |
ICL7109IPL+ 40-pin pdip ピン配置ガイド
ICL7109IPL+ (40-pin pdip パッケージ) のピン配置。 このアナログコンポーネントは、入力、出力、および電源ピンを備えています。オフセットナル、補償、イネーブルピンの設定については、メーカーのデータシートを参照してください。信号調整やアンプ回路に最適です。
詳細なピン配置データはありません: ICL7109IPL+.
詳細は データシート をご参照ください。
主な用途
ICL7109IPL+ の用途: 6 件s: Digital Voltmeters, Bridge-Based Sensor Measurement, Process-Control Instrumentation, Laboratory Data-Acquisition Systems, Temperature and Resistance Measurement, Weighing and Dispensing Equipment.
Digital Voltmeters
The ICL7109IPL+ suits digital voltmeter front ends that require a dedicated low-rate conversion channel. Its 12-bit dual-slope architecture measures the analog input through integration, while the low-power operating approach and low input bias current help preserve measurement integrity. The 40-pin PDIP package also provides a practical through-hole construction for instrument prototypes and production boards with adequate spacing. Unlike a fast successive-approximation converter, the ICL7109IPL+ prioritizes integrated measurement behavior and noise rejection rather than high sampling throughput.
おすすめ
Bridge-Based Sensor Measurement
The ICL7109IPL+ is appropriate for slow-changing bridge outputs because its low input bias current reduces loading of high-impedance sensor networks. A 12-bit dual-slope conversion stage averages the bridge voltage over its measurement cycle, which can improve rejection of periodic noise. Using one ICL7109IPL+ per bridge also avoids the leakage and crosstalk concerns associated with sharing sensitive channels through an analog multiplexer. Circuit design must still account for input range, reference accuracy, excitation stability, and the required conversion interval.
おすすめ
Process-Control Instrumentation
The ICL7109IPL+ fits industrial monitoring loops that sample slowly changing pressure, level, flow, or temperature signals. Its one-channel dual-slope architecture can provide a dedicated measurement path for each critical signal, reducing switching complexity and keeping analog routing straightforward. The 12-bit result supports many process-display and threshold-control tasks when paired with a stable reference and properly scaled sensor signal. Because it is a through-hole PDIP device, board spacing and connector arrangement should be planned around its 40-pin footprint.
おすすめ
Laboratory Data-Acquisition Systems
The ICL7109IPL+ can be used in laboratory instruments that acquire one relatively slow analog channel at a time through a dedicated converter. Its three-state binary outputs permit controlled sharing of a parallel bus, while the microprocessor-compatible interface simplifies connection to a conventional controller bus. The dual-slope method integrates the input over time and is well matched to measurements where noise averaging is desirable. Engineers should calculate bus-disable and conversion timing margins so the controller never samples an invalid or previously enabled output word.
おすすめ
Temperature and Resistance Measurement
The ICL7109IPL+ can measure resistance, thermocouple, or RTD signals after suitable conditioning, especially where a dedicated low-rate channel improves simplicity. Its 12-bit dual-slope conversion averages the conditioned voltage, and its low input bias current is advantageous for high source impedances. The zero-integrator phase helps limit crosstalk and hysteresis effects between measurements. For accurate results, the reference network, sensor excitation, input protection, and analog grounding should follow the application guidance in the Analog Devices ICL7109 datasheet.
おすすめ
Weighing and Dispensing Equipment
The ICL7109IPL+ is applicable to load-cell weighing systems where the transducer output changes slowly and repeatable multi-cycle integration is beneficial. The dual-slope conversion method averages the load-cell signal, while a dedicated converter can simplify analog isolation between multiple weighing channels. Its low input bias current helps preserve the integrity of high-impedance bridge networks. System designers should verify excitation requirements, common-mode range, zero-integrator timing, reference stability, and conversion-cycle timing before using the converter in a calibrated commercial scale.
おすすめ
おすすめ製品の概要
エンジニアリング参考データ: ICL7109IPL+ — 比較、設計ガイダンス、コンプライアンス情報。
選定ガイド
代替品との比較
| パラメータ | この製品 | TC7109ACPL |
|---|---|---|
| Brand | Analog Devices | Microchip Technology |
| Package | 40-pin PDIP | 40-pin PDIP |
| Resolution | 12 bit | 12 bit |
| Converter Architecture | Dual-slope | Dual-slope |
| Output Interface | Microprocessor-compatible parallel, 3-state binary outputs | Direct mode and handshake mode |
| Power Feature | Low-power operation | Microamp-compatible operation |
主な差別化要因
- Documented one-per-channel low-power measurement architecture （vs TC7109ACPL)
- Three-state parallel output simplifies controlled bus sharing （vs TC7109ACPL)
- Zero-integrator phase improves recovery between measurements （vs TC7109ACPL)
設計ノート
Treat the ICL7109IPL+ as a dedicated low-rate measurement channel rather than a high-speed ADC. The dual-slope cycle averages the input over time, so an external filter should be selected for the actual signal bandwidth rather than for the fastest possible conversion rate. Include the zero-integrator phase in measurement-cycle calculations and allow sufficient settling time before changing the analog input or enabling another converter on a shared bus.
Route the analog input, reference, timing, and digital output sections according to the Analog Devices ICL7109 datasheet layout guidance. Keep the analog-input trace short, use a quiet reference return, and place required input and reference capacitors close to their associated pins. The three-state outputs can share a parallel bus, but output-enable traces should be controlled so that inactive devices cannot contend with the selected converter during data acquisition.
Decouple the supply pins with the capacitance and placement specified by the manufacturer. Avoid routing converter switching or digital return currents through the analog-input and reference paths, particularly when the measured source has high impedance. Verify supply range, reference voltage, input common-mode range, and output logic levels against the exact ICL7109 documentation before applying power or connecting the three-state outputs to a microprocessor bus.
コンプライアンス情報
The ICL7109 product information identifies a production analog-to-digital converter but does not explicitly state the requested environmental, halogen-free, lead-free, conflict-minerals, REACH, or RoHS classifications.