IPB042N10N3 G - 100V 100A OptiMOS 3 N-Channel MOSFET | Infineon
部品番号: IPB042N10N3 G ✓ 生産中| 数量 | 単価 | 小計 |
|---|---|---|
| 1 | $2.85 | $2.85 |
| 10 | $2.56 | $25.60 |
| 100 | $2.28 | $228.00 |
| 500 | $2.04 | $1,020.00 |
| 1,000 | $1.81 | $1,810.00 |
| 3,000 | $1.62 | $4,860.00 |
IPB042N10N3 G 概要
A power MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor) is a voltage-controlled switch used for power conversion. N-channel enhancement-mode MOSFETs are the dominant switching element in switched-mode power supplies (SMPS), motor drives, and DC-DC converters. Within the power semiconductor hierarchy, MOSFETs sit below IGBTs (used at higher voltages) and above load switches and small-signal FETs. OptiMOS is Infineon's trench-technology MOSFET family optimized for low conduction and switching losses.
Key features of the IPB042N10N3 G include 100V VDS rating, 4.2 mOhm maximum RDS(on), 100A continuous ID at Tc, 175C maximum junction temperature, Pb-free lead plating, RoHS compliance, and JEDEC qualification for target applications. The low RDS(on) x gate charge FOM reduces both conduction and switching losses simultaneously, which translates directly into higher efficiency and smaller heatsinks in the end product. The D2PAK-2 package supports high-current PCB mounting with a copper tab acting as the drain terminal.
The IPB042N10N3 G is designed in Infineon's trench MOSFET cell technology that minimizes cell pitch and on-resistance per unit silicon area. Compared to the next-best competing technology, OptiMOS 3 achieves a 30% reduction in both RDS(on) and FOM, enabling either higher efficiency at the same footprint or the same efficiency in a smaller package.
Typical applications include high-efficiency switched-mode power supplies (SMPS), 48V motor control, synchronous rectification in DC-DC converters, solar inverters, and telecom brick converters. Its 100V rating makes it ideal for 48V bus systems where a 100V device provides comfortable transient margin while delivering ultra-low conduction loss at full load.
When designing with the IPB042N10N3 G, ensure the gate drive produces 10V VGS for full enhancement; lower gate voltages drastically increase RDS(on). The D2PAK drain tab requires substantial PCB copper area or an attached heatsink to dissipate the 214W rated power. A gate-source resistor (typically 10-100 ohm) prevents parasitic oscillation, and a low-impedance gate driver is recommended for high-frequency switching above 100 kHz.
This page synthesizes distributor pricing, drop-in alternatives, and practical design notes not found in the manufacturer datasheet.
ドロップイン代替品: IPB042N10N3 G — 同一パッケージでピン互換。PCBの作り直しが必要な異なるパッケージの部品は除外されています。
クイック比較ツール — 並列比較する代替部品を選択:
IPP045N10N3 G
✅ ドロップイン ⚠️ 仕様未検証📋 参考代替品（カタログ未掲載）
IPI045N10N3 G
✅ ドロップイン ⚠️ 仕様未検証📋 参考代替品（カタログ未掲載）
IPB044N10N3 G
✅ ドロップイン ⚠️ 仕様未検証📋 参考代替品（カタログ未掲載）
IPB042N10N3 G 最大定格＆電気的特性
| トランジスタタイプ | N-Channel MOSFET |
| Technology | OptiMOS 3 (Trench) |
| Drain-Source Voltage (VDS) | 100 V |
| Continuous Drain Current (ID) at Tc | 100 A |
| On-Resistance RDS(on) max at VGS=10V | 4.2 mOhm |
| Power Dissipation (PD) at Tc | 214 W |
| 動作接合温度 | -55C to +175C |
| パッケージ | PG-TO263-3 (D2PAK-2) |
| 実装タイプ | Surface Mount |
| Configuration | Single |
| Lead Plating | Pb-free |
| RoHS ステータス | Compliant |
| JEDEC Qualification | Yes (per datasheet) |
IPB042N10N3 G ピン構成
| ピン 1 | Gate — Gate control input - drive to 10V for full enhancement |
| ピン 2 | Source (tab) — Source terminal (also electrically connected to back tab) |
| ピン 3 | Source — Source terminal |
安全動作領域 (DC)
主な用途
IPB042N10N3 G の用途: 7 件s: 48V BLDC Motor Drive, Synchronous Rectification in DC-DC Converters, Telecom Brick Converters (48V input), Solar Inverter Power Stage, High-Frequency SMPS Primary Switch, Automotive 48V Mild-Hybrid Systems, Hot-Swap and OR-ing Controllers.
48V BLDC Motor Drive
The IPB042N10N3 G fits 48V BLDC and PMSM motor drives because its 100V VDS rating provides 2x safety margin over a 48V nominal bus (which can transient to 60V under load-dump). With 4.2 mOhm RDS(on) and 100A continuous ID, the part handles multi-kW motor power without excessive conduction loss; in a 3-phase inverter at 50A per phase, conduction loss per switch is approximately 10.5W, enabling air-cooled designs without external heatsinks above the rated power.
おすすめ
Synchronous Rectification in DC-DC Converters
In buck and forward-converter secondary-side synchronous rectification, the IPB042N10N3 G's low 4.2 mOhm RDS(on) and fast switching characteristics minimize both conduction loss and body-diode recovery loss, directly improving converter efficiency. The OptiMOS 3 FOM (Qg x RDS(on)) is among the best in class for 100V parts, allowing 100-500 kHz switching frequencies without excessive gate-drive loss. The D2PAK package supports high-side or low-side synchronous switch placement with adequate PCB copper cooling.
おすすめ
Telecom Brick Converters (48V input)
The IPB042N10N3 G is well suited for isolated DC-DC brick converters with 48V nominal input (36-75V telecom range). Its 100V VDS provides adequate margin for input transients per ETSI EN 300 132-2, while the 4.2 mOhm RDS(on) supports 30-50A brick designs with high efficiency (typically >96%). The D2PAK-2 package allows surface-mount assembly for high-volume manufacturing, and the 175C junction temperature supports operation at elevated ambient temperatures inside sealed brick modules.
おすすめ
Solar Inverter Power Stage
In solar micro-inverter and string-inverter power stages, the IPB042N10N3 G handles up to 100V string voltages with comfortable safety margin, while its 4.2 mOhm RDS(on) minimizes conduction loss in the high-current path. The OptiMOS 3 technology's low Qg reduces gate-drive requirements and allows higher PWM rates for finer MPPT tracking accuracy. The D2PAK package's large copper tab enables direct PCB-mount heatsinking or attachment to the inverter chassis heatsink.
おすすめ
High-Frequency SMPS Primary Switch
As a primary-side switch in half-bridge or full-bridge SMPS topologies, the IPB042N10N3 G handles 100V bus operation with low switching loss thanks to its low Qg (OptiMOS 3 FOM optimization). The 100A ID rating and 214W power dissipation support kilowatt-class converter designs. The Pb-free, RoHS-compliant D2PAK package meets modern manufacturing requirements and the 175C junction temperature supports elevated ambient operation common in industrial PSU designs.
おすすめ
Automotive 48V Mild-Hybrid Systems
The IPB042N10N3 G serves in 48V mild-hybrid automotive systems where 100V VDS handles the 48V bus plus transient overshoot during cranking and load-dump events. The 4.2 mOhm RDS(on) supports high-current 48V-12V DC-DC converters common in mild-hybrid electrical architectures. While this part is not formally AEC-Q100 qualified, the underlying OptiMOS 3 technology is automotive-proven; for full AEC-Q100 qualification, the IPB042N10N3 G can typically be replaced with the automotive-graded sibling from the same Infineon family.
おすすめ
Hot-Swap and OR-ing Controllers
In server and telecom hot-swap and OR-ing applications, the IPB042N10N3 G's 100V rating and 4.2 mOhm RDS(on) handle 48V nominal rails with low conduction loss and SOA margin for inrush and short-circuit events. The D2PAK package supports the high PCB copper area needed to dissipate sustained fault events before the hot-swap controller trips. The 100A continuous rating matches typical 48V, 50-100A server power-shelf requirements.
おすすめ
おすすめ製品の概要
エンジニアリング参考データ: IPB042N10N3 G — 比較、設計ガイダンス、コンプライアンス情報。
選定ガイド
代替品との比較
| パラメータ | この製品 | IPP045N10N3 G | IPI045N10N3 G | IPB044N10N3 G |
|---|---|---|---|---|
| Brand | Infineon Technologies | Infineon Technologies | Infineon Technologies | Infineon Technologies |
| Package | PG-TO263-3 (D2PAK-2) | PG-TO220-3 (through-hole) | PG-TO262-3 IPAK (through-hole) | PG-TO263-3 (D2PAK-2) - same |
| Drain-Source Voltage (VDS) | 100 V | 100 V | 100 V | 100 V |
| Continuous Drain Current (ID) at Tc | 100 A | 100 A | 100 A | 100 A |
| On-Resistance RDS(on) max | 4.2 mOhm at VGS=10V | 4.5 mOhm at VGS=10V | 4.5 mOhm at VGS=10V | 4.4 mOhm at VGS=10V |
| Power Dissipation (PD) at Tc | 214 W | 214 W | 214 W | 214 W |
| Maximum Junction Temperature | 175 C | 175 C | 175 C | 175 C |
| Technology Family | OptiMOS 3 | OptiMOS 3 | OptiMOS 3 | OptiMOS 3 |
主な差別化要因
- Industry-leading OptiMOS 3 FOM （vs Competing 100V MOSFETs)
- 100A continuous ID in D2PAK-2 （vs IPB044N10N3 G)
- Complete OptiMOS 3 product family （vs Single-package competitors)
設計ノート
Estimated: at VIN=48V, VOUT=12V, IOUT=30A in a buck converter, the IPB042N10N3 G dissipates approximately 30W conduction loss (I^2 x RDS(on) = 900 x 0.0042). The D2PAK-2 package has a typical theta_JC of 0.7 C/W, giving a junction temperature rise of 21C above case temperature. With adequate case-to-ambient cooling, this is manageable; without a heatsink, the junction can quickly exceed safe limits. Always use the SOA curve from the datasheet for application-specific thermal analysis.
The D2PAK drain terminal is the large metal tab on the back of the package; this tab MUST be soldered to a substantial PCB copper pour (at least 1 square inch of 2oz copper recommended for full 100A capability). Use thermal vias under the tab to inner copper layers to spread heat. The gate and source traces should be kept short and the gate trace should be surrounded by source copper to minimize parasitic inductance that causes gate- ringing and potential shoot-through.
Do not drive the gate below the threshold voltage - partial enhancement dramatically increases conduction loss and can lead to thermal runaway. Do not exceed VGS max (typically +/-20V for OptiMOS 3); use a gate-source ZVS protected with 10V Zener for gate-drive transients. Do not switch at high dv/dt without a gate resistor (typically 10-100 ohm) to damp parasitic oscillation. Do not assume the source pin and back tab are at the same potential without verification - some variants have a Kelvin source pin.
Place a gate-source resistor (typically 10k ohm) directly at the gate pin to ensure the MOSFET stays off if the gate driver is disconnected. Add a small gate-source ZVS protection (typically 10V Zener) for gate-drive transients. For high-side applications, use a bootstrap gate driver with a local gate-bypass capacitor (at least 100 nF) to prevent gate-voltage droop during switching. For parallel operation, source resistors (typically 1-10 mOhm) help balance current sharing.
