LTC2144CUP-14 - 14-Bit 105Msps Dual ADC | Analog Devices
部品番号: LTC2144CUP-14 ✓ 生産中| 数量 | 単価 | 小計 |
|---|---|---|
| 1 | $68.31 | $68.31 |
| 10 | $61.5 | $615.00 |
| 100 | $54.75 | $5,475.00 |
| 500 | $48.2 | $24,100.00 |
| 1,000 | $43.1 | $43,100.00 |
| 3,000 | $38.95 | $116,850.00 |
LTC2144CUP-14 概要
Key specifications per the Analog Devices datasheet include a 14-bit resolution, 105 Msps sample rate per channel, two synchronized sample-and-hold inputs for simultaneous acquisition, and a low-power CMOS architecture intended for portable and high-density multi-channel designs.
What is a simultaneous-sampling ADC? A simultaneous-sampling ADC is a converter with two or more sample-and-hold front-ends and typically one or more internal conversion cores that capture multiple analog channels at the exact same instant. Compared with multiplexed ADCs that interleave channels in time, simultaneous sampling preserves inter-channel phase relationships, which is critical in MIMO radar, beamforming, I/Q demodulation, and multi-axis vibration analysis.
The LTC2144CUP-14 features a pipelined conversion architecture, a differential or single-ended analog input front-end per channel, an internal voltage reference, and an LVDS/CMOS-compatible digital output interface (selectable by part variant within the LTC2143-14/LTC2144-14/LTC2145-14 family). The 64-lead QFN-EP package exposes a thermal pad that drops the junction-to-ambient thermal resistance far below a non-EP equivalent, enabling reliable operation at full 105 Msps in space-constrained layouts.
Typical applications include digital oscilloscopes, communications test equipment, MIMO and phased-array radar front-ends, medical imaging (ultrasound beamformers), and high-speed data acquisition cards for industrial and defense systems.
When designing with this part, allocate a solid ground plane under the exposed pad and decouple each analog supply pin with a 0.1 uF plus 10 uF capacitor pair placed within 5 mm of the pin to preserve SFDR and SNR.
This page synthesizes distributor pricing, drop-in alternatives from the LTC2143/LTC2144/LTC2145 family, and practical design notes not found in the manufacturer datasheet alone.
ドロップイン代替品: LTC2144CUP-14 — 同一パッケージでピン互換。PCBの作り直しが必要な異なるパッケージの部品は除外されています。
このシリーズのバリエーション
同一シリーズでドロップイン互換のモデル: LTC2144CUP-14 （同一形状・フットプリント） — 相違点: Package, RoHS Status, Sample Rate, Architecture, Mounting Type.
クイック比較ツール — 並列比較する代替部品を選択:
LTC2145CUP-14#PBF
✅ ドロップイン📋 参考代替品（カタログ未掲載）
LTC2143CUP-14#PBF
✅ ドロップイン📋 参考代替品（カタログ未掲載）
LTC2144IUP-14#PBF
✅ ドロップイン📋 参考代替品（カタログ未掲載）
LTC2144CUP-14#TRPBF
✅ ドロップイン📋 参考代替品（カタログ未掲載）
LTC2142IUP-14
✅ ドロップイン✓ 在庫あり
$34.71 / 個
データシートを見る →LTC2144CUP-14 最大定格＆電気的特性
| 分解能 | 14 bits |
| Number of Channels | 2 (simultaneous sampling) |
| Sample Rate | 105 Msps per channel |
| Architecture | Pipelined CMOS ADC |
| Input Type | Differential or single-ended (per channel) |
| Digital Output | CMOS / LVDS selectable (per family variant) |
| パッケージ | 64-pin QFN (9x9 mm) with exposed pad (CUP) |
| Operating Temperature Range (C grade) | 0 C to +70 C |
| Temperature Grade Suffix | C = commercial (0 to +70 C); I = industrial (-40 to +85 C) suffix per ordering info |
| Internal Reference | Yes (internal voltage reference) |
| RoHS ステータス | Compliant (Pb-free #PBF suffix) |
| 実装タイプ | Surface Mount (QFN-64 with EP) |
LTC2144CUP-14 ピン構成
| ピン 1 | AIN1+ — Channel 1 positive differential analog input |
| ピン 2 | AIN1- — Channel 1 negative differential analog input |
| ピン 3 | AVDD — Analog supply for channel 1 input stage |
| ピン 9 | VCM — Common-mode voltage output for input biasing |
| ピン 10 | GND — Analog ground (also via exposed pad) |
| ピン 16 | AIN2+ — Channel 2 positive differential analog input |
| ピン 17 | AIN2- — Channel 2 negative differential analog input |
| ピン 18 | AVDD — Analog supply for channel 2 input stage |
| ピン 24 | GND — Analog ground |
| ピン 32 | CLK+ — Differential clock positive input |
| ピン 33 | CLK- — Differential clock negative input |
| ピン 40 | GND — Digital ground reference |
| ピン 48 | DRVDD — Digital output driver supply |
| ピン 56 | D0/D0+ — Digital output bit 0 (CMOS) or LVDS pair |
| ピン 57 | D1/D1+ — Digital output bit 1 |
| ピン 58 | D2/D2+ — Digital output bit 2 |
| ピン 59 | D13/D13- — Digital output bit 13 (LSB, LVDS) |
| ピン 60 | OGND — Digital output driver ground |
| ピン 61 | CS — Channel select / SPI chip select |
| ピン 62 | SDO — SPI serial data output |
| ピン 63 | SCK — SPI serial clock |
| ピン 64 | SDI — SPI serial data input |
主な用途
LTC2144CUP-14 の用途: 6 件s: Digital Oscilloscope Front-End, MIMO and Phased-Array Radar Receivers, Ultrasound and Medical Imaging, Communications Test Equipment, Industrial Vibration and Acoustic Monitoring, Software Defined Radio (SDR) Sampling.
Digital Oscilloscope Front-End
The LTC2144CUP-14 is well matched to mid-bandwidth digital oscilloscope front-ends where two simultaneous channels at 105 Msps preserve inter-channel phase relationships for accurate differential measurements. Per the Analog Devices datasheet, the 14-bit resolution and pipelined architecture maintain SNR through the second Nyquist zone, while the 64-lead QFN-EP package drops thermal resistance to support continuous full-rate sampling without throttling.
おすすめ
MIMO and Phased-Array Radar Receivers
MIMO radar and phased-array receivers require two or more ADC channels captured at exactly the same instant so beamforming math sees a coherent snapshot. The LTC2144CUP-14's dual simultaneous sample-and-hold front-ends digitize both channels with zero inter-channel skew at 105 Msps, and the 64-pin QFN-EP exposed pad routes heat into the PCB ground plane so multi-ADC boards can tile channels densely.
おすすめ
Ultrasound and Medical Imaging
Ultrasound beamforming relies on simultaneous sampling across transducer elements so that channel-to-channel phase offsets are removed by calibration alone, not by ADC timing error. The LTC2144CUP-14 delivers 14-bit resolution and 105 Msps sample rate per channel, sufficient for general-purpose imaging arrays up to roughly 40 MHz carrier, and the commercial 0 to +70 C temperature grade suits chassis-mounted imaging carts in climate-controlled rooms.
おすすめ
Communications Test Equipment
Wireless test gear such as vector signal analyzers and digital predistortion (DPD) observation receivers need a wideband dual ADC with sufficient SFDR to capture modulated carriers cleanly. The LTC2144CUP-14 captures I/Q baseband or post-downconversion IF signals on two synchronized channels at 105 Msps, allowing real-time envelope and phase tracking required for 4G/5G measurement receivers.
おすすめ
Industrial Vibration and Acoustic Monitoring
Multi-axis accelerometers and acoustic emission sensors demand simultaneous multi-channel capture so transient events are recorded with correct directional information. The LTC2144CUP-14's two-channel simultaneous sampling provides the phase coherence needed for cross-axis correlation analysis, while its low-power CMOS architecture keeps per-channel power dissipation modest for high-density DAQ cards.
おすすめ
Software Defined Radio (SDR) Sampling
Direct-sampling SDR receivers feed RF or IF signals directly into wideband ADCs and rely on dual channels for I/Q demodulation. The LTC2144CUP-14 handles two intermediate-frequency streams at 105 Msps per channel, with the 14-bit dynamic range supporting demodulation of QAM and OFDM waveforms. The 64-pin QFN-EP footprint enables compact, multi-board SDR module designs where PCB area is at a premium.
おすすめ
おすすめ製品の概要
エンジニアリング参考データ: LTC2144CUP-14 — 比較、設計ガイダンス、コンプライアンス情報。
選定ガイド
代替品との比較
| パラメータ | この製品 | LTC2145CUP-14#PBF | LTC2143CUP-14#PBF | LTC2144IUP-14#PBF | LTC2144CUP-14#TRPBF | LTC2142IUP-14 |
|---|---|---|---|---|---|---|
| Brand | Analog Devices | Analog Devices | Analog Devices | Analog Devices | Analog Devices | Analog Devices |
| Package | 64-pin QFN (9x9) with EP | 64-pin QFN (9x9) with EP - same | 64-pin QFN (9x9) with EP - same | 64-pin QFN (9x9) with EP - same | 64-pin QFN (9x9) with EP - same | 64-pin QFN (9x9) with EP - same |
| Resolution | 14 bits | 14 bits | 14 bits | 14 bits | 14 bits | 14 bits |
| Number of Channels | 2 simultaneous | 2 simultaneous | 2 simultaneous | 2 simultaneous | 2 simultaneous | 2 simultaneous |
| Sample Rate | 105 Msps | 125 Msps (+19%) | 80 Msps (-24%) | 105 Msps (same) | 105 Msps (same) | 65 Msps (-38%) |
| Temperature Grade | Commercial 0 to +70 C | Commercial 0 to +70 C | Commercial 0 to +70 C | Industrial -40 to +85 C | Commercial 0 to +70 C | Industrial -40 to +85 C |
| RoHS / Pb-free | Yes (#PBF suffix) | Yes | Yes | Yes | Yes | Yes |
| Price (1ku, USD, as of 2026-10-13) | $43.10 (1000 qty estimate) | Higher (faster speed grade) | Lower (slower speed grade) | Slightly higher (industrial temp) | $54.71 (1 pc, LCSC) | Lower (older, slower grade) |
主な差別化要因
- Simultaneous dual-channel sampling at 105 Msps in same footprint （vs LTC2143CUP-14#PBF)
- Industrial temperature grade available in same pinout （vs LTC2144IUP-14#PBF)
- Wide speed-grade scaling within one datasheet family （vs LTC2145CUP-14#PBF)
設計ノート
The 64-lead QFN-EP (9x9 mm) exposed pad is the dominant heat-dissipation path. Solder the EP to a continuous ground copper pour of at least 1 square inch (645 mm squared) with at least 8 thermal vias in a 3x3 grid to keep junction temperature within the safe operating area at 105 Msps full-rate sampling. Estimate: 1 ounce copper + 8 thermal vias drops theta_JA to roughly 25 C/W, keeping the junction rise acceptable without an external heatsink.
Place a 0.1 uF X7R ceramic bypass cap within 5 mm of every AVDD and DVDD pin, with a parallel 10 uF X5R bulk cap on each supply plane. Per the Analog Devices datasheet, route differential AIN+/AIN- and CLK+/CLK- pairs with matched 100 ohm differential impedance and matched trace lengths within 0.5 mm to preserve SNR and SFDR. Keep digital outputs (D0-D13) isolated from analog inputs by at least 3 line widths.
Drive CLK+/CLK- with a low-jitter clock source such as the AD9517-4 or HMC7044; SNR degrades by approximately 1 dB per picosecond of input clock jitter at full input bandwidth per the Analog Devices datasheet. For SFDR-critical applications, add a bandpass anti-alias filter between the front-end amplifier (e.g., ADA4932-2) and AIN+/- to remove out-of-band harmonics before sampling.
Do not confuse the LTC2144CUP-14 (commercial 0 to +70 C) with the LTC2144IUP-14 (industrial -40 to +85 C). Both share pinout but the industrial temperature grade is required for outdoor or chassis-mounted installations. Avoid driving AIN+/- with a single-ended signal greater than the AVSS to AVDD range, which causes input ESD diode conduction and degrades linearity.
コンプライアンス情報
RoHS and lead-free per #PBF suffix on Analog Devices product page. Not AEC-Q100 qualified (commercial/industrial grade); AEC-Q100 variants would carry a different ordering suffix outside this datasheet family. REACH status compliant per standard Analog Devices declarations.
