LTC2391CLX-16 - 16-Bit 250ksps SAR ADC, 94dB SNR | Linear Technology
部品番号: LTC2391CLX-16 ✓ 生産中| 数量 | 単価 | 小計 |
|---|---|---|
| 1 | $32.4 | $32.40 |
| 10 | $28.95 | $289.50 |
| 100 | $24.5 | $2,450.00 |
| 500 | $21.2 | $10,600.00 |
| 1,000 | $18.4 | $18,400.00 |
LTC2391CLX-16 概要
What is a SAR ADC? A successive-approximation-register analog-to-digital converter is a precision data-conversion topology that performs a binary search against an internal DAC to digitize an analog input one bit at a time, typically completing a conversion in N clock cycles for an N-bit device. Within the broader signal-chain taxonomy, a SAR ADC sits under ADC (analog-to-digital converter) -> data converter -> mixed-signal IC -> semiconductor IC. SAR converters are favored over delta-sigma for multiplexed or multi-channel data acquisition where low latency and deterministic per-sample throughput matter more than absolute resolution beyond 18-20 bits.
Key features of the LTC2391CLX-16 include 94 dB SNR at the 250 ksps maximum sampling rate, an integrated 2.5 ppm/degree C (max) reference with 0.5% initial accuracy, true bipolar differential inputs spanning 4 * VREF, hardware-selectable parallel or serial (SPI-/QSPI-/MICROWIRE-compatible) interface, and dedicated nap and sleep power-down modes. The differential architecture inherently rejects common-mode noise and switching-rail interference from upstream analog front ends.
Architecture-wise, the LTC2391CLX-16 uses a charge-redistribution capacitive DAC core combined with an on-chip low-drift bandgap reference, sampled by a high-bandwidth input stage. The combination achieves 94 dB SNR while dissipating only 95 mW at full 250 ksps throughput, dropping below 12 mW in nap mode and below 1 microamp in sleep mode for battery-powered or duty-cycled instrumentation.
Typical applications include industrial process control and high-speed data acquisition, medical instrumentation front ends, seismic and vibration monitoring, ATE (automatic test equipment) digitizers, and precision multi-channel multiplexed systems where its zero-cycle-latency architecture eliminates the group delay of pipeline or delta-sigma converters.
When designing with the LTC2391CLX-16, place the analog and digital ground planes as a single solid pour under the device, decouple OVDD and AVDD with separate 10 microfarad + 0.1 microfarad ceramic pairs within 5 mm of the pins, and use a 100 ohm series resistor on each digital output to damp ringing on the parallel bus. Avoid routing the conversion clock near the analog inputs to preserve the 94 dB SNR floor.
This page synthesizes distributor pricing, drop-in pin-compatible alternatives, application guidance, and design notes not found in the manufacturer datasheet.
ドロップイン代替品: LTC2391CLX-16 — 同一パッケージでピン互換。PCBの作り直しが必要な異なるパッケージの部品は除外されています。
このシリーズのバリエーション
同一シリーズでドロップイン互換のモデル: LTC2391CLX-16 （同一形状・フットプリント） — 相違点: RoHS Status, Number of Channels, Package, Resolution, Input Type.
クイック比較ツール — 並列比較する代替部品を選択:
LTC2391ILX-16#PBF
✅ ドロップイン📋 参考代替品（カタログ未掲載）
LTC2391HLX-16#PBF
✅ ドロップイン📋 参考代替品（カタログ未掲載）
LTC2335HLX-16
✅ ドロップイン✓ 在庫あり
$15.4 / 個
データシートを見る →LTC2344CUH-18
✅ ドロップイン✓ 在庫あり
$18.2 / 個
データシートを見る →LTC2348HLX-18
✅ ドロップイン✓ 在庫あり
$58.1 / 個
データシートを見る →LTC2389ILX-16
✅ ドロップイン✓ 在庫あり
$35.21 / 個
データシートを見る →LTC2391CLX-16 最大定格＆電気的特性
| 分解能 | 16 bit |
| Architecture | SAR (Successive Approximation Register) |
| Number of Channels | 1 input, 1 SAR ADC |
| サンプリングレート | 250 ksps (max) |
| SNR | 94 dB |
| Input Type | Differential, true bipolar (+/-VREF) |
| Analog Supply Voltage | 5 V |
| Digital Supply Voltage | 5 V |
| Integrated Reference | Yes (0.5% initial accuracy, +/-20 ppm/degree C max) |
| インターフェース | Parallel or Serial (SPI/QSPI/MICROWIRE compatible) |
| Cycle Latency | 0 (no latency in both modes) |
| Power Dissipation (active, 250 ksps) | 95 mW |
| Power-Down Modes | Nap and Sleep |
| パッケージ | 48-LQFP (7x7 mm) |
| Operating Temperature (C grade) | 0 degree C to +70 degree C |
| 実装タイプ | Surface Mount |
| RoHS ステータス | Compliant (PBF suffix indicates Pb-free) |
LTC2391CLX-16 ピン構成
| ピン 1 | OGND — Output driver ground |
| ピン 2 | D15 — Parallel data output bit 15 (MSB) |
| ピン 3 | D14 — Parallel data output bit 14 |
| ピン 4 | D13 — Parallel data output bit 13 |
| ピン 5 | D12 — Parallel data output bit 12 |
| ピン 6 | D11 — Parallel data output bit 11 |
| ピン 7 | D10 — Parallel data output bit 10 |
| ピン 8 | D9 — Parallel data output bit 9 |
| ピン 9 | D8 — Parallel data output bit 8 |
| ピン 10 | OVDD — Output driver supply (5 V) |
| ピン 11 | D7 — Parallel data output bit 7 |
| ピン 12 | D6 — Parallel data output bit 6 |
| ピン 13 | D5 — Parallel data output bit 5 |
| ピン 14 | D4 — Parallel data output bit 4 |
| ピン 15 | D3 — Parallel data output bit 3 |
| ピン 16 | D2 — Parallel data output bit 2 |
| ピン 17 | D1 — Parallel data output bit 1 |
| ピン 18 | D0 — Parallel data output bit 0 (LSB) |
| ピン 19 | RD — Read signal for parallel interface (active low) |
| ピン 20 | CS — Chip select (active low) |
| ピン 21 | SCK — Serial interface clock input |
| ピン 22 | SDO — Serial data output |
| ピン 23 | SDI — Serial data input (for daisy-chain) |
| ピン 24 | BUSY — Conversion in progress indicator (active high) |
| ピン 25 | CONVST — Conversion start (active low) |
| ピン 26 | DGND — Digital ground |
| ピン 27 | DVDD — Digital supply (5 V) |
| ピン 28 | AGND — Analog ground |
| ピン 29 | AVDD — Analog supply (5 V) |
| ピン 30 | REF — Internal reference bypass / external reference input |
| ピン 31 | REFCAP — Internal reference bypass cap return |
| ピン 32 | REFCMP — Internal reference bypass cap node |
| ピン 33 | REFOUT — Internal reference output (2.5 V typ) |
| ピン 34 | IN+ — Positive differential analog input |
| ピン 35 | IN- — Negative differential analog input |
| ピン 36 | NC — Not connected (per datasheet) |
| ピン 37 | NC — Not connected (per datasheet) |
| ピン 38 | NC — Not connected (per datasheet) |
| ピン 39 | NC — Not connected (per datasheet) |
| ピン 40 | PAR/SER — Interface select (high=parallel, low=serial) |
| ピン 41 | OGND — Output driver ground (continued) |
| ピン 42 | OVDD — Output driver supply (5 V) (continued) |
| ピン 43 | OGND — Output driver ground |
| ピン 44 | OVDD — Output driver supply (5 V) |
| ピン 45 | OGND — Output driver ground |
| ピン 46 | OVDD — Output driver supply (5 V) |
| ピン 47 | AGND — Analog ground |
| ピン 48 | AVDD — Analog supply (5 V) |
主な用途
LTC2391CLX-16 の用途: 6 件s: Industrial Process Control and Data Acquisition, Medical Instrumentation Front End, Seismic and Vibration Monitoring Systems, Automatic Test Equipment (ATE) Digitizers, Precision Multi-Channel Multiplexed Systems, Portable Battery-Powered Instrumentation.
Industrial Process Control and Data Acquisition
The LTC2391CLX-16 is well-matched to industrial process-control data-acquisition front ends because its 250 ksps throughput with zero cycle latency gives deterministic per-sample conversion times that simplify PLC loop and PID control synchronization. The 94 dB SNR corresponds to roughly 15.3 effective bits, sufficient to resolve 4-20 mA loop signals and strain-gauge bridges after the analog front end. The integrated 0.5%-accurate reference with +/-20 ppm/degree C drift removes an external reference IC and its warm-up drift, improving long-term calibration stability. Place the LTC2391CLX-16 behind a true-bipolar input driver amplifier, decouple AVDD/OVDD with separate 10 microfarad + 0.1 microfarad ceramic pairs within 5 mm of the pins, and use the nap/sleep modes during inter-sample idle periods to drop dissipation from 95 mW toward 12 mW.
おすすめ
Medical Instrumentation Front End
The LTC2391CLX-16 fits medical instrumentation front ends such as patient monitors and diagnostic equipment because its 94 dB SNR provides the dynamic range required for ECG, EEG, and pulse-oximetry signal chains at modest sampling rates. True bipolar +/-VREF differential inputs directly digitize signals centered around 0 V without a level shifter, simplifying the instrumentation-amp-to-ADC interface. Zero cycle latency in both parallel and serial interface modes enables deterministic sampling triggered by clinical-event timing, which is important for synchronized multi-channel acquisition. The commercial C grade (0 to +70 degree C) suits in-room equipment; pair it with the LTC2391ILX-16 industrial variant for portable or in-ambulance units. Use a 100 ohm series resistor on each digital output to damp bus ringing and preserve the 94 dB SNR floor.
おすすめ
Seismic and Vibration Monitoring Systems
The LTC2391CLX-16's true-bipolar differential inputs and 250 ksps throughput make it suitable for seismic and vibration monitoring front ends, where accelerometer outputs naturally swing around 0 V and require accurate digitization at audio-bandwidth rates. 94 dB SNR corresponds to roughly 15.3 ENOB, sufficient to resolve sub-Hz geophone signals below 1 microvolt when paired with a low-noise charge amplifier. Zero cycle latency in serial mode allows the host microcontroller to start a conversion and read the result on the next SPI clock burst, simplifying deterministic sample-time tagging. Decouple AVDD separately from DVDD/OVDD, keep digital output traces short, and route the conversion clock away from the analog input traces to maintain the SNR floor.
おすすめ
Automatic Test Equipment (ATE) Digitizers
The LTC2391CLX-16 is well-suited to ATE digitizer cards because its 250 ksps throughput with zero cycle latency allows per-pin analog measurements to be sequenced at deterministic intervals without pipeline-fill delays, which simplifies test-program timing. The 94 dB SNR provides enough dynamic range to test 16-bit DAC linearity and ADC INL/DNL of the device-under-test to within 1 LSB. Hardware-selectable parallel or serial interface lets the same part serve either FPGA-based high-speed pin-electronics cards (parallel) or microcontroller-based bench-test instruments (serial). Use the nap and sleep modes between measurement bursts to reduce average power dissipation in dense multi-channel ATE chassis.
おすすめ
Precision Multi-Channel Multiplexed Systems
The LTC2391CLX-16 fits multiplexed data-acquisition systems where an external analog mux switches between 4-16 sensor channels feeding a single ADC input. Zero cycle latency in serial mode means the host can read the previous conversion while the mux settles on the next channel, eliminating the group delay of delta-sigma ADCs in scanned systems. The integrated precision reference and true-bipolar differential inputs remove the external reference and level-shift components typically required around a discrete ADC in multiplexed designs, reducing PCB area and BOM cost. Use the LTC2348HLX-18 (same 48-LQFP package, 8-channel input mux) when more integrated channels are needed at similar resolution.
おすすめ
Portable Battery-Powered Instrumentation
The LTC2391CLX-16's 95 mW active dissipation drops to under 1 microamp in sleep mode, giving a 95000:1 active-to-sleep power ratio that is well-matched to battery-powered handheld instrumentation such as portable data loggers, field analyzizers, and handheld vibration analyz. The integrated precision reference eliminates the standby current of an external reference IC during sleep, further extending battery life. Zero cycle latency means the host microcontroller can wake the ADC from sleep, perform a single conversion, and return to sleep within a few microseconds - ideal for duty-cycled sampling where the ADC is active for 0.1% of the time. As of 2026-10-13 the part is in active production at Analog Devices with no EOL notice, ensuring long-term availability for portable-product designs.
おすすめ
おすすめ製品の概要
エンジニアリング参考データ: LTC2391CLX-16 — 比較、設計ガイダンス、コンプライアンス情報。
選定ガイド
代替品との比較
| パラメータ | この製品 | LTC2391ILX-16#PBF | LTC2391HLX-16#PBF | LTC2335HLX-16 | LTC2344CUH-18 | LTC2389ILX-16 |
|---|---|---|---|---|---|---|
| Package | 48-LQFP (7x7 mm) | 48-LQFP (7x7 mm) - same | 48-LQFP (7x7 mm) - same | 48-LQFP (7x7 mm) - same | 48-LQFP - same | 48-LQFP (7x7 mm) - same |
| Brand | Analog Devices (Linear Technology) | Analog Devices - same | Analog Devices - same | Analog Devices - same | Analog Devices - same | Analog Devices - same |
| Resolution | 16 bit | 16 bit - same | 16 bit - same | 16 bit - same | 18 bit (+2 bits) | 16 bit - same |
| — | 250 ksps | 250 ksps - same | 250 ksps - same | 500 ksps (+100%) | 100 ksps (-60%) | 1.6 Msps (+540%) |
| SNR | 94 dB | 94 dB - same | 94 dB - same | 92 dB (-2 dB) | 102 dB (+8 dB) | 85 dB (-9 dB) |
| Architecture | SAR (zero latency) | SAR (zero latency) - same | SAR (zero latency) - same | SAR (zero latency) - same | SAR - same | Pipelined (1-2 cycle latency) |
| Input Type | True bipolar differential +/-VREF | True bipolar differential +/-VREF - same | True bipolar differential +/-VREF - same | Pseudo-differential | True bipolar differential +/-VREF | Differential |
| Operating Temperature | 0 to +70 degree C (C grade) | -40 to +85 degree C (I grade) | -40 to +125 degree C (H grade) | -40 to +125 degree C (H grade) | 0 to +70 degree C (C grade) | -40 to +85 degree C (I grade) |
| Integrated Reference | Yes (0.5% init, +/-20 ppm/degree C) | Yes - same | Yes - same | Yes | Yes | Yes |
主な差別化要因
- Zero cycle latency in both parallel and serial modes （vs LTC2389ILX-16)
- True bipolar +/-VREF differential inputs （vs LTC2335HLX-16)
- Same package, different temperature grade （vs LTC2391ILX-16#PBF)
- 94 dB SNR at full 250 ksps throughput （vs LTC2335HLX-16)
設計ノート
Use a single solid ground plane under the LTC2391CLX-16 with the analog ground (AGND) and digital ground (DGND) pins tied together directly at the device pin-side. Place separate 10 microfarad + 0.1 microfarad ceramic bypass pairs on AVDD, DVDD, and OVDD, each within 5 mm of the respective supply pin. Avoid routing the parallel data bus D15-D0 across the analog IN+/IN- input traces - keep digital outputs short and group them on one side of the package to maintain the 94 dB SNR floor.
Add a 100 ohm series resistor at each parallel digital output (D0-D15) and at BUSY, CONVST, SCK, SDO, and CS to damp bus ringing when driving capacitive loads above 20 pF. Keep the analog input traces IN+ and IN- routed as a differential pair with matched length and 100 ohm characteristic impedance on the outer layer, surrounded by ground pour. Place the REFCMP/REFCAP bypass capacitors as close to the reference pins as possible to filter the internal 2.5 V reference noise.
Do not connect a load to REFOUT that draws more than 1 mA or the internal reference voltage will droop, degrading SNR. Do not apply analog inputs that exceed AVDD + 0.3 V or fall below AGND - 0.3 V - the input protection diodes will forward-conduct and inject charge into the sample capacitors, corrupting the next conversion. Do not toggle the PAR/SER pin while the device is active - it can cause a transient on the reference; only reconfigure the interface while the part is in sleep mode.
Estimated: total quiescent current draw is approximately 19 mA at AVDD+DVDD+OVDD combined (95 mW / 5 V) when sampling at 250 ksps. To maximize battery life in portable applications, drive the CONVST pin from a host microcontroller GPIO and use sleep mode (less than 1 microamp) between conversions. Use a low-IQ LDO such as the LT3009 with less than 5 microamp quiescent current on the ADC supply rail to minimize total system sleep current.
コンプライアンス情報
Pb-free per #PBF suffix. RoHS and REACH compliant per Analog Devices product page. Not AEC-Q100 qualified - the C grade is commercial (0 to +70 degree C); choose I or H grade (LTC2391ILX-16 or LTC2391HLX-16) for automotive temperature requirements.
