MAX166BEWP - 8-Bit 200ksps 5µs ADC + 2.46V Ref | Maxim Integrated
部品番号: MAX166BEWP ✗ 生産終了| 数量 | 単価 | 小計 |
|---|---|---|
| 1 | $7.93 | $7.93 |
| 10 | $7.14 | $71.40 |
| 100 | $6.34 | $634.00 |
| 500 | $5.71 | $2,855.00 |
| 1,000 | $5.08 | $5,080.00 |
MAX166BEWP 概要
An ADC (analog-to-digital converter) is a mixed-signal integrated circuit that converts a continuous analog voltage into a discrete digital code. Successive-approximation-register (SAR) ADCs such as the MAX166 combine a sample-and-hold front-end, an internal DAC, and a comparator to perform one bit per clock cycle, yielding deterministic latency and excellent DC linearity for multiplexed data-acquisition and process-control front ends. Within the broader taxonomy, the MAX166 sits at: ADC -> data converter -> mixed-signal IC -> semiconductor.
Key features of the MAX166 include 5 µs conversion time (200 ksps throughput), an internal 2.46 V bandgap reference, a single +5 V supply operation, and an on-chip track/hold that removes the need for an external sample-and-hold amplifier. The interface is a multiplexed /CS, /RD, /BUSY handshake, and the part is specified over the -40 °C to +85 °C industrial temperature range. Three-state latched outputs ease bus sharing across multiple peripherals.
Architecturally, the MAX166 uses a switched-capacitor charge-redistribution DAC core, which is why the track/hold can be co-integrated with the comparator and reference without the linearity penalty of older resistor-string designs. The internal reference provides low drift over temperature, simplifying analog front-end design and removing external trim steps in production. Compared with flash ADCs of equivalent resolution, the MAX166's SAR topology trades conversion speed for substantially lower power consumption and much smaller die area.
Typical applications include process-control front ends, portable data loggers, industrial instrumentation, remote sensor readback, panel-meter designs, and embedded µP data-acquisition boards where deterministic conversion latency and direct bus interface matter more than multi-Msample throughput. The 20-pin SOIC footprint also supports hand-prototyping and breadboarding without fine-pitch assembly.
When designing with this part, place a 0.1 µF ceramic bypass capacitor directly across VDD and AGND as close to the pins as possible, and keep analog input traces short and guarded to limit digital coupling. Ensure the µP completes a read of the result register before the next conversion finishes, or use the BUSY line to gate access and avoid bus contention.
This page synthesizes distributor pricing, drop-in alternatives, and practical design notes that go beyond the manufacturer datasheet, helping engineers select, source, and qualify the MAX166BEWP for production designs.
ドロップイン代替品: MAX166BEWP — 同一パッケージでピン互換。PCBの作り直しが必要な異なるパッケージの部品は除外されています。
このシリーズのバリエーション
同一シリーズでドロップイン互換のモデル: MAX166BEWP （同一形状・フットプリント） — 相違点: Operating Temperature, Package, Conversion Time, Architecture, Data Interface.
クイック比較ツール — 並列比較する代替部品を選択:
MAX166BEWP+
✅ ドロップイン📋 参考代替品（カタログ未掲載）
MAX166AEWP+
✅ ドロップイン📋 参考代替品（カタログ未掲載）
MAX165BCWN
✅ ドロップイン✓ 在庫あり
$12.4 / 個
データシートを見る →MAX165ACWN
✅ ドロップイン✓ 在庫あり
$4.2 / 個
データシートを見る →MAX166CEWP+
✅ ドロップイン ⚠️ 仕様未検証📋 参考代替品（カタログ未掲載）
ADC0804LCN
✅ ドロップイン✓ 在庫あり
$3.84 / 個
データシートを見る →MAX166BEWP 最大定格＆電気的特性
| 分解能 | 8 bit |
| Conversion Time | 5 µs |
| Sample Rate | 200 ksps |
| Architecture | SAR (Successive Approximation) |
| Number of Channels | 1 |
| Internal Reference | 2.46 V |
| Input Type | Single-ended, with Track/Hold |
| Data Interface | Parallel, µP-compatible (CS, RD, BUSY) |
| データバス幅 | 8 bit |
| 電源電圧 | +5 V (single supply) |
| 動作温度 | -40 °C to +85 °C (industrial) |
| パッケージ | 20-pin SOIC (0.300") |
| 実装タイプ | Surface Mount |
| RoHS ステータス | Non-RoHS (MAX166BEWP, no + suffix) |
| Lead-Free Version | MAX166BEWP+ is the lead-free/RoHS variant |
MAX166BEWP ピン構成
| ピン 1 | AIN — Analog input |
| ピン 2 | VREF — Reference voltage (internal 2.46 V) |
| ピン 3 | AGND — Analog ground |
| ピン 4 | VDD — +5 V supply |
| ピン 5 | D0 — Data bit 0 (LSB) |
| ピン 6 | D1 — Data bit 1 |
| ピン 7 | D2 — Data bit 2 |
| ピン 8 | D3 — Data bit 3 |
| ピン 9 | D4 — Data bit 4 |
| ピン 10 | D5 — Data bit 5 |
| ピン 11 | D6 — Data bit 6 |
| ピン 12 | D7 — Data bit 7 (MSB) |
| ピン 13 | BUSY — Conversion in progress (active high) |
| ピン 14 | CS — Chip select (active low) |
| ピン 15 | RD — Read strobe (active low) |
| ピン 16 | WR — Write / conversion start (active low) |
| ピン 17 | CLK — Internal/External clock |
| ピン 18 | MODE — Mode select |
| ピン 19 | DGND — Digital ground |
| ピン 20 | NC — Not connected (per datasheet) |
主な用途
MAX166BEWP の用途: 6 件s: Process Control Front End, Portable Data Logger, Industrial Instrumentation Panel, Remote Sensor Readback (SCADA RTU), Embedded MCU Data Acquisition Board, Panel-Meter and Weigh-Scale Readout.
Process Control Front End
The MAX166BEWP fits process-control front ends because its 5 µs conversion time (200 ksps) provides deterministic latency for closed-loop feedback loops reading thermocouples, pressure transducers, and 4–20 mA current loops. The integrated 2.46 V reference removes one external component, the single +5 V supply aligns with industrial backplanes, and the parallel µP-compatible bus (CS, RD, BUSY) drops directly onto an 8-bit MCU data bus without glue logic. The industrial -40 °C to +85 °C temperature range supports factory-floor deployment. Compared with a flash ADC, the SAR architecture here trades a few hundred nanoseconds of throughput for far lower power consumption — a meaningful trade-off in a 24/7 PLC rack. Recommended companion MPN: MAX165ACWN (SAR co-processor) and MAX148AEPP+ (RS-485 comms backhaul).
おすすめ
Portable Data Logger
For portable data loggers, the MAX166BEWP offers 8-bit resolution at 200 ksps with a low-power CMOS SAR core that fits battery-powered designs. The integrated track/hold removes an external sample-and-hold amplifier, the 2.46 V internal reference simplifies analog scaling for low-voltage sensor outputs, and the 20-pin SOIC package is hand-solderable for prototype builds. The parallel bus lets a small 8-bit MCU read conversion results with a single MOVX instruction, leaving the CPU free for SD card writing. Designers should add an external op-amp buffer on AIN if the source impedance exceeds the datasheet's recommended maximum, and use the BUSY line to gate bus access between conversions. Recommended companion MPN: MAX150ACWP+T (low-power LDO) and MAX147AEAP (external EEPROM log buffer).
おすすめ
Industrial Instrumentation Panel
The MAX166BEWP is well suited to industrial instrumentation panels (digital panel meters, bench-top multimeters, weigh scales) where 8-bit resolution is sufficient and the 200 ksps throughput exceeds mechanical settling times. The internal 2.46 V reference provides good temperature stability for panel-meter calibration, and the parallel bus lets the meter MCU refresh its LCD readout directly from the ADC data lines without an external latch. The wide-body 20-pin SOIC survives vibration-prone panel environments and is compatible with hand-rework. Trade-off: 8-bit resolution limits use to applications where the displayed value range requires ~0.4 % step resolution; for higher precision, the MAX1062 or MAX1300 family is recommended. Recommended companion MPN: MAX155ACPI+ (precision op-amp input buffer) and MAX1270ACNG (12-bit upgrade path).
おすすめ
Remote Sensor Readback (SCADA RTU)
In remote sensor readback modules — SCADA RTUs, telemetry outstations, irrigation controllers — the MAX166BEWP's 5 µs SAR conversion, integrated track/hold, and µP-compatible bus provide a deterministic digital front end for slow analog sensors such as soil moisture probes, water-level sensors, and solar irradiance pyranometers. The single +5 V supply aligns with RTU backplanes, and the industrial temperature range supports outdoor cabinet operation. The 200 ksps throughput is overkill for sub-Hz sensor rates but lets the RTU multiplex many channels with deterministic phase delay. The 2.46 V internal reference lets a simple resistive divider drive AIN directly from a 0–5 V transducer output, eliminating an external precision reference. Recommended companion MPN: MAX1285BCSA (12-bit precision upgrade) and MAX148AEPP+ (RS-485 comms).
おすすめ
Embedded MCU Data Acquisition Board
The MAX166BEWP drops cleanly into an embedded 8051/PIC/AVR data acquisition board as a parallel-bus ADC peripheral. The CS, RD, and BUSY handshake maps to standard 8-bit MCU external-memory cycles, and the three-state latched data outputs avoid contention when the bus is shared with RAM or another peripheral. The 5 µs conversion time means an MCU running at 12 MHz can poll the BUSY line and read the result register with less than 50 instruction cycles of overhead per sample. The integrated track/hold removes the need for an external sample-and-hold amplifier, lowering BOM cost on student-grade and hobby boards. Trade-off: the parallel bus consumes 11 MCU pins; consider a serial-interface ADC such as MAX1249BCEE if the MCU pin budget is tight. Recommended companion MPN: MAX162ACNG+ (8-bit MUX) and MAX147AEAP (calibration EEPROM).
おすすめ
Panel-Meter and Weigh-Scale Readout
Weigh scales and panel meters benefit from the MAX166BEWP's 8-bit SAR conversion, internal 2.46 V reference, and direct µP bus interface. The 5 µs conversion time is fast enough for any human-scale weighing cycle, and the integrated track/hold eliminates settling-time design effort between the load cell amplifier and the ADC. The 20-pin SOIC package simplifies the PCB layout, keeping analog input traces short and guarded. The internal reference provides ±5 % initial accuracy that is typically trimmed in software via a two-point calibration stored in EEPROM. For higher-precision weigh scales requiring 12-bit or 16-bit resolution, the MAX1302 or MAX11131 family is the recommended upgrade path. Recommended companion MPN: MAX155ACPI+ (precision instrumentation front-end) and MAX147AEAP (calibration EEPROM).
おすすめ
おすすめ製品の概要
エンジニアリング参考データ: MAX166BEWP — 比較、設計ガイダンス、コンプライアンス情報。
選定ガイド
代替品との比較
| パラメータ | この製品 | MAX166BEWP+ | MAX166AEWP+ | MAX165BCWN | MAX165ACWN | MAX166CEWP+ | ADC0804LCN |
|---|---|---|---|---|---|---|---|
| Brand | Maxim Integrated | Maxim Integrated | Maxim Integrated | Maxim Integrated | Maxim Integrated | Maxim Integrated | Microchip Technology |
| Package | 20-pin SOIC (0.300") | 20-pin SOIC (0.300") | 20-pin SOIC (0.300") | 20-pin SOIC (0.300") | 20-pin SOIC (0.300") | 20-pin SOIC (0.300") | 20-pin PDIP/SOIC |
| Resolution | 8 bit | 8 bit | 8 bit | 8 bit | 8 bit | 8 bit | 8 bit |
| Sample Rate | 200 ksps | 200 ksps | 200 ksps | 200 ksps-class | 200 ksps-class | 200 ksps | ~10 ksps (clock-dependent) |
| Interface | Parallel, µP-compatible (CS, RD, BUSY) | Parallel, µP-compatible (CS, RD, BUSY) | Parallel, µP-compatible (CS, RD, BUSY) | Parallel, µP-compatible | Parallel, µP-compatible | Parallel, µP-compatible (CS, RD, BUSY) | Parallel, CS/RD active HIGH (polarity differs) |
| Lifecycle Status | NRND | NRND (lead-free variant) | Active | NRND | NRND | NRND | Active (legacy) |
主な差別化要因
- Integrated 2.46 V reference on-chip （vs ADC0804LCN)
- 200 ksps throughput with active-low CS/RD handshake （vs MAX165BCWN)
- Industrial -40 °C to +85 °C temperature range （vs MAX166CEWP+ (C-grade, 0 °C to +70 °C))
設計ノート
Place a 0.1 µF ceramic bypass capacitor as close as possible across VDD (pin 4) and AGND (pin 3) on the MAX166BEWP, with a bulk 10 µF tantalum or aluminum electrolytic on the same 5 V rail within 25 mm. The internal 2.46 V reference is sensitive to supply noise; if VDD is shared with a switching regulator, add a 10 Ω ferrite-bead RC filter. Estimated: input current draw from datasheet typical values is ~5 mA during conversion, so a 10 µF bulk provides ~30 ms of hold-up for short supply transients.
Keep the AIN analog input trace short (less than 25 mm) and guarded with a ground trace on both sides to limit digital coupling from the parallel data bus. The MAX166BEWP's internal track/hold samples at the WR rising edge; high source impedance (>1 kΩ) on AIN introduces settling-time errors, so buffer the input with a low-offset op-amp such as MAX155ACPI+ if the transducer cannot drive low impedance. Connect AGND and DGND to a single ground plane at one point near the IC to avoid ground-loop noise.
Do not leave the BUSY pin floating — the MAX166BEWP requires BUSY to drive the external MCU's interrupt or polled-input line to gate bus access; a floating BUSY can cause spurious reads. Ensure CS and RD do not overlap in ways that violate the datasheet timing diagram (tCSS, tRDS, tDSR); failing this causes the data bus to remain in high-Z during a read attempt. The MAX166BEWP (non-+ suffix) uses SnPb lead finish; for RoHS assemblies use MAX166BEWP+ which requires 245 °C peak reflow versus 220 °C.
コンプライアンス情報
MAX166BEWP (no + suffix) is non-RoHS due to SnPb lead finish. The MAX166BEWP+ variant is RoHS-compliant lead-free. AEC-Q100 not applicable (industrial-grade ADC). REACH compliance per Maxim Integrated product declaration.
