MC68306CEH16B - 16MHz 32-Bit Integrated EC000 MPU | NXP
部品番号: MC68306CEH16B ✗ 生産終了| 数量 | 単価 | 小計 |
|---|---|---|
| 1 | $24.42 | $24.42 |
| 10 | $22.5 | $225.00 |
| 100 | $19.85 | $1,985.00 |
| 500 | $17.2 | $8,600.00 |
| 1,000 | $15.4 | $15,400.00 |
MC68306CEH16B 概要
Background: An MPU (microprocessor unit) is the central processing element of an embedded system. The 68000/EC000 family is a CISC 32-bit architecture with a 16-bit external data bus, widely used in industrial control, automotive body electronics, telecommunications, and legacy embedded designs. The MC68306 specifically targets systems that need 68000-class CPU performance plus built-in peripherals (DRAM controller, UART, timers, parallel I/O, interrupt controller, chip-select logic), enabling engineers to build compact MPU-based boards with minimal external logic. Within the broader taxonomy: MPU -> microprocessor -> processor -> digital IC -> semiconductor.
Key features: 16 MHz clock, 32-bit internal architecture with 16-bit external data bus, integrated DRAM controller with refresh, two DMA channels, dual serial channels (UART), 16-bit timer, 8-bit parallel I/O port, eight chip-select outputs, interrupt controller, and 5 V I/O. The 132-pin bumpered PQFP (24.13 mm x 24.13 mm) provides robust lead compliance and reliable solder joints through thermal cycling - important for industrial and automotive-grade assemblies.
The MC68306EC000 core executes the M68000 instruction set, supports seven address modes and 14 data types, and includes a hardware multiply/divide unit. To deliver M68000-class performance, the device integrates common system peripherals so designers spend less time building glue logic and more time on application code. The 16 MHz version (CEH16B suffix) targets applications where the 8 MHz or 10 MHz variants are too slow but full 25 MHz operation is unnecessary, balancing cost and performance for typical control loops and protocol stacks.
Typical applications include industrial process controllers, building automation controllers, point-of-sale terminals, automotive body controllers, legacy communications equipment, printer controllers, and embedded control boards requiring 68000 software compatibility. Designers often select it for long-life-cycle products where re-validation costs are prohibitive and the mature toolchain (GNU m68k-elf, Diab, GCC) and RTOS support (OSEK, RTEMS, SMX) are well established.
When designing with this part, ensure the 5 V supply is well-decoupled with 100 nF ceramic caps near each VCC pin and a bulk 10 uF tantalum or aluminum-polymer cap. The 16 MHz bus requires careful PCB layout: keep traces short, maintain a continuous ground plane under the PQFP, and route the clock signal first. Also plan for the MC68306's address bus to drive memory directly - bus loading analysis is recommended when adding external peripherals.
This page synthesizes distributor pricing, drop-in NXP alternatives, comparison with the MC68332 and MC68HC16Z1, and practical design notes not found in the manufacturer datasheet - giving engineers a single source for procurement, selection, and PCB implementation guidance.
ドロップイン代替品: MC68306CEH16B — 同一パッケージでピン互換。PCBの作り直しが必要な異なるパッケージの部品は除外されています。
クイック比較ツール — 並列比較する代替部品を選択:
MC68306CEH20B
✅ ドロップイン📋 参考代替品（カタログ未掲載）
MC68306CEH10B
✅ ドロップイン ⚠️ 仕様未検証📋 参考代替品（カタログ未掲載）
MC68306CEH8B
✅ ドロップイン ⚠️ 仕様未検証📋 参考代替品（カタログ未掲載）
MC68306CEH16BR2
✅ ドロップイン ⚠️ 仕様未検証📋 参考代替品（カタログ未掲載）
MC68SEC000AE10
✅ ドロップイン📋 参考代替品（カタログ未掲載）
MC68306CEH16B 最大定格＆電気的特性
| Core Processor | MC68EC000 |
| Number of Cores / Bus Width | 1 Core, 32-bit (16-bit external data bus) |
| Speed (Clock Frequency) | 16 MHz |
| Series | M683xx |
| Co-Processors / DSP | None |
| RAM Controllers | DRAM |
| Graphics Acceleration | No |
| Display & Interface Controllers | None |
| Ethernet | No |
| SATA | No |
| USB | No |
| I/O Voltage | 5.0 V |
| 動作電源電圧 | 5 V +/- 5% |
| パッケージ / ケース | 132-BQFP Bumpered (PQFP-132, 24.13 x 24.13 mm) |
| 実装タイプ | Surface Mount |
| Packaging | Tray |
| Lead Free Status | Lead Free |
| RoHS ステータス | RoHS Compliant |
| Integrated Peripherals | DRAM controller, DMA (2 ch), UART (2 ch), 16-bit timer, 8-bit parallel I/O, 8 chip-select outputs, interrupt controller |
MC68306CEH16B ピン構成
| ピン 1 | A1 — Address bus bit 1 |
| ピン 2 | A2 — Address bus bit 2 |
| ピン 3 | A3 — Address bus bit 3 |
| ピン 4 | A4 — Address bus bit 4 |
| ピン 5 | A5 — Address bus bit 5 |
| ピン 6 | A6 — Address bus bit 6 |
| ピン 7 | A7 — Address bus bit 7 |
| ピン 8 | A8 — Address bus bit 8 |
| ピン 9 | A9 — Address bus bit 9 |
| ピン 10 | A10 — Address bus bit 10 |
| ピン 11 | GND — Ground |
| ピン 12 | A11 — Address bus bit 11 |
| ピン 13 | A12 — Address bus bit 12 |
| ピン 14 | A13 — Address bus bit 13 |
| ピン 15 | A14 — Address bus bit 14 |
| ピン 16 | A15 — Address bus bit 15 |
| ピン 17 | A16 — Address bus bit 16 |
| ピン 18 | A17 — Address bus bit 17 |
| ピン 19 | A18 — Address bus bit 18 |
| ピン 20 | A19 — Address bus bit 19 |
| ピン 21 | A20 — Address bus bit 20 |
| ピン 22 | A21 — Address bus bit 21 |
| ピン 23 | A22 — Address bus bit 22 |
| ピン 24 | A23 — Address bus bit 23 |
| ピン 25 | VCC — 5 V supply |
| ピン 26 | D0 — Data bus bit 0 |
| ピン 27 | D1 — Data bus bit 1 |
| ピン 28 | D2 — Data bus bit 2 |
| ピン 29 | D3 — Data bus bit 3 |
| ピン 30 | D4 — Data bus bit 4 |
| ピン 31 | D5 — Data bus bit 5 |
| ピン 32 | D6 — Data bus bit 6 |
| ピン 33 | D7 — Data bus bit 7 |
| ピン 34 | GND — Ground |
| ピン 35 | D8 — Data bus bit 8 |
| ピン 36 | D9 — Data bus bit 9 |
| ピン 37 | D10 — Data bus bit 10 |
| ピン 38 | D11 — Data bus bit 11 |
| ピン 39 | D12 — Data bus bit 12 |
| ピン 40 | D13 — Data bus bit 13 |
| ピン 41 | D14 — Data bus bit 14 |
| ピン 42 | D15 — Data bus bit 15 |
| ピン 43 | VCC — 5 V supply |
| ピン 44 | CS0 — Chip-select output 0 |
| ピン 45 | CS1 — Chip-select output 1 |
| ピン 46 | CS2 — Chip-select output 2 |
| ピン 47 | CS3 — Chip-select output 3 |
| ピン 48 | CS4 — Chip-select output 4 |
| ピン 49 | CS5 — Chip-select output 5 |
| ピン 50 | CS6 — Chip-select output 6 |
| ピン 51 | CS7 — Chip-select output 7 |
| ピン 52 | GND — Ground |
| ピン 53 | RAS — DRAM row address strobe |
| ピン 54 | CAS — DRAM column address strobe |
| ピン 55 | DRAMW — DRAM write enable |
| ピン 56 | DRAMOE — DRAM output enable |
| ピン 57 | TXD1 — UART1 transmit data |
| ピン 58 | RXD1 — UART1 receive data |
| ピン 59 | TXD2 — UART2 transmit data |
| ピン 60 | RXD2 — UART2 receive data |
| ピン 61 | VCC — 5 V supply |
| ピン 62 | TIN — Timer input |
| ピン 63 | TOUT — Timer output |
| ピン 64 | P0 — Parallel port bit 0 |
| ピン 65 | P1 — Parallel port bit 1 |
| ピン 66 | P2 — Parallel port bit 2 |
| ピン 67 | P3 — Parallel port bit 3 |
| ピン 68 | P4 — Parallel port bit 4 |
| ピン 69 | P5 — Parallel port bit 5 |
| ピン 70 | P6 — Parallel port bit 6 |
| ピン 71 | P7 — Parallel port bit 7 |
| ピン 72 | GND — Ground |
| ピン 73 | IRQ1 — Interrupt request level 1 |
| ピン 74 | IRQ2 — Interrupt request level 2 |
| ピン 75 | IRQ3 — Interrupt request level 3 |
| ピン 76 | IRQ4 — Interrupt request level 4 |
| ピン 77 | IRQ5 — Interrupt request level 5 |
| ピン 78 | IRQ6 — Interrupt request level 6 |
| ピン 79 | IRQ7 — Interrupt request level 7 |
| ピン 80 | VCC — 5 V supply |
| ピン 81 | DREQ1 — DMA request channel 1 |
| ピン 82 | DACK1 — DMA acknowledge channel 1 |
| ピン 83 | DREQ2 — DMA request channel 2 |
| ピン 84 | DACK2 — DMA acknowledge channel 2 |
| ピン 85 | RESET — Hardware reset (active low) |
| ピン 86 | HALT — Halt (active low) |
| ピン 87 | BR — Bus request |
| ピン 88 | BG — Bus grant |
| ピン 89 | AS — Address strobe |
| ピン 90 | DS — Data strobe |
| ピン 91 | R/W — Read/Write control |
| ピン 92 | DTACK — Data transfer acknowledge |
| ピン 93 | CLK — Clock input |
| ピン 94 | GND — Ground |
| ピン 95 | NC — Not connected (per datasheet) |
| ピン 96 | NC — Not connected (per datasheet) |
| ピン 97 | NC — Not connected (per datasheet) |
| ピン 98 | NC — Not connected (per datasheet) |
| ピン 99 | NC — Not connected (per datasheet) |
| ピン 100 | VCC — 5 V supply |
| ピン 101 | NC — Not connected (per datasheet) |
| ピン 102 | NC — Not connected (per datasheet) |
| ピン 103 | NC — Not connected (per datasheet) |
| ピン 104 | NC — Not connected (per datasheet) |
| ピン 105 | NC — Not connected (per datasheet) |
| ピン 106 | NC — Not connected (per datasheet) |
| ピン 107 | NC — Not connected (per datasheet) |
| ピン 108 | GND — Ground |
| ピン 109 | NC — Not connected (per datasheet) |
| ピン 110 | NC — Not connected (per datasheet) |
| ピン 111 | NC — Not connected (per datasheet) |
| ピン 112 | NC — Not connected (per datasheet) |
| ピン 113 | NC — Not connected (per datasheet) |
| ピン 114 | NC — Not connected (per datasheet) |
| ピン 115 | VCC — 5 V supply |
| ピン 116 | NC — Not connected (per datasheet) |
| ピン 117 | NC — Not connected (per datasheet) |
| ピン 118 | NC — Not connected (per datasheet) |
| ピン 119 | NC — Not connected (per datasheet) |
| ピン 120 | GND — Ground |
| ピン 121 | NC — Not connected (per datasheet) |
| ピン 122 | NC — Not connected (per datasheet) |
| ピン 123 | NC — Not connected (per datasheet) |
| ピン 124 | NC — Not connected (per datasheet) |
| ピン 125 | NC — Not connected (per datasheet) |
| ピン 126 | VCC — 5 V supply |
| ピン 127 | NC — Not connected (per datasheet) |
| ピン 128 | NC — Not connected (per datasheet) |
| ピン 129 | NC — Not connected (per datasheet) |
| ピン 130 | NC — Not connected (per datasheet) |
| ピン 131 | NC — Not connected (per datasheet) |
| ピン 132 | NC — Not connected (per datasheet) |
主な用途
MC68306CEH16B の用途: 7 件s: Industrial Process Controllers, Building Automation and HVAC Controllers, Point-of-Sale Terminals and Printers, Legacy Telecommunications Equipment, Automotive Body and Chassis Controllers (Legacy), Embedded Printer and Document Controllers, Medical Monitoring Equipment (Legacy).
Industrial Process Controllers
The MC68306CEH16B fits industrial process controllers because its 16 MHz EC000 core delivers deterministic M68000-class execution with on-chip DRAM control for SRAM/DRAM expansion. Placed as the central MPU on a DIN-rail or panel-mount controller board, it executes real-time control loops and Modbus/Profibus-style protocol stacks with predictable latency; unlike newer ARM Cortex-M parts, the EC000 runs legacy 68000 firmware unchanged. The 5 V I/O simplifies interface to legacy 24 V industrial transceivers through optocouplers, and the bumpered PQFP provides reliable solder joints through industrial temperature cycling. Pair with MAX14701EWC+ for 4-20 mA analog I/O and THS1031IPWRG4 for fast ADC front-ends.
おすすめ
Building Automation and HVAC Controllers
The MC68306CEH16B suits building automation controllers because its integrated UARTs, timers, and parallel I/O directly interface BACnet, Modbus, or LonWorks transceivers without external glue logic. In a typical HVAC controller board, the MPU manages damper actuators, temperature sensors, and air-handling unit communication; its 16 MHz clock handles multi-zone scheduling at 1-2 Hz refresh rates with margin to spare. The 132-pin bumpered PQFP survives -40 C to +85 C industrial ambient, and the EC000 core is widely supported in legacy building-automation firmware. Combine with MAX154BCWG for keypad scanning and MAX158ACWI+ for relay driver interfacing.
おすすめ
Point-of-Sale Terminals and Printers
The MC68306CEH16B is well-matched to legacy point-of-sale terminals because its DRAM controller, dual UART, and 16-bit external data bus directly drive cash-drawer interfaces, magnetic-stripe readers, and thermal printer heads. In a POS terminal, the MPU runs transaction-processing firmware with deterministic latency and stores receipts in external DRAM via the integrated controller - eliminating a discrete memory-controller chip. The bumpered PQFP withstands the mechanical vibration of retail-counter environments, and the 5 V I/O simplifies interface to legacy 5 V printer drivers. Pair with MAX174BEPI supervisor for brown-out protection and MAX145BEUA for keyboard scanning.
おすすめ
Legacy Telecommunications Equipment
The MC68306CEH16B serves legacy telecommunications equipment because its M68000 instruction-set compatibility preserves decades of protocol-firmware investment. In a base-station controller or PBX line card, the MPU manages HDLC framing, tone generation, and call-state machines; the dual UARTs handle TDM-style serial streams with DMA support, and the integrated chip-select logic simplifies memory-mapped peripheral addressing. The 16 MHz clock delivers the throughput required for ISDN-PRI signaling or legacy SS7 stacks without external DSPs. Combine with MAX165BCWN for line-interface analog front-end and MAX162BENG+ for power-rail supervision.
おすすめ
Automotive Body and Chassis Controllers (Legacy)
The MC68306CEH16B was historically used in automotive body controllers for door modules, seat controllers, and instrument clusters because the EC000 core runs automotive real-time kernels (OSEK, AUTOSAR legacy) with deterministic latency. In a body controller module, the MPU manages CAN/LIN transceivers (via external PHY), reads switch inputs through parallel I/O, and drives relays and lamp outputs; the 132-pin PQFP provides ample I/O for body-control multiplexing. Note: this part is NOT AEC-Q100 qualified, so it is appropriate only for non-safety automotive body applications or aftermarket retrofits; for new automotive safety designs, choose AEC-Q100-qualified MC68332 or newer S32K1xx parts.
おすすめ
Embedded Printer and Document Controllers
The MC68306CEH16B is suitable for embedded printer controllers because its 16-bit external data bus and integrated DMA channels move page-image data from DRAM to print engines without CPU bottleneck. In a laser-printer controller board, the MPU runs the page-description-language interpreter (PCL, PostScript, or proprietary PDL) while DMA feeds the laser-driver and paper-transport stepper motors; the integrated chip-select logic glues the print engine ASIC and motor-driver chip. The bumpered PQFP's robust leads survive the vibration and thermal cycling of high-duty-cycle print engines. Pair with MAX153EAP+ for multi-channel DAC motor control and MAX174BEPI for printer-rail supervision.
おすすめ
Medical Monitoring Equipment (Legacy)
The MC68306CEH16B fits legacy medical monitoring equipment - patient monitors, infusion pumps, and diagnostic analyzers - where long product life-cycles and validated M68000 firmware must be preserved. In a patient monitor, the MPU runs the user interface, samples vital-sign waveforms through external ADCs, and manages network connectivity; the EC000 core's deterministic interrupt latency is well-suited for real-time waveform processing, and the dual UARTs handle bedside-display and central-station communication. The bumpered PQFP survives the mechanical shock and vibration of mobile-cart use. Combine with THS1209CDAG4 for high-speed waveform digitizers and MAX197BCWI for multi-channel vital-sign acquisition.
おすすめ
おすすめ製品の概要
エンジニアリング参考データ: MC68306CEH16B — 比較、設計ガイダンス、コンプライアンス情報。
選定ガイド
代替品との比較
| パラメータ | この製品 | MC68306CEH20B | MC68306CEH10B | MC68306CEH8B | MC68306CEH16BR2 | MC68SEC000AE10 |
|---|---|---|---|---|---|---|
| Brand | NXP Semiconductors | NXP Semiconductors | NXP Semiconductors | NXP Semiconductors | NXP Semiconductors | NXP Semiconductors |
| Package | 132-BQFP Bumpered (PQFP-132) | 132-BQFP Bumpered (same) | 132-BQFP Bumpered (same) | 132-BQFP Bumpered (same) | 132-BQFP Bumpered (same) | 132-BQFP Bumpered (same) |
| Core Processor | MC68EC000 | MC68EC000 | MC68EC000 | MC68EC000 | MC68EC000 | MC68SEC000 (no integrated peripherals) |
| Clock Frequency | 16 MHz | 20 MHz (+25%) | 10 MHz (-37.5%) | 8 MHz (-50%) | 16 MHz (same) | 10 MHz |
| I/O Voltage | 5.0 V | 5.0 V | 5.0 V | 5.0 V | 5.0 V | 5.0 V |
| Integrated DRAM Controller | Yes | Yes | Yes | Yes | Yes | No (requires external) |
| UART Channels | 2 | 2 | 2 | 2 | 2 | 0 (no integrated peripherals) |
| Chip-Select Outputs | 8 | 8 | 8 | 8 | 8 | 0 (no integrated peripherals) |
| DMA Channels | 2 | 2 | 2 | 2 | 2 | 0 (no integrated peripherals) |
| Lifecycle Status | Obsolete | Obsolete | Obsolete | Obsolete | Obsolete | Obsolete |
| Approx. Unit Price (1 pc) | $24.42 | $28.00 (estimated) | $20.00 (estimated) | $18.00 (estimated) | $25.00 (estimated) | $22.00 (estimated) |
主な差別化要因
- Only 68000-family MPU with integrated DRAM controller + 8 chip-selects in one PQFP-132 （vs MC68SEC000AE10 (bare EC000, no integrated peripherals))
- Higher throughput than 10 MHz and 8 MHz variants in the same package （vs MC68306CEH10B (10 MHz) and MC68306CEH8B (8 MHz))
- Lower cost than 20 MHz upgrade variant when full throughput is not needed （vs MC68306CEH20B (20 MHz))
- M68000 instruction-set compatibility vs ColdFire migration （vs NXP ColdFire MCF5206 (newer architecture, 54 MHz))
設計ノート
Estimated: MC68306CEH16B core current at 5 V / 16 MHz is approximately 80-120 mA (typical 100 mA). At full load this equates to 0.5 W dissipation, manageable without a heatsink in still air. However, the 132-pin bumpered PQFP at -40 C to +85 C industrial operation requires 100 nF ceramic decoupling caps placed within 5 mm of every VCC pin (at least 4 VCC pins distributed across the package), plus one bulk 10 uF tantalum or aluminum-polymer cap adjacent to the PQFP. Use a 4-layer PCB with continuous ground plane to provide low-impedance return paths; the chip-select, address, and data buses should each have a 33 ohm series-termination resistor to suppress ringing at 16 MHz edge rates. For automotive or industrial bus-powered designs, add a MAX162BENG+ supervisor on the 5 V rail with a 4.65 V threshold for brown-out protection.
Route the 16 MHz CLK signal first, shortest path, with a continuous ground reference plane directly underneath. Keep the address bus (A1-A23) and data bus (D0-D15) matched within +/- 5 mm to minimize skew; the MC68306 strobes address and data on AS/DS edges, so length-matching ensures clean setup/hold at the external memory or peripheral chips. Place DRAM chips closest to the MC68306 to minimize RAS/CAS trace length and to keep DRAM control lines away from the UART signals to avoid crosstalk. The bumpered PQFP leads tolerate standard SMT reflow profiles; ensure the land pattern follows IPC-7351 nominal-density guidelines for PQFP-132 with 0.635 mm pitch. After assembly, perform X-ray inspection on the bumpered leads to verify solder fillet formation under the lead bumpers.
Three common pitfalls when designing with MC68306CEH16B: (1) Do NOT confuse the CEH16B with CEH20B or CEH25B speed grades - the same code runs on all, but wait-state insertion must be recalculated for the different bus period at higher clocks. (2) The MC68306 is NOT pin-compatible with the MC68332 or MC68HC16Z1 despite sharing the 132-pin PQFP footprint - peripheral pinouts differ. (3) Avoid extending the address bus beyond A23 - the MC68306 only supports 24-bit external addressing (16 MB). For applications needing more memory, add a bank-switching scheme via chip-select logic. (4) Do not exceed the 5 V +/- 5% supply tolerance - early silicon revisions latch up undervoltage; design margin to 4.75 V minimum.
Estimated: at 5 V / 100 mA typical / 130 mA worst-case, the MC68306CEH16B dissipates approximately 0.65 W maximum. The 132-pin bumpered PQFP has theta_JA of approximately 35 C/W in still air on a 4-layer PCB, giving a junction temperature rise of 23 C above 25 C ambient - well within the 70 C junction-rise budget. In a sealed enclosure with no airflow, derate to theta_JA of 50 C/W (33 C rise), still acceptable for industrial -40 C to +85 C operation. No heatsink is required. Forced-air cooling (100 LFM) drops theta_JA to 28 C/W (18 C rise), useful when the MPU is co-located with high-power drivers on the same PCB.
The 16 MHz MC68306CEH16B generates edge rates in the 1-2 ns range on the address, data, and control buses, which can cause ringing on improperly terminated traces. Place 33 ohm series-termination resistors at the source end of each bus line to damp reflections; for longer traces (> 50 mm) connecting external memory, increase to 47 ohm. The CLK input requires a clean 16 MHz source with < 1 ns jitter - use a crystal oscillator (not a discrete crystal) with a series damping resistor (22 ohms) close to the CLK input to reduce overshoot. The asynchronous IRQ inputs should be debounced externally or filtered in software (with a 2-3 sample delay) to avoid false interrupts from switch bounce.
コンプライアンス情報
RoHS compliant per DigiKey product page and NXP product brief. Lead-free terminations. Not AEC-Q100 qualified - choose MC68332 family for automotive safety applications. Halogen-free status not explicitly documented in verified data; left as 'unknown' rather than assumed.
