PIC24FJ128GA110T-I/PF - 16-Bit MCU, 128KB Flash, 100-TQFP | Microchip
部品番号: PIC24FJ128GA110T-I/PF ✓ 生産中| 数量 | 単価 | 小計 |
|---|---|---|
| 1 | $9.42 | $9.42 |
| 10 | $8.71 | $87.10 |
| 100 | $7.55 | $755.00 |
| 500 | $6.62 | $3,310.00 |
| 1,000 | $5.93 | $5,930.00 |
PIC24FJ128GA110T-I/PF 概要
A 16-bit microcontroller (MCU) is a microprocessor core with a 16-bit data path and instruction set, sitting in the hierarchy between 8-bit MCUs (such as the PIC16 family) and 32-bit MCUs (such as PIC32 or ARM Cortex-M). The PIC24F family in particular uses a modified Harvard RISC architecture with hardware multiply/divide and is aimed at low-power, mixed-signal applications such as industrial control, sensor hubs, and Human Interface Devices (HID). Compared with 8-bit cores, 16-bit cores offer higher code density, larger linear memory maps, and richer peripheral integration while retaining deterministic interrupt response.
Key features of the PIC24FJ128GA110 include <100 nA standby current for battery-backed designs, hardware Real-Time Clock/Calendar (RTCC) with self-contained power domain, up to 85 I/O pins with 5V-tolerant inputs, 16-channel 10-bit ADC with 500 ksps conversion rate, and CTMU support for capacitive touch. The device operates from 2.0V to 3.6V across an industrial -40C to +85C temperature range and supports Microchip's nanoWatt XLP power-saving modes (Sleep, Deep Sleep, VBAT).
At the silicon level, the PIC24FJ128GA110 uses a flash-friendly CMOS process with on-chip voltage regulation that keeps the core running while I/O ports operate at higher voltages, eliminating the need for external level shifters in 5V-tolerant scenarios. The architecture combines a 16-bit ALU with a 24-bit instruction word for compact, orthogonal C-compiled code, and the integrated DMA controller offloads data movement from the CPU to peripheral endpoints such as the UART, SPI, ADC, and PMP.
Typical applications include industrial sensor interfaces, USB HID/CDC devices (when paired with an external transceiver), home automation controllers, low-power wireless sensor nodes, and battery-backed data loggers. The 100-pin TQFP package also gives designers enough I/O for parallel TFT displays, PMP/EPMP bus interfaces, and multi-UART gateway bridges.
When designing with this part, note that the PIC24FJ128GA110T-I/PF is the TQFP-packaged tape-and-reel variant, while the PIC24FJ128GA110-I/PF (tray) is identical silicon; choose the reel suffix for SMT assembly. Plan VBAT retention current carefully and add proper decoupling (100 nF + bulk) on each VDD/VSS pin pair to avoid noise-induced RTCC drift.
This page synthesizes distributor pricing for the 100-TQFP reel variant, drop-in TQFP-100 alternatives (PIC24FJ128GA110-I/PF, PIC24FJ128GA010-I/PF), and practical PCB layout notes not consolidated in the manufacturer datasheet.
ドロップイン代替品: PIC24FJ128GA110T-I/PF — 同一パッケージでピン互換。PCBの作り直しが必要な異なるパッケージの部品は除外されています。
このシリーズのバリエーション
同一シリーズでドロップイン互換のモデル: PIC24FJ128GA110T-I/PF （同一形状・フットプリント） — 相違点: ADC, Package, Operating Temperature, Core Architecture, MSL Level.
クイック比較ツール — 並列比較する代替部品を選択:
PIC24FJ128GA110-I/PF
✅ ドロップイン📋 参考代替品（カタログ未掲載）
PIC24FJ128GA110-I/PT
✅ ドロップイン ⚠️ 仕様未検証✓ 在庫あり
$4.1 / 個
データシートを見る →PIC24FJ128GA010-I/PF
✅ ドロップイン✓ 在庫あり
$8.95 / 個
データシートを見る →PIC24FJ128GA108-E/PT
✅ ドロップイン ⚠️ 仕様未検証✓ 在庫あり
$5.4 / 個
データシートを見る →PIC24FJ128DA110T-I/BG
✅ ドロップイン ⚠️ 仕様未検証✓ 在庫あり
$6.55 / 個
データシートを見る →PIC24FJ128GA110T-I/PF 最大定格＆電気的特性
| Core Architecture | 16-bit PIC24F (modified Harvard RISC) |
| Family | PIC24FJ eXtreme Low Power (XLP) |
| Program Memory (Flash) | 128 KB (43K x 24 words) |
| RAM | 16 KB |
| Maximum CPU Speed | 32 MHz (16 MIPS at 3.3V) |
| Operating Voltage | 2.0 V to 3.6 V |
| パッケージ | 100-TQFP (14 x 14 mm) |
| I/O Pins | Up to 85 |
| UART | 4 |
| SPI | 3 |
| I2C | 3 |
| Timers | 16/32-bit, 23 independent |
| ADC | 10-bit, 16-channel, 500 ksps |
| RTCC | Yes (hardware, with VBAT) |
| CTMU (Capacitive Touch) | Yes |
| DMA | 8-channel |
| Standby Current | <100 nA (XLP Sleep) |
| 動作温度 | -40 C to +85 C (Industrial) |
| 実装タイプ | Surface Mount (TQFP) |
| MSLレベル | 3 (per JEDEC J-STD-020) |
| RoHS ステータス | Compliant |
PIC24FJ128GA110T-I/PF ピン構成
| ピン 1 | RP15/PMA0/CN11/RB15 — Remappable I/O, PMP address bit 0 |
| ピン 2 | RP14/PMA1/CN10/RB14 — Remappable I/O, PMP address bit 1 |
| ピン 3 | RP13/PMA2/CN9/RB13 — Remappable I/O, PMP address bit 2 |
| ピン 4 | RP12/PMA3/CN8/RB12 — Remappable I/O, PMP address bit 3 |
| ピン 5 | RP11/PMA4/CN7/RB11 — Remappable I/O, PMP address bit 4 |
| ピン 6 | RP10/PMA5/CN6/RB10 — Remappable I/O, PMP address bit 5 |
| ピン 7 | RP9/PMA6/CN5/RB9 — Remappable I/O, PMP address bit 6 |
| ピン 8 | RP8/PMA7/CN4/RB8 — Remappable I/O, PMP address bit 7 |
| ピン 9 | RP7/PMD7/CN3/RB7 — Remappable I/O, PMP data bit 7 |
| ピン 10 | RP6/PMD6/CN2/RB6 — Remappable I/O, PMP data bit 6 |
| ピン 11 | RP5/PMD5/CN1/RB5 — Remappable I/O, PMP data bit 5 |
| ピン 12 | RP4/PMD4/CN0/RB4 — Remappable I/O, PMP data bit 4 |
| ピン 13 | RP3/PMD3/RB3 — Remappable I/O, PMP data bit 3 |
| ピン 14 | RP2/PMD2/RB2 — Remappable I/O, PMP data bit 2 |
| ピン 15 | RP1/PMD1/RB1 — Remappable I/O, PMP data bit 1 |
| ピン 16 | RP0/PMD0/RB0 — Remappable I/O, PMP data bit 0 |
| ピン 17 | VSS — Ground reference |
| ピン 18 | VDD — Positive supply (2.0V-3.6V) |
| ピン 19 | RD9 — Remappable I/O port D bit 9 |
| ピン 20 | RD10 — Remappable I/O port D bit 10 |
| ピン 21 | RD11 — Remappable I/O port D bit 11 |
| ピン 22 | RD12 — Remappable I/O port D bit 12 |
| ピン 23 | RD13 — Remappable I/O port D bit 13 |
| ピン 24 | RD14 — Remappable I/O port D bit 14 |
| ピン 25 | RD15 — Remappable I/O port D bit 15 |
| ピン 26 | RC1/T2CK — Remappable I/O, Timer2 clock input |
| ピン 27 | RC2/T3CK — Remappable I/O, Timer3 clock input |
| ピン 28 | RC3/T4CK — Remappable I/O, Timer4 clock input |
| ピン 29 | RC4 — Remappable I/O port C bit 4 |
| ピン 30 | INT0/RF6 — External interrupt 0 / port F bit 6 |
| ピン 31 | RF7 — Port F bit 7 |
| ピン 32 | RF8 — Port F bit 8 |
| ピン 33 | RF3 — Port F bit 3 |
| ピン 34 | RF2 — Port F bit 2 |
| ピン 35 | RF5 — Port F bit 5 |
| ピン 36 | RF4 — Port F bit 4 |
| ピン 37 | RF1 — Port F bit 1 |
| ピン 38 | RF0 — Port F bit 0 |
| ピン 39 | VSS — Ground reference |
| ピン 40 | OSC1/CLKI/RA1 — Oscillator crystal input / port A bit 1 |
| ピン 41 | OSC2/CLKO/RA2 — Oscillator crystal output / port A bit 2 |
| ピン 42 | RA3 — Port A bit 3 |
| ピン 43 | RA4 — Port A bit 4 |
| ピン 44 | RA5 — Port A bit 5 |
| ピン 45 | VDD — Positive supply (2.0V-3.6V) |
| ピン 46 | RA7 — Port A bit 7 |
| ピン 47 | RA9 — Port A bit 9 |
| ピン 48 | RA10 — Port A bit 10 |
| ピン 49 | RA11 — Port A bit 11 |
| ピン 50 | RA12 — Port A bit 12 |
| ピン 51 | RA13 — Port A bit 13 |
| ピン 52 | RA14 — Port A bit 14 |
| ピン 53 | RA15 — Port A bit 15 |
| ピン 54 | VSS — Ground reference |
| ピン 55 | RG3 — Port G bit 3 |
| ピン 56 | RG2 — Port G bit 2 |
| ピン 57 | RG1 — Port G bit 1 |
| ピン 58 | RG0 — Port G bit 0 |
| ピン 59 | RG6 — Port G bit 6 |
| ピン 60 | RG7 — Port G bit 7 |
| ピン 61 | RG8 — Port G bit 8 |
| ピン 62 | RG9 — Port G bit 9 |
| ピン 63 | MCLR — Master Clear (reset) input |
| ピン 64 | RG15 — Port G bit 15 |
| ピン 65 | VDD — Positive supply (2.0V-3.6V) |
| ピン 66 | AVDD — Analog positive supply |
| ピン 67 | AVSS — Analog ground reference |
| ピン 68 | AN0/RA0 — Analog input 0 / port A bit 0 |
| ピン 69 | AN1/RA1 — Analog input 1 / port A bit 1 |
| ピン 70 | AN2/RA2 — Analog input 2 / port A bit 2 |
| ピン 71 | AN3/RA3 — Analog input 3 / port A bit 3 |
| ピン 72 | AN4/RA4 — Analog input 4 / port A bit 4 |
| ピン 73 | AN5/RA5 — Analog input 5 / port A bit 5 |
| ピン 74 | AN6/RA6 — Analog input 6 / port A bit 6 |
| ピン 75 | AN7/RA7 — Analog input 7 / port A bit 7 |
| ピン 76 | AN8/RB0 — Analog input 8 / port B bit 0 |
| ピン 77 | AN9/RB1 — Analog input 9 / port B bit 1 |
| ピン 78 | AN10/RB2 — Analog input 10 / port B bit 2 |
| ピン 79 | AN11/RB3 — Analog input 11 / port B bit 3 |
| ピン 80 | AN12/RB4 — Analog input 12 / port B bit 4 |
| ピン 81 | AN13/RB5 — Analog input 13 / port B bit 5 |
| ピン 82 | AN14/RB6 — Analog input 14 / port B bit 6 |
| ピン 83 | AN15/RB7 — Analog input 15 / port B bit 7 |
| ピン 84 | VREF+/CVREF+/AN23/RC0 — Voltage reference positive / comparator ref |
| ピン 85 | VREF-/CVREF-/AN22/RC1 — Voltage reference negative / comparator ref |
| ピン 86 | SDA3/RA14 — I2C3 data / port A bit 14 |
| ピン 87 | SCL3/RA15 — I2C3 clock / port A bit 15 |
| ピン 88 | SOSCI/RA0 — Secondary oscillator crystal input |
| ピン 89 | SOSCO/T1CK/CN0/RA1 — Secondary oscillator crystal output / Timer1 input |
| ピン 90 | RTCC/RA2 — Real-Time Clock output / port A bit 2 |
| ピン 91 | VBAT — RTCC backup battery supply input |
| ピン 92 | VSS — Ground reference |
| ピン 93 | RC2 — Port C bit 2 |
| ピン 94 | RC3 — Port C bit 3 |
| ピン 95 | RC4 — Port C bit 4 |
| ピン 96 | RC5 — Port C bit 5 |
| ピン 97 | RC6 — Port C bit 6 |
| ピン 98 | RC7 — Port C bit 7 |
| ピン 99 | RC8 — Port C bit 8 |
| ピン 100 | RC9 — Port C bit 9 |
主な用途
PIC24FJ128GA110T-I/PF の用途: 6 件s: Industrial Sensor Interface Hub, USB HID / CDC Device Controller, Low-Power Wireless Sensor Node, Battery-Backed Data Logger, Home Automation Gateway Bridge, Human-Machine Interface (HMI) Display Controller.
Industrial Sensor Interface Hub
The PIC24FJ128GA110T-I/PF is well suited as an industrial sensor hub because its 16 MIPS throughput and 16 KB RAM can host Modbus RTU master stacks while servicing multiple SPI/I2C sensor front-ends simultaneously. The 4x UARTs handle RS-485/RS-232 transceiver links to PLCs, while the 16-channel 10-bit ADC aggregates analog transducers at up to 500 ksps. Its 2.0-3.6V supply range tolerates industrial 24V bus rails after a simple buck regulator, and XLP Sleep at <100 nA preserves battery backup during brownouts. Designers benefit from the 100-TQFP package, which exposes enough I/O for parallel keypad input plus 4-digit LED/LCD status displays without needing a second MCU.
おすすめ
USB HID / CDC Device Controller
The PIC24FJ128GA110T-I/PF's 32 MHz core, 16 KB RAM, and four UARTs make it an excellent host for USB Human Interface Device or Communications Device Class firmware when paired with an external USB transceiver. The 128 KB Flash holds full USB stacks and custom HID report descriptors, while DMA offloads endpoint buffer management from the CPU for sustained throughput. The 5V-tolerant I/O simplifies co-existence with legacy USB bus-powered peripherals, and the 100-TQFP exposes dedicated PMP/EPMP bus pins if external parallel USB host silicon is added. XLP Sleep reduces standby current when the device is bus-suspended, meeting USB suspend current requirements.
おすすめ
Low-Power Wireless Sensor Node
The PIC24FJ128GA110T-I/PF integrates well as the host MCU for sub-GHz or 2.4 GHz wireless sensor nodes, where its <100 nA XLP Sleep current dominates battery life. With RTCC ticking from a VBAT coin cell, the node can wake on a timer or external interrupt, sample a sensor over SPI/I2C, transmit via a paired radio, and return to sleep within milliseconds. The 16 KB RAM buffers transient burst data, and the 128 KB Flash holds OTA-capable application images with dual-partition firmware updates. Industrial -40 to +85 C operation covers outdoor and HVAC environments.
おすすめ
Battery-Backed Data Logger
With RTCC, VBAT domain, and 16 KB RAM, the PIC24FJ128GA110T-I/PF forms the core of a battery-backed data logger for medical or environmental recording. The integrated 10-bit ADC captures analog channels at 500 ksps, while DMA streams conversions into RAM without CPU intervention. Flash can be partitioned for circular logging with wear-leveling, and XLP Sleep preserves coin-cell life for years between maintenance cycles. The 100-TQFP package also supports 4-wire SPI or SD card interfaces for removable storage expansion.
おすすめ
Home Automation Gateway Bridge
The PIC24FJ128GA110T-I/PF works well as a multi-UART home automation gateway bridging Zigbee, Z-Wave, or Wi-Fi modules to a local RS-485 bus. Four UARTs let designers connect multiple wireless co-processors in parallel, while 3x I2C and 3x SPI handle sensor inputs and display panels. The 128 KB Flash fits full HomeKit/Matter bridge stacks, and CTMU capacitive touch inputs eliminate mechanical buttons on wall controllers. Wide 2.0-3.6V operation accepts regulated 3.3V from USB or PoE-derived supplies.
おすすめ
Human-Machine Interface (HMI) Display Controller
For HMI panels with TFT or segment LCD, the PIC24FJ128GA110T-I/PF's PMP/EPMP parallel bus and CTMU touch inputs offer a single-chip controller solution. The 100-TQFP exposes enough pins for an 8-bit PMP bus plus dedicated control lines driving 320x240 TFTs without external bridge logic. The 16 MIPS throughput handles button debouncing, on-screen menu navigation, and serial command parsing concurrently. CTMU scans capacitive keypads without additional ICs, reducing BOM cost for appliance and instrument front panels.
おすすめ
おすすめ製品の概要
エンジニアリング参考データ: PIC24FJ128GA110T-I/PF — 比較、設計ガイダンス、コンプライアンス情報。
選定ガイド
代替品との比較
| パラメータ | この製品 | PIC24FJ128GA110-I/PF | PIC24FJ128GA110-I/PT | PIC24FJ128GA010-I/PF |
|---|---|---|---|---|
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Package | 100-TQFP (14x14 mm) | 100-TQFP (14x14 mm) | 100-TQFP (12x12 mm) | 100-TQFP (14x14 mm) |
| Program Memory (Flash) | 128 KB | 128 KB | 128 KB | 128 KB |
| RAM | 16 KB | 16 KB | 16 KB | 16 KB |
| Maximum CPU Clock | 32 MHz (16 MIPS) | 32 MHz (16 MIPS) | 32 MHz (16 MIPS) | 16 MHz (16 MIPS) |
| Operating Voltage | 2.0 V to 3.6 V | 2.0 V to 3.6 V | 2.0 V to 3.6 V | 2.0 V to 3.6 V |
| UART Count | 4 | 4 | 4 | 4 |
| ADC Channels | 16 x 10-bit | 16 x 10-bit | 16 x 10-bit | 16 x 10-bit |
| Standby Current | <100 nA (XLP) | <100 nA (XLP) | <100 nA (XLP) | <100 nA (XLP) |
主な差別化要因
- Tape-and-reel carrier for SMT production （vs PIC24FJ128GA110-I/PF)
- 32 MHz full-speed execution vs 16 MHz （vs PIC24FJ128GA010-I/PF)
- eXtreme Low Power XLP standby at <100 nA （vs PIC24FJ128DA110T-I/BG)
設計ノート
The PIC24FJ128GA110T-I/PF integrates multiple VDD/VSS pin pairs (pins 18, 45, 65 for VDD; 17, 39, 54, 92 for VSS) plus a dedicated AVDD/AVSS pair on pins 66/67. Place a 100 nF decoupling capacitor within 5 mm of each VDD pin and a single 10 uF bulk capacitor near the package. For analog accuracy on ADC inputs, isolate AVDD with a ferrite bead or 10 ohm resistor from digital VDD, and decouple AVSS directly to the ground plane. The VBAT pin (91) requires its own 100 nF cap plus a series Schottky diode to the main 3.3V rail to prevent back-feed during normal operation.
Estimated: the MCLR pin (63) is bidirectional on PIC24F parts - if left unconnected it can drift into reset under noisy conditions. Tie MCLR to VDD through a 10 kohm pull-up and a 100 nF decoupling cap, or use the internal MCLR disable configuration if not using an external reset supervisor. Additionally, JTAG/PGDx pins must be left in their default high-impedance state during reset or the part may fail to enter ICSP mode. Use the CONFIG register bits to disable JTAG if not needed to free pins for GPIO.
The 100-TQFP has a 0.5 mm pitch and 14x14 mm body. Recommended land pattern follows IPC-7351 nominal density with 0.30 mm pad width and 0.45 mm pad length. Route the outer 85 I/O signals on the top layer with 0.15 mm trace/spacing to escape cleanly between TQFP pads; use inner layers for power and ground. Place the 32.768 kHz crystal (SOSCI/SOSCO, pins 88/89) within 5 mm of the package and guard the traces with a ground ring to avoid coupling digital noise into the RTCC domain.
コンプライアンス情報
RoHS and lead-free per Microchip product page. Not AEC-Q100 qualified; for automotive designs use PIC24FJ series qualified parts. Conflict-minerals compliance per Microchip CMRT filings.
