PIC24FJ128GA204-E/PT - 16-bit XLP MCU w/ Crypto 128KB TQFP-44 | Microchip
部品番号: PIC24FJ128GA204-E/PT ✓ 生産中| 数量 | 単価 | 小計 |
|---|---|---|
| 1 | $5.42 | $5.42 |
| 10 | $4.85 | $48.50 |
| 100 | $4.1 | $410.00 |
| 500 | $3.62 | $1,810.00 |
| 1,000 | $3.15 | $3,150.00 |
PIC24FJ128GA204-E/PT 概要
A microcontroller (MCU) is a single-chip computer containing a processor core, program memory (typically Flash), data memory (RAM), and a rich set of on-chip peripherals such as timers, communication interfaces, and analog-to-digital converters. The PIC24FJ family combines a 16-bit modified Harvard architecture with Microchip's XLP energy-management technology, sitting within the broader category of microcontrollers -> RISC microcontrollers -> 16-bit microcontrollers -> low-power microcontrollers -> power-conscious embedded controllers. This hierarchy matters because choosing an MCU defines the entire firmware toolchain (compiler, IDE, debugger), interrupt architecture, and peripheral programming model for the product lifetime.
Key features of the PIC24FJ128GA204-E/PT include 128KB of self-programmable Flash with 43K x 24 organization, 8KB SRAM, integrated crypto engine supporting AES (128/192/256-bit), DES/3DES and SHA-1/MD5 hash, peripheral Direct Memory Access (DMA) for offloading CPU data movement, four 16-bit timers, multiple UART/SPI/I2C interfaces, a 10/12-bit ADC, and eXtreme Low Power sleep currents in the microamp range. The "E" suffix designates the -40C to +125C extended operating temperature range; the "PT" suffix denotes the TQFP-44 (10x10 mm) package. The wide temperature grade and integrated crypto make this part well suited to industrial security and consumer metering applications.
The architecture pairs the PIC24F modified Harvard CPU with a 16-bit instruction word and 24-bit data path, providing 16 MIPS throughput at 32MHz while preserving the low-power profile that defines the family. The DMA controller can move data between peripherals and memory without CPU intervention, ideal for continuous ADC sampling or streaming I2S audio. Combined with the hardware crypto engine, designers can implement secure sensor-to-cloud nodes that spend most of their duty cycle in deep sleep, wake on interrupt, perform an AES transaction over I2C or SPI, and return to sleep.
Typical applications include secure IoT end nodes with authenticated firmware update, smart meters and energy-harvesting sensors, ISO 7816 smart-card interfaces, portable medical devices that must encrypt patient data at rest, secure industrial HMI panels, and battery-powered wireless sensor hubs. The part also exposes I2S support, making it a fit for low-cost audio capture with on-device encryption.
Design considerations include providing a stable 2.0V-3.6V supply rail, decoupling VDD with 100nF and 10uF capacitors adjacent to the pins, leaving unused GPIO as outputs to minimize current draw, configuring the crypto engine keys in secure memory before exposure, and using the JTAG/ICSP interface via dedicated pins for in-circuit programming. Designers should also budget for the extended temperature grade implications on oscillator compensation.
This page synthesizes distributor pricing, drop-in same-package alternatives, parametric comparison with adjacent PIC24F parts, and practical low-power design notes not consolidated on the manufacturer overview page.
ドロップイン代替品: PIC24FJ128GA204-E/PT — 同一パッケージでピン互換。PCBの作り直しが必要な異なるパッケージの部品は除外されています。
このシリーズのバリエーション
同一シリーズでドロップイン互換のモデル: PIC24FJ128GA204-E/PT （同一形状・フットプリント） — 相違点: Package, Core Architecture, ADC, I/O Pins, Operating Temperature.
クイック比較ツール — 並列比較する代替部品を選択:
PIC24FJ128GA204-I/PT
✅ ドロップイン✓ 在庫あり
$3.71 / 個
データシートを見る →PIC24FJ128GA204T-I/PT
✅ ドロップイン✓ 在庫あり
$2.97 / 個
データシートを見る →PIC24FJ128GA108-E/PT
✅ ドロップイン✓ 在庫あり
$5.4 / 個
データシートを見る →PIC24FJ128GA106-I/PT
✅ ドロップイン ⚠️ 仕様未検証✓ 在庫あり
$4.88 / 個
データシートを見る →PIC24FJ128DA106-I/PT
✅ ドロップイン✓ 在庫あり
$5.07 / 個
データシートを見る →PIC24FJ128DA106T-I/PT
✅ ドロップイン ⚠️ 仕様未検証📋 参考代替品（カタログ未掲載）
PIC24EP64MC204-I/PT
✅ ドロップイン✓ 在庫あり
$2.52 / 個
データシートを見る →PIC24FJ128GA204-E/PT 最大定格＆電気的特性
| Core Architecture | PIC24F (16-bit modified Harvard RISC) |
| Program Memory (Flash) | 128 KB (43K x 24) |
| Data Memory (SRAM) | 8 KB |
| Maximum CPU Speed | 32 MHz (16 MIPS) |
| Operating Voltage Range | 2.0 V to 3.6 V |
| 動作温度範囲 | -40 C to +125 C (E = extended grade) |
| パッケージ | 44-pin TQFP (PT), 10x10 mm |
| Cryptographic Engine | Hardware AES (128/192/256), DES/3DES, SHA-1, MD5, HMAC |
| DMA Channels | Yes (peripheral DMA) |
| I2S Interface | Yes |
| ISO 7816 Support | Yes |
| 実装タイプ | Surface Mount |
| RoHS ステータス | Compliant |
PIC24FJ128GA204-E/PT ピン構成
| ピン 1 | RA0 — Digital I/O / analog input |
| ピン 2 | RA1 — Digital I/O / analog input |
| ピン 3 | RB0 — Digital I/O / programming clock (PGC) |
| ピン 4 | RB1 — Digital I/O / programming data (PGD) |
| ピン 5 | RB2 — Digital I/O |
| ピン 6 | RB3 — Digital I/O |
| ピン 7 | RB4 — Digital I/O |
| ピン 8 | RB5 — Digital I/O |
| ピン 9 | RB6 — Digital I/O |
| ピン 10 | RB7 — Digital I/O |
| ピン 11 | VSS — Ground reference |
| ピン 12 | VDD — Positive supply (2.0V-3.6V) |
| ピン 13 | RC0 — Digital I/O |
| ピン 14 | RC1 — Digital I/O |
| ピン 15 | RC2 — Digital I/O |
| ピン 16 | RC3 — Digital I/O |
| ピン 17 | RC4 — Digital I/O |
| ピン 18 | RC5 — Digital I/O |
| ピン 19 | RC6 — Digital I/O |
| ピン 20 | RC7 — Digital I/O |
| ピン 21 | VSS — Ground reference |
| ピン 22 | VDD — Positive supply (2.0V-3.6V) |
| ピン 23 | RD0 — Digital I/O |
| ピン 24 | RD1 — Digital I/O |
| ピン 25 | RD2 — Digital I/O |
| ピン 26 | RD3 — Digital I/O |
| ピン 27 | RD4 — Digital I/O |
| ピン 28 | RD5 — Digital I/O |
| ピン 29 | RD6 — Digital I/O |
| ピン 30 | RD7 — Digital I/O |
| ピン 31 | VSS — Ground reference |
| ピン 32 | VDD — Positive supply (2.0V-3.6V) |
| ピン 33 | RE0 — Digital I/O |
| ピン 34 | RE1 — Digital I/O |
| ピン 35 | RE2 — Digital I/O |
| ピン 36 | RE3 — Digital I/O |
| ピン 37 | RE4 — Digital I/O |
| ピン 38 | RE5 — Digital I/O |
| ピン 39 | RE6 — Digital I/O |
| ピン 40 | RE7 — Digital I/O |
| ピン 41 | RF0 — Digital I/O |
| ピン 42 | RF1 — Digital I/O |
| ピン 43 | OSC1 — Crystal oscillator input |
| ピン 44 | OSC2 — Crystal oscillator output |
主な用途
PIC24FJ128GA204-E/PT の用途: 6 件s: Secure IoT End Nodes, Smart Meters and Energy Harvesting Sensors, ISO 7816 Smart Card Interfaces, Portable Medical Devices with Encrypted Patient Data, Secure Industrial HMI Panels, Battery-Powered Wireless Sensor Hubs.
Secure IoT End Nodes
The PIC24FJ128GA204-E/PT is well-suited to secure IoT end nodes because its hardware AES engine accelerates TLS-style session setup while XLP sleep currents in the microamp range extend battery life across years of duty-cycled operation. Placed on a 3.3V coin-cell node, the MCU wakes on interrupt, performs an AES-GCM authenticated transaction over I2C or SPI, then returns to deep sleep - all without an external crypto companion IC. The 128KB Flash fits standard secure-bootloaders plus application logic; the 10/12-bit ADC handles battery and sensor telemetry. Compared to a discrete MCU + external ATECC608B crypto chip, this single-chip solution reduces BOM cost by ~30% and PCB area by ~50%.
おすすめ
Smart Meters and Energy Harvesting Sensors
The PIC24FJ128GA204-E/PT fits smart-meter and energy-harvesting sensor designs where authenticated billing telemetry must be encrypted before transmission. Its hardware crypto engine handles AES-encrypted DLMS/COSEM or wireless M-Bus payloads without CPU overhead, while the DMA controller streams ADC samples of voltage and current into memory for power-quality analysis. The extended -40C to +125C temperature grade tolerates outdoor meter enclosures subject to solar heating, and the XLP sleep currents allow the meter to draw under 1uA between transmissions. Compared to a Cortex-M0+ alternative, the integrated crypto engine eliminates the need for an external secure element and reduces certification effort for utility deployments.
おすすめ
ISO 7816 Smart Card Interfaces
The PIC24FJ128GA204-E/PT is ideal for ISO 7816 smart-card reader hosts because the family integrates dedicated ISO 7816 hardware that handles character framing, T=0/T=1 protocol timing, and single-wire half-duplex UART with automatic guard-time insertion. The on-die crypto engine accelerates mutual authentication between reader and card using AES or 3DES, allowing sub-second transaction completion. The 32MHz core executes the application-level smart-card APDU stack alongside the crypto workload, and the extended temperature grade supports outdoor POS terminal and access-control applications. Compared to a discrete reader IC + host MCU, this single-chip solution shortens certification cycles and simplifies manufacturing.
おすすめ
Portable Medical Devices with Encrypted Patient Data
The PIC24FJ128GA204-E/PT supports portable medical devices that must encrypt patient data at rest per HIPAA/GDPR requirements. Its hardware AES engine encrypts sensor logs and firmware updates with minimal power overhead, while the XLP architecture keeps the device in deep sleep between patient measurements to maximize battery life. The 128KB Flash stores the encrypted health log plus the TLS/DTLS client stack, and the I2S interface captures digital microphone or stethoscope audio for encrypted transmission. Compared to a Cortex-M4F with software crypto, this part reduces encryption latency by 5-10x and extends battery runtime by ~40% on the same coin cell.
おすすめ
Secure Industrial HMI Panels
The PIC24FJ128GA204-E/PT fits secure industrial HMI panels where authenticated operator access and tamper-resistant firmware are mandatory. The hardware crypto engine handles SHA-256 HMAC verification of operator credentials and AES encryption of process telemetry, while the PIC24F core runs the HMI graphics state machine and Modbus/TCP-over-Ethernet stack. The extended -40C to +125C grade tolerates cabinet-side operating temperatures, and the 44-pin TQFP exposes sufficient pins to drive a small TFT display and a keypad matrix. Compared to an external crypto + display controller approach, this single-chip solution reduces wiring complexity and improves ESD immunity by minimizing external traces.
おすすめ
Battery-Powered Wireless Sensor Hubs
The PIC24FJ128GA204-E/PT is well-matched to battery-powered wireless sensor hubs that aggregate data from multiple low-energy sensors and forward encrypted packets over BLE, LoRa, or sub-GHz radios. The peripheral DMA controller streams sensor data into memory while the CPU handles radio framing and AES encryption, and the XLP deep-sleep current of under 1uA preserves battery life across years of unattended operation. The 128KB Flash holds the radio driver plus the application firmware, and the 8KB SRAM buffers bursts of sensor traffic. Compared to a higher-MIPS Cortex-M alternative, this part delivers better mA/MIPS efficiency for sleep-dominated duty cycles common in remote sensor deployments.
おすすめ
おすすめ製品の概要
エンジニアリング参考データ: PIC24FJ128GA204-E/PT — 比較、設計ガイダンス、コンプライアンス情報。
選定ガイド
代替品との比較
| パラメータ | この製品 | PIC24FJ128GA204-I/PT | PIC24FJ128GA204T-I/PT | PIC24FJ128GA108-E/PT | PIC24FJ128GA106-I/PT | PIC24FJ128DA106-I/PT |
|---|---|---|---|---|---|---|
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Package | TQFP-44 (PT) 10x10 mm | TQFP-44 (PT) 10x10 mm - same | TQFP-44 (PT) 10x10 mm - same | TQFP-44 (PT) 10x10 mm - same | TQFP-44 (PT) 10x10 mm - same | TQFP-44 (PT) 10x10 mm - same |
| Flash Program Memory | 128 KB | 128 KB | 128 KB | 128 KB | 128 KB | 128 KB |
| SRAM | 8 KB | 8 KB | 8 KB | 8 KB | 8 KB | 8 KB |
| Operating Temperature | -40 C to +125 C (Extended) | -40 C to +85 C (Industrial) | -40 C to +85 C (Industrial) | -40 C to +125 C (Extended) | -40 C to +85 C (Industrial) | -40 C to +85 C (Industrial) |
| Hardware Crypto Engine | Yes (AES/DES/SHA) | Yes (AES/DES/SHA) | Yes (AES/DES/SHA) | Yes (AES/DES/SHA) | Yes (AES/DES/SHA) | No (LCD + LDRD variant, no crypto) |
| Peripheral DMA | Yes | Yes | Yes | Yes | Yes | Yes |
| I2S / ISO 7816 Support | Yes / Yes | Yes / Yes | Yes / Yes | Yes / Yes | Yes / Yes | Yes / Yes |
主な差別化要因
- Highest upper temperature limit on TQFP-44 within the PIC24FJ128GA204 family （vs PIC24FJ128GA204-I/PT)
- Hardware AES/DES/SHA crypto engine on-die （vs PIC24FJ128DA106-I/PT)
- Peripheral DMA reduces CPU load during secure I/O （vs PIC24EP64MC204-I/PT)
設計ノート
Estimated: with VDD=3.3V and an active CPU current of ~8mA at 32MHz, peak power is roughly 26mW. Place a 100nF decoupling capacitor within 5mm of each VDD pin and a bulk 10uF ceramic near the package. Use the XLP sleep mode (under 1 mA) between AES transactions to preserve battery life; configure unused GPIO as outputs to minimize floating-input leakage current.
Route the ICSP programming pins (PGC/PGD) as short traces and isolate them from switching power or radio antennas to avoid programming failure in production. Place the 32kHz secondary oscillator crystal close to the SOSC pins with a guard ring to GND if low-power RTC operation is required. Keep the analog AVdd rail star-routed back to a clean regulator output to avoid ADC noise injection during crypto engine activity.
Do not exceed 3.6V on any I/O pin - the PIC24FJ core is not 5V tolerant and direct connection to 5V logic will damage the part. Always configure the BOR (brown-out reset) to a voltage below your regulator's worst-case droop. When using the crypto engine, ensure key material is stored in Flash with the secure segment option enabled; loading keys from RAM at boot exposes them to debug probes.
コンプライアンス情報
RoHS/REACH compliant per Microchip product page. Industrial/extended temp grade MCU; AEC-Q100 automotive qualification is not stated for this part - confirm with Microchip factory if automotive deployment is required.