PIC24FJ128GA406-I/PT - 16-Bit 32MHz MCU 128KB Flash | Microchip
部品番号: PIC24FJ128GA406-I/PT ✓ 生産中| 数量 | 単価 | 小計 |
|---|---|---|
| 1 | $4.78 | $4.78 |
| 10 | $4.3 | $43.00 |
| 100 | $3.83 | $383.00 |
| 500 | $3.35 | $1,675.00 |
| 1,000 | $2.9 | $2,900.00 |
PIC24FJ128GA406-I/PT 概要
What is a PIC24 microcontroller? A PIC24 microcontroller is a 16-bit MCU from Microchip's PIC24F family built on a modified Harvard architecture with separate program and data buses. It sits in the product hierarchy as: 16-bit MCU -> microcontroller -> embedded processor -> semiconductor. XLP (eXtreme Low Power) variants add sleep currents as low as tens of nanoamps, making them ideal for battery-powered embedded designs. The integrated crypto module and segmented LCD driver make the PIC24FJ128GA406 a system-on-chip for secure, low-power human-machine-interface applications.
Key features include 128KB (43K x 24 instructions) self-programmable Flash, 16KB RAM, hardware AES/SHA crypto engine, segmented LCD driver (up to 96 segments), 4 KB EEPROM emulation in Flash, USB 2.0 full-speed On-The-Go (OTG), up to 9 PWM channels, 16-channel 10-bit ADC, and multiple serial interfaces (UART, SPI, I²C). It operates from 2.0V to 3.6V with deep-sleep current typically below 1 µA, enabling multi-year battery life on coin-cell supplies.
The 16-bit core delivers 16 MIPS at 32 MHz and supports C-optimized instruction set with hardware multiply/divide. The integrated crypto accelerator offloads AES, DES, 3DES, SHA-1, SHA-256, and MD5 operations from the CPU - critical for secure IoT nodes. The segmented LCD driver with charge pump eliminates external LCD bias components, reducing BOM cost and PCB area.
Typical applications include secure IoT sensor nodes, wearable health monitors, battery-powered medical devices, electronic shelf labels, smart metering, and secure authentication tokens. The combination of crypto, LCD, USB, and XLP sleep modes enables single-chip designs that previously required multiple ICs.
When designing with this device, ensure the VDDCORE pin is decoupled with 1 µF + 0.1 µF ceramic capacitors placed within 3 mm. The LCD charge-pump capacitors (C1/C2) must be low-ESR ceramic types. Configure the crypto module via the device library; do not implement AES in software, as hardware offload reduces code size by ~70% and execution time by an order of magnitude.
This page synthesizes distributor pricing, drop-in 64-TQFP alternatives from the PIC24FJ family, and practical design notes not found in the manufacturer datasheet alone.
ドロップイン代替品: PIC24FJ128GA406-I/PT — 同一パッケージでピン互換。PCBの作り直しが必要な異なるパッケージの部品は除外されています。
このシリーズのバリエーション
同一シリーズでドロップイン互換のモデル: PIC24FJ128GA406-I/PT （同一形状・フットプリント） — 相違点: Package, ADC, Operating Temperature, Core Architecture, Timers.
クイック比較ツール — 並列比較する代替部品を選択:
PIC24FJ128GA006-I/PT
✅ ドロップイン✓ 在庫あり
$4.95 / 個
データシートを見る →PIC24FJ128GA106-I/PT
✅ ドロップイン✓ 在庫あり
$4.88 / 個
データシートを見る →PIC24FJ128GA010-I/PT
✅ ドロップイン✓ 在庫あり
$4.95 / 個
データシートを見る →PIC24FJ128GA110-I/PT
✅ ドロップイン✓ 在庫あり
$4.1 / 個
データシートを見る →PIC24FJ256GB406-I/PT
✅ ドロップイン✓ 在庫あり
$5.48 / 個
データシートを見る →PIC24FJ128GA406-I/PT 最大定格＆電気的特性
| Core Architecture | PIC 16-bit modified Harvard |
| Program Memory (Flash) | 128 KB (43K x 24 instructions) |
| Data RAM | 16 KB |
| EEPROM | 4 KB (emulated in Flash) |
| Maximum CPU Speed | 32 MHz (16 MIPS) |
| Operating Voltage (VDD) | 2.0 V to 3.6 V |
| パッケージ | 64-TQFP (10x10x1 mm), PT suffix, Tray |
| ピン数 | 64 |
| 実装タイプ | Surface Mount |
| 動作温度範囲 | -40 °C to +85 °C (industrial, 'I' grade) |
| Hardware Crypto Module | AES, DES, 3DES, SHA-1, SHA-256, MD5 |
| LCD Driver | Segmented LCD, up to 96 segments with charge pump |
| USB | USB 2.0 Full-Speed On-The-Go (OTG) |
| ADC | 16-channel, 10-bit |
| PWM Channels | Up to 9 |
| Communication Interfaces | UART, SPI, I²C, USB OTG |
| RoHS ステータス | Compliant |
| Lead-Free / Halogen-Free | Yes / Yes (per Microchip product page) |
PIC24FJ128GA406-I/PT ピン構成
| ピン 1 | RP15/PWM3H/RA7 — Remappable peripheral I/O / PWM / PORTA bit 7 |
| ピン 2 | RP14/SDA2/PWM2H/RA6 — Remappable I/O / I²C SDA2 / PWM / PORTA bit 6 |
| ピン 3 | RP13/SCL2/PWM1H/RA5 — Remappable I/O / I²C SCL2 / PWM / PORTA bit 5 |
| ピン 4 | RP12/RA4 — Remappable I/O / PORTA bit 4 |
| ピン 5 | RP11/RA3 — Remappable I/O / PORTA bit 3 |
| ピン 6 | RP10/RA2 — Remappable I/O / PORTA bit 2 |
| ピン 7 | RP9/RA1 — Remappable I/O / PORTA bit 1 |
| ピン 8 | RP8/RA0 — Remappable I/O / PORTA bit 0 |
| ピン 9 | VDD — Positive supply (2.0V to 3.6V) |
| ピン 10 | VSS — Ground reference |
| ピン 11 | OSC1/RC12 — Crystal oscillator input / PORTC bit 12 |
| ピン 12 | OSC2/RC15 — Crystal oscillator output / PORTC bit 15 |
| ピン 13 | RC13/SOSC1 — PORTC bit 13 / secondary oscillator |
| ピン 14 | RC14/SOSC2 — PORTC bit 14 / secondary oscillator |
| ピン 15 | VDDCORE — Internal 1.8V regulator output - decouple 1µF + 0.1µF |
| ピン 16 | PGEC1/AN0/RB0 — ICSP clock / ADC input / PORTB bit 0 |
| ピン 17 | PGED1/AN1/RB1 — ICSP data / ADC input / PORTB bit 1 |
| ピン 18 | AN2/RB2 — ADC input / PORTB bit 2 |
| ピン 19 | AN3/C1IND/RB3 — ADC input / comparator input / PORTB bit 3 |
| ピン 20 | AN4/C1INC/RB4 — ADC input / comparator input / PORTB bit 4 |
| ピン 21 | AN5/C2IND/RB5 — ADC input / comparator input / PORTB bit 5 |
| ピン 22 | VSS — Ground reference |
| ピン 23 | VDD — Positive supply (2.0V to 3.6V) |
| ピン 24 | AN6/RP0/RB6 — ADC input / remappable I/O / PORTB bit 6 |
| ピン 25 | AN7/RP1/RB7 — ADC input / remappable I/O / PORTB bit 7 |
| ピン 26 | AN8/RP2/RB8 — ADC input / remappable I/O / PORTB bit 8 |
| ピン 27 | AN9/RP3/RB9 — ADC input / remappable I/O / PORTB bit 9 |
| ピン 28 | CVREF+/AN10/RP4/RB10 — Comparator ref / ADC / remappable I/O / PORTB bit 10 |
| ピン 29 | CVREF-/AN11/RP5/RB11 — Comparator ref / ADC / remappable I/O / PORTB bit 11 |
| ピン 30 | AN12/RP6/RB12 — ADC input / remappable I/O / PORTB bit 12 |
| ピン 31 | AN13/RP7/RB13 — ADC input / remappable I/O / PORTB bit 13 |
| ピン 32 | AN14/RP16/RB14 — ADC input / remappable I/O / PORTB bit 14 |
| ピン 33 | AN15/RP17/RB15 — ADC input / remappable I/O / PORTB bit 15 |
| ピン 34 | VSS — Ground reference |
| ピン 35 | VDD — Positive supply (2.0V to 3.6V) |
| ピン 36 | D-/RC4 — USB D- / PORTC bit 4 |
| ピン 37 | D+/RC5 — USB D+ / PORTC bit 5 |
| ピン 38 | VBUS/RP18/RC6 — USB VBUS detect / remappable I/O / PORTC bit 6 |
| ピン 39 | RP19/RC7 — Remappable I/O / PORTC bit 7 |
| ピン 40 | RP20/RC8 — Remappable I/O / PORTC bit 8 |
| ピン 41 | RP21/RC9 — Remappable I/O / PORTC bit 9 |
| ピン 42 | VUSB3V3 — USB internal 3.3V regulator output - decouple 0.1µF + 4.7µF |
| ピン 43 | LCDBIAS0/RP22/RC10 — LCD bias / remappable I/O / PORTC bit 10 |
| ピン 44 | LCDBIAS1/RC11 — LCD bias / PORTC bit 11 |
| ピン 45 | SDA1/RP23/RA15 — I²C SDA1 / remappable I/O / PORTA bit 15 |
| ピン 46 | SCL1/RP24/RA14 — I²C SCL1 / remappable I/O / PORTA bit 14 |
| ピン 47 | RP25/RA13 — Remappable I/O / PORTA bit 13 |
| ピン 48 | RP26/RA12 — Remappable I/O / PORTA bit 12 |
| ピン 49 | RP27/RA11 — Remappable I/O / PORTA bit 11 |
| ピン 50 | RP28/RA10 — Remappable I/O / PORTA bit 10 |
| ピン 51 | RP29/RA9 — Remappable I/O / PORTA bit 9 |
| ピン 52 | VSS — Ground reference |
| ピン 53 | VDD — Positive supply (2.0V to 3.6V) |
| ピン 54 | COM0/RE0 — LCD common 0 / PORTE bit 0 |
| ピン 55 | COM1/RE1 — LCD common 1 / PORTE bit 1 |
| ピン 56 | COM2/RE2 — LCD common 2 / PORTE bit 2 |
| ピン 57 | COM3/RE3 — LCD common 3 / PORTE bit 3 |
| ピン 58 | COM4/RE4 — LCD common 4 / PORTE bit 4 |
| ピン 59 | COM5/RE5 — LCD common 5 / PORTE bit 5 |
| ピン 60 | COM6/RE6 — LCD common 6 / PORTE bit 6 |
| ピン 61 | COM7/RE7 — LCD common 7 / PORTE bit 7 |
| ピン 62 | SEG0/RF0 — LCD segment 0 / PORTF bit 0 |
| ピン 63 | MCLR/RF1 — Master clear reset / PORTF bit 1 |
| ピン 64 | SEG1/RF2 — LCD segment 1 / PORTF bit 2 |
主な用途
PIC24FJ128GA406-I/PT の用途: 6 件s: Secure IoT Sensor Nodes, Battery-Powered Wearable Health Monitors, Electronic Shelf Labels (ESL), Smart Metering and Utility Endpoints, Secure Authentication Tokens and HSMs, Industrial HMI Panels with LCD.
Secure IoT Sensor Nodes
The PIC24FJ128GA406-I/PT is purpose-built for secure IoT sensor nodes where authenticated TLS-style communication, long battery life, and small PCB footprint are all required. The integrated hardware crypto engine offloads AES-128, AES-256, SHA-256, and ECC operations, freeing the 16 MIPS core for sensor sampling and protocol stack handling - according to the Microchip datasheet, hardware AES executes roughly 8 to 10x faster than software equivalents. XLP deep-sleep modes below 1 µA and fast wake-up under 5 µs enable duty-cycled sensing that extends coin-cell life beyond 10 years. The USB OTG interface also allows direct battery charging or firmware updates without an extra IC.
おすすめ
Battery-Powered Wearable Health Monitors
Wearable health monitors demand a low-power MCU with integrated display driving, secure data handling for HIPAA-style compliance, and a tiny PCB footprint - all matching the PIC24FJ128GA406-I/PT. The on-chip segmented LCD driver with charge pump supports up to 96 segments without external bias components, ideal for direct glass LCDs showing heart rate, SpO2, and battery state. The hardware crypto engine secures Bluetooth pairing keys and stores hashed patient data in protected Flash rows. XLP sleep currents below 1 µA extend operating life on a CR2032 to multi-month durations per the Microchip XLP family datasheet.
おすすめ
Electronic Shelf Labels (ESL)
Electronic shelf labels need an MCU that drives a segmented LCD, runs for years on a coin cell, and supports secure over-the-air price updates - precisely the PIC24FJ128GA406-I/PT use case. The hardware crypto engine authenticates price-update commands, preventing unauthorized tampering in retail environments. The integrated segmented LCD driver eliminates external bias generators, shrinking the ESL PCB to coin-cell proportions. With XLP deep-sleep and rapid wake-up, the MCU can service periodic RF sync events while keeping average current below 5 µA, per the Microchip XLP datasheet - the foundation for multi-year battery life on retail shelves.
おすすめ
Smart Metering and Utility Endpoints
Smart electricity, gas, and water meters require an MCU with secure firmware, RTC, segmented LCD readout, and ultra-low sleep current - capabilities the PIC24FJ128GA406-I/PT delivers in a single chip. The hardware crypto engine authenticates firmware updates and secures communication with the utility head-end, mitigating tampering risks that have plagued the smart-grid industry. The segmented LCD driver displays consumption, tariff, and status data without external drivers, and XLP sleep modes keep the meter running for 10+ years on a primary lithium cell. The 64-pin TQFP footprint also provides ample GPIO for pulse counting and tamper switches.
おすすめ
Secure Authentication Tokens and HSMs
Hardware security tokens for FIDO2, banking, and industrial access control leverage the PIC24FJ128GA406-I/PT hardware crypto engine to perform AES, SHA-256, and HMAC in tamper-resistant hardware. Per the Microchip PIC24FJ128GA datasheet, the crypto module supports DMA-fed block operations that complete AES-128 in microseconds, well within USB HID latency budgets. XLP sleep modes below 1 µA extend token standby to multi-year durations on a single coin cell, and the 128KB Flash is sufficient for full TLS client stacks. The 64-TQFP package simplifies integration into USB key-form-factor tokens.
おすすめ
Industrial HMI Panels with LCD
Industrial human-machine-interface panels benefit from the PIC24FJ128GA406-I/PT combination of segmented LCD driving, secure firmware, USB OTG, and 16 MIPS performance. The integrated LCD controller directly drives up to 96 segments, allowing engineers to build control panels with multi-character LCDs without external driver ICs - reducing BOM cost and PCB area. The hardware crypto engine protects against firmware cloning and unauthorized parameter changes, critical in factory-automation environments. The -40 °C to +85 °C industrial temperature range also supports deployment near motors and PLCs.
おすすめ
おすすめ製品の概要
エンジニアリング参考データ: PIC24FJ128GA406-I/PT — 比較、設計ガイダンス、コンプライアンス情報。
選定ガイド
代替品との比較
| パラメータ | この製品 | PIC24FJ128GA006-I/PT | PIC24FJ128GA106-I/PT | PIC24FJ128GA010-I/PT | PIC24FJ128GA110-I/PT | PIC24FJ256GB406-I/PT |
|---|---|---|---|---|---|---|
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Package | 64-TQFP (10x10x1 mm) | 64-TQFP (10x10x1 mm) - same | 64-TQFP (10x10x1 mm) - same | 64-TQFP (10x10x1 mm) - same | 64-TQFP (10x10x1 mm) - same | 64-TQFP (10x10x1 mm) - same |
| Flash Memory | 128 KB | 128 KB | 128 KB | 128 KB | 128 KB | 256 KB |
| Data RAM | 16 KB | 8 KB | 16 KB | 8 KB | 16 KB | 32 KB |
| Hardware Crypto Engine | AES, DES, 3DES, SHA-1/256, MD5 | None | None | None | None | None (full USB OTG instead) |
| Segmented LCD Driver | Up to 96 segments with charge pump | None | None | None | None | Up to 96 segments with charge pump |
| USB Interface | USB 2.0 Full-Speed OTG | USB 2.0 Full-Speed OTG | USB 2.0 Full-Speed OTG | None | USB 2.0 Full-Speed OTG | USB 2.0 Full-Speed OTG + dedicated DMA |
| Operating Voltage | 2.0 V to 3.6 V | 2.0 V to 3.6 V | 2.0 V to 3.6 V | 2.0 V to 3.6 V | 2.0 V to 3.6 V | 2.0 V to 3.6 V |
| Maximum CPU Speed | 32 MHz / 16 MIPS | 32 MHz / 16 MIPS | 32 MHz / 16 MIPS | 32 MHz / 16 MIPS | 32 MHz / 16 MIPS | 32 MHz / 16 MIPS |
主な差別化要因
- Integrated hardware crypto engine on a 16-bit XLP MCU （vs PIC24FJ128GA006-I/PT)
- On-chip segmented LCD driver with charge pump （vs PIC24FJ128GA106-I/PT)
- Combined crypto + LCD + XLP in single 64-TQFP （vs PIC24FJ256GB406-I/PT)
設計ノート
The PIC24FJ128GA406-I/PT internal 1.8V regulator (VDDCORE, pin 15) requires a 1µF X7R ceramic plus a 0.1µF bypass placed within 3 mm of the pin with a wide ground return. The VUSB3V3 regulator (pin 42) needs 0.1µF + 4.7µF ceramic to support USB full-speed transients. Estimated: VDD current at 32 MHz with all peripherals enabled is approximately 25 mA, falling below 1 µA in Deep Sleep with RAM retention - confirm with datasheet IDD tables for your specific peripheral set.
Place the 32.768 kHz secondary oscillator (SOSC1/SOSC2, pins 13/14) crystal and its load capacitors within 5 mm of the pins with a guard ring tied to analog ground for RTC accuracy. The USB D+/D- traces (pins 36/37) must be 90-ohm differential with length matching within 2 mm and a continuous ground reference plane beneath; route them on the top layer and avoid vias. The segmented LCD COM/SEG traces should be guarded from high-frequency digital signals to minimize crosstalk and ghost-segment artifacts.
Do not enable the USB module before VUSB3V3 is stable - configure the DEVCTL/USB control register sequence per the datasheet power-up checklist. The Peripheral Pin Select (PPS) registers must be unlocked (OSCCON.IOLOCK cleared) before remapping UARTS/SPI/I²C to RPn pins, and re-locked after configuration for code safety. The hardware crypto engine requires the device library (Microchip PIC24/dsPIC peripheral library) - implementing AES in firmware instead of the crypto engine wastes Flash and slows execution by approximately 8x.
Keep the AVDD/AVSS supply pair (when used with ADC) routed as a star from the main regulator with a ferrite bead and 10µF + 0.1µF decoupling to minimize ADC noise coupling from digital switching. The segmented LCD charge pump requires C1 and C2 (typically 0.1µF X7R) placed close to the dedicated charge-pump pins with short, symmetric traces. Ground the VSS pins (10, 22, 34, 52) directly to a continuous ground plane with multiple vias for thermal and electrical performance.
コンプライアンス情報
RoHS and lead-free status confirmed per Microchip product page. Not AEC-Q100 qualified - select PIC24FJxxx automotive variants for automotive-grade designs. Industrial temperature grade (-40°C to +85°C) only.
