PIC32MX130F256DT-50I/ML - 50MHz 256KB Flash MCU | Microchip
部品番号: PIC32MX130F256DT-50I/ML ✓ 生産中| 数量 | 単価 | 小計 |
|---|---|---|
| 1 | $4.28 | $4.28 |
| 10 | $3.91 | $39.10 |
| 100 | $3.34 | $334.00 |
| 500 | $2.86 | $1,430.00 |
| 1,000 | $2.55 | $2,550.00 |
PIC32MX130F256DT-50I/ML 概要
A 32-bit microcontroller (MCU) is an embedded processor that integrates CPU core, Flash program memory, SRAM data memory, and a rich peripheral set on a single silicon die. The PIC32MX1xx family uses the MIPS32 M4K core (a Harvard-architecture 32-bit RISC core licensed from Imagination/MIPS Technologies) wrapped with Microchip's PIC peripheral ecosystem. In the broader taxonomy it sits as: 32-bit MCU -> microcontroller -> embedded processor -> semiconductor. This hierarchy matters when searching for second-source parts or evaluating migration to newer families.
Key features of the PIC32MX130F256DT-50I/ML include 256 KB Flash, 16 KB SRAM, up to 50 MHz / 83 DMIPS performance, a 10-bit ADC with multiple input channels, two I2S/SPI modules for codec and serial communication, Peripheral Pin Select (PPS) for flexible routing of digital peripherals, a Parallel Master Port (PMP) for graphics interfaces, mTouch capacitive touch support, 1 ns high-resolution time measurement, and on-chip temperature measurement capability. The peripheral Pin Select feature is particularly valuable because it allows remapping of digital functions to multiple physical pins, simplifying PCB layout.
The architecture uses the MIPS32 M4K Harvard core with separate instruction and data paths, allowing simultaneous fetch and memory access for higher throughput. Five 16-bit timers/counters, four I2C, two SPI/I2S, USB (device/host/OTG on select parts), and PMP provide ample connectivity for mixed-signal designs. Multiple low-power modes (Sleep, Idle, Deep Sleep on compatible variants) reduce quiescent current for power-constrained applications.
Typical applications include consumer appliances, low-cost graphical user interfaces via PMP, capacitive touch human-machine interfaces, USB peripherals, audio processing with external codecs via I2S, industrial control panels, sensor aggregation nodes, and hobbyist/educational platforms. The combination of 256 KB Flash and ample peripherals makes it a versatile workhorse.
When designing with this MCU, plan for an external 8 MHz crystal or use the internal 8 MHz Fast RC oscillator with PLL to reach 50 MHz. PPS configuration must be set early in firmware; pin assignment mismatches are a common bring-up issue. The 44-QFN package exposes more I/O than typical 32-pin QFNs, giving flexibility without migrating to larger packages.
This page synthesizes distributor pricing, parametric drop-in alternatives, and practical design notes drawn from Microchip datasheets and reference designs, providing context not found on a single manufacturer page.
ドロップイン代替品: PIC32MX130F256DT-50I/ML — 同一パッケージでピン互換。PCBの作り直しが必要な異なるパッケージの部品は除外されています。
このシリーズのバリエーション
同一シリーズでドロップイン互換のモデル: PIC32MX130F256DT-50I/ML （同一形状・フットプリント） — 相違点: ADC, Package, Operating Temperature, mTouch Capacitive Touch, Core.
クイック比較ツール — 並列比較する代替部品を選択:
PIC32MX130F256DT-I/ML
✅ ドロップイン ⚠️ 仕様未検証✓ 在庫あり
$3.95 / 個
データシートを見る →PIC32MX130F256D-I/ML
✅ ドロップイン ⚠️ 仕様未検証📋 参考代替品（カタログ未掲載）
PIC32MX130F256BT-I/ML
✅ ドロップイン ⚠️ 仕様未検証✓ 在庫あり
$3.65 / 個
データシートを見る →PIC32MX130F256B-I/ML
✅ ドロップイン ⚠️ 仕様未検証✓ 在庫あり
$4.12 / 個
データシートを見る →PIC32MX130F256DT-50I/ML 最大定格＆電気的特性
| Core | MIPS32 M4K (PIC32MX1xx) |
| Architecture | 32-bit RISC Harvard |
| Max CPU Speed | 50 MHz / 83 DMIPS |
| Program Memory (Flash) | 256 KB (256K x 8) |
| Data Memory (SRAM) | 16 KB |
| Operating Voltage Range | 2.3 V to 3.6 V |
| Active Current | 0.5 mA/MHz (typical) |
| ADC | 10-bit |
| I2C | 4 |
| SPI/I2S | 2 |
| Timers | 5 x 16-bit |
| PPS (Peripheral Pin Select) | Yes |
| PMP (Parallel Master Port) | Yes |
| mTouch Capacitive Touch | Yes |
| Temperature Measurement | On-chip |
| High-Resolution Timer | 1 ns |
| パッケージ | 44-QFN (8x8 mm) |
| 動作温度 | -40C to +85C (industrial, -I suffix) |
| 実装タイプ | Surface Mount |
| RoHS | Compliant |
PIC32MX130F256DT-50I/ML 44-qfn (8x8 mm) ピン配置ガイド
PIC32MX130F256DT-50I/ML (44-qfn (8x8 mm) パッケージ) のピン配置。 このデジタルICには、GPIO、通信インターフェース (UART、SPI、I2C)、および電源ピンが含まれています。代替ピン機能と設定オプションについては、メーカーのデータシートを参照してください。組み込みシステム設計とPCBレイアウトに不可欠です。
詳細なピン配置データはありません: PIC32MX130F256DT-50I/ML.
詳細は データシート をご参照ください。
主な用途
PIC32MX130F256DT-50I/ML の用途: 7 件s: Consumer Appliance Control, Capacitive Touch HMI Panel, Industrial Sensor Aggregation Node, Audio Processing with External Codec, Low-Cost Graphical User Interface, Educational / Hobbyist Development Platform, IoT Edge Sensor Node.
Consumer Appliance Control
The PIC32MX130F256DT-50I/ML is well suited for consumer appliance main control boards including washing machines, dishwashers, and induction cooktops. Its 256 KB Flash comfortably hosts user-interface firmware plus motor-control algorithms, while the 10-bit ADC reads thermistor sensors for temperature regulation. PPS allows flexible pin assignment when routing signals between display, keypad, and power-stage connectors. The 0.5 mA/MHz typical active current keeps idle standby power low, helping appliances meet energy-efficiency standards. Industrial -40C to +85C temperature range supports unconditioned garage or basement installations.
おすすめ
Capacitive Touch HMI Panel
Microchip's mTouch capacitive touch firmware library runs natively on the PIC32MX130F256DT-50I/ML, allowing engineers to implement sliders, buttons, and proximity sensors without external touch ICs. The 256 KB Flash stores the touch algorithm plus application logic, while the on-chip temperature sensor compensates for environmental drift. PMP peripheral can drive a small parallel LCD for combined touch-and-display modules. With 50 MHz CPU headroom, touch scanning and UI rendering coexist without missing scans.
おすすめ
Industrial Sensor Aggregation Node
Used as a sensor hub on factory floors, the PIC32MX130F256DT-50I/ML aggregates data from multiple analog and digital sensors via its 10-bit ADC and I2C/SPI ports. PPS simplifies routing when integrating several sensor types on the same PCB. The 256 KB Flash holds Modbus or proprietary industrial protocol stacks plus local processing, and 16 KB SRAM is sufficient for transient buffers. Operating temperature to +85C supports typical control cabinet environments.
おすすめ
Audio Processing with External Codec
The PIC32MX130F256DT-50I/ML interfaces with external audio codecs via its two I2S/SSP modules, supporting stereo audio at common sample rates for applications such as intercoms, hearing-assist devices, and Bluetooth audio adapters. The 50 MHz / 83 DMIPS CPU headroom runs DSP-style audio processing (filters, dynamics) in real time, and 256 KB Flash holds full audio stacks. PMP can drive small graphical displays for audio source selection.
おすすめ
Low-Cost Graphical User Interface
The PMP (Parallel Master Port) on the PIC32MX130F256DT-50I/ML drives 8080/6800-style parallel LCDs for graphical user interfaces without an external graphics controller. This reduces BOM cost for HMI in vending machines, point-of-sale terminals, and small industrial panels. The 50 MHz CPU handles rendering of basic bitmaps and fonts, and 16 KB SRAM provides sufficient framebuffer space for small monochrome or color displays. mTouch can complement the display for touch input.
おすすめ
Educational / Hobbyist Development Platform
The PIC32MX130F256DT-50I/ML is popular in maker and educational contexts because it is supported by MPLAB X IDE, XC32 compiler, and the Arduino-compatible chipKIT platform via the PIC32MX1xx ecosystem. The combination of 256 KB Flash, 16 KB SRAM, and a rich peripheral set lets students progress from simple GPIO to USB, graphics, and touch projects on a single board. The 44-QFN package on common breakout boards exposes all pins for breadboarding.
おすすめ
IoT Edge Sensor Node
The PIC32MX130F256DT-50I/ML functions as an IoT edge node aggregating analog sensor readings, applying local filtering, and forwarding via UART/SPI to a wireless module (Wi-Fi, LoRa, BLE). Its 0.5 mA/MHz active current and flexible low-power modes enable battery-operated deployments. PPS reassignment is invaluable when prototyping different radio modules with varying pinouts. 256 KB Flash leaves room for over-the-air firmware update (OTA) bootloader plus application.
おすすめ
おすすめ製品の概要
エンジニアリング参考データ: PIC32MX130F256DT-50I/ML — 比較、設計ガイダンス、コンプライアンス情報。
選定ガイド
代替品との比較
| パラメータ | この製品 | PIC32MX130F256DT-I/ML | PIC32MX130F256D-I/ML | PIC32MX130F256BT-I/ML | PIC32MX130F256B-I/ML |
|---|---|---|---|---|---|
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Package | 44-QFN (8x8 mm) | 44-QFN (8x8 mm) - same | 44-QFN (8x8 mm) - same | 44-QFN (8x8 mm) - same | 44-QFN (8x8 mm) - same |
| Flash | 256 KB | 256 KB | 256 KB | 256 KB | 256 KB |
| SRAM | 16 KB | 16 KB | 16 KB | 16 KB | 16 KB |
| Max CPU Speed | 50 MHz / 83 DMIPS | 40 MHz (industrial -I) | 40 MHz (industrial -I) | 40 MHz | 40 MHz |
| mTouch | Yes | Yes | Yes | Yes | Yes |
| Operating Temperature | -40C to +85C (industrial) | -40C to +85C | -40C to +85C | -40C to +85C | -40C to +85C |
主な差別化要因
- PMP for direct LCD/FPGA parallel interfaces （vs PIC32MX130F256B-I/ML)
- 50 MHz performance tier vs 40 MHz industrial siblings （vs PIC32MX130F256DT-I/ML)
- Industrial -40C to +85C temperature range （vs PIC32MX130F256H-V/MR (industrial -V parts))
設計ノート
Power the PIC32MX130F256DT-50I/ML from a low-noise 3.3V LDO. Place 100 nF decoupling close to each VDD pin and a bulk 10 uF tantalum or ceramic capacitor near the package. The MCU's typical active current is 0.5 mA/MHz (around 25 mA at 50 MHz); peak currents during Flash programming are higher, so provision decoupling accordingly. AVDD and AVSS should be filtered separately from digital rails when the ADC is in use, sharing a common ground only at one point.
The 44-QFN (8x8 mm) exposes a center thermal pad that must be soldered to a ground pad on the PCB for both thermal dissipation and electrical reference. Use an array of thermal vias (typically 9 to 25) under the pad to a ground plane on the opposite layer. Route high-speed digital signals (PMP, SPI/I2S) with impedance-controlled traces and keep them away from analog ADC inputs. Place the 8 MHz crystal within 5 mm of the OSC1/OSC2 pins with a grounded guard ring to minimize noise coupling.
Common bring-up pitfalls include: (1) forgetting to configure PPS before using remapped peripherals (UART/SPI/I2C pins will not function until unlocked via CFGCON unlock sequence); (2) leaving JTAG enabled and losing an I/O pin - disable JTAG via configuration bits if those pins are needed; (3) using the internal Fast RC without enabling PLL when 50 MHz performance is required - the default FRC runs at 8 MHz; (4) forgetting the 1 ms startup delay on the 32 kHz domain after power-on.
PMP bus traces should be length-matched within 1 cm across the 8 to 16 data lines to avoid skew at higher MCU speeds. For I2S audio interfaces, keep the bit clock below 12.5 MHz and use source-synchronous routing. Place a small ferrite bead or 10 ohm resistor in series with the analog AVdd rail when ADC accuracy of better than 1 LSB is required, combined with a clean LDO (Microchip MCP1700 or equivalent) isolated from the digital 3.3V rail.
コンプライアンス情報
RoHS compliant per Microchip product page. AEC-Q100 not applicable (this part is not automotive-qualified); consider PIC32MX automotive variants if AEC-Q100 is required.