VS1073A-L - MP3/Ogg/FLAC Audio Codec LQFP-48 | VLSI
部品番号: VS1073A-L ✓ 生産中| 数量 | 単価 | 小計 |
|---|---|---|
| 1 | $20 | $20.00 |
| 10 | $10 | $100.00 |
| 100 | $10 | $1,000.00 |
| 500 | $4 | $2,000.00 |
| 1,000 | $2.55 | $2,550.00 |
| 2,250 | $2.44 | $5,490.00 |
VS1073A-L 概要
An audio codec IC is a mixed-signal integrated circuit that converts analog microphone or line-level audio into digital samples (ADC path) and converts stored or received digital audio back into analog signals for headphones or line output (DAC path). Modern codecs such as the VS1073A-L integrate a hardware DSP accelerator so that compressed formats like MP3 and Ogg Vorbis, as well as FLAC and WAV PCM, can be decoded or encoded on-chip without consuming the host MCU's CPU cycles.
Key features include on-chip encoding and decoding of MP3, Ogg Vorbis, FLAC, WAV PCM, and G.711/G.722 voice formats; a stereo 16-bit DAC and stereo 16-bit ADC; separate analog AVDD and digital CVDD supplies; a high-level SCI (Serial Control Interface) command set; and a dedicated serial audio data (SDI) input that streams compressed bitstreams to the decoder. The part runs from a 6.144 MHz fundamental-mode crystal or external clock and supports variable sample rates from 8 kHz to 48 kHz at the analog interfaces.
The VS1073A-L uses a 6.144 MHz reference clock and a separate internal PLL to derive the audio sample-rate clocks. It exposes I2S in addition to the parallel/DSP serial audio data path, which simplifies connection to external DACs, ADCs, or digital speaker amplifiers. The 1.25 V CVDD rail must be generated externally (the VS10xx comparison app note recommends a dedicated LDO for future-proofing).
Typical applications include MP3 player modules, Ogg Vorbis / FLAC playback docks, voice recorders, two-way intercom panels, USB audio adapters, and embedded audio playback in industrial HMIs. The combination of on-chip encoding and decoding makes it a fit for products that must both record and play audio.
When designing with this part, ensure the CVDD rail is stable before AVDD is applied, route the analog grounds separately back to the regulator, and keep the 6.144 MHz crystal traces short to avoid jitter that would otherwise degrade the DAC SNR.
This page synthesizes distributor pricing, drop-in VS10xx family alternatives, and practical design notes not found in the bare manufacturer datasheet, giving engineers a one-stop reference for sourcing and designing with the VS1073A-L.
ドロップイン代替品: VS1073A-L — 同一パッケージでピン互換。PCBの作り直しが必要な異なるパッケージの部品は除外されています。
クイック比較ツール — 並列比較する代替部品を選択:
VS1063A-L
✅ ドロップイン📋 参考代替品（カタログ未掲載）
VS1053B-L
✅ ドロップイン📋 参考代替品（カタログ未掲載）
VS1003B-L
✅ ドロップイン ⚠️ 仕様未検証📋 参考代替品（カタログ未掲載）
VS1053-L
✅ ドロップイン ⚠️ 仕様未検証📋 参考代替品（カタログ未掲載）
VS1063-L
✅ ドロップイン ⚠️ 仕様未検証📋 参考代替品（カタログ未掲載）
VS1073A-L 仕様
| Product Type | Audio codec IC with on-chip MP3/Ogg/FLAC/WAV encoder and decoder |
| Decoded Formats | MP3, Ogg Vorbis, FLAC, WAV (PCM), G.711 u-law, G.711 A-law, G.722 |
| Encoded Formats | MP3, Ogg Vorbis, FLAC, PCM WAV, G.711, G.722 |
| Host Interface | SPI (SCI for control, SDI for audio data stream) |
| Auxiliary Interfaces | GPIO, I2S, UART |
| DAC / ADC Resolution | 16-bit stereo DAC and 16-bit stereo ADC |
| Sample Rates | 8 kHz to 48 kHz |
| Reference Clock | 6.144 MHz fundamental-mode crystal or external clock |
| Digital Supply CVDD | 1.25 V (external regulator recommended) |
| パッケージ | LQFP-48 (SMD) |
| 実装タイプ | Surface Mount |
| RoHS ステータス | Compliant (per VLSI webstore listing) |
| Datasheet Status | PRELIMINARY (per vlsi.fi PDF header) |
VS1073A-L ピン構成
| ピン 1 | GPIO0 — General-purpose I/O 0 |
| ピン 2 | GPIO1 — General-purpose I/O 1 |
| ピン 3 | GPIO2/DCLK — General-purpose I/O 2 / DCLK |
| ピン 4 | GPIO3/SDATA — General-purpose I/O 3 / SDATA |
| ピン 5 | GPIO4 — General-purpose I/O 4 |
| ピン 6 | XRESET — Active-low hardware reset |
| ピン 7 | DVDD — Digital supply (CVDD 1.25 V) |
| ピン 8 | DGND — Digital ground |
| ピン 9 | XTALO — Crystal oscillator output |
| ピン 10 | XTALI — Crystal oscillator input (6.144 MHz) |
| ピン 11 | TEST — Test pin (per datasheet) |
| ピン 12 | IOVDD — I/O supply |
| ピン 13 | XCS — SPI chip select (active low) |
| ピン 14 | SCLK — SPI serial clock |
| ピン 15 | SI — SPI serial input (SCI) |
| ピン 16 | SO — SPI serial output (SCI) |
| ピン 17 | XCS — SDI chip select (active low, compressed audio data) |
| ピン 18 | SCLK — SDI serial clock (compressed audio data) |
| ピン 19 | SDI — SDI serial data (compressed audio stream) |
| ピン 20 | I2S_MCLK — I2S master clock |
| ピン 21 | I2S_BCLK — I2S bit clock |
| ピン 22 | I2S_LRC — I2S word clock (left/right) |
| ピン 23 | I2S_DATA — I2S serial data |
| ピン 24 | UART_TX — UART transmit |
| ピン 25 | UART_RX — UART receive |
| ピン 26 | AGND — Analog ground |
| ピン 27 | AVDD — Analog supply |
| ピン 28 | LINEIN_L — Line input left (or MIC) |
| ピン 29 | LINEIN_R — Line input right (or MIC) |
| ピン 30 | MIC_BIAS — Microphone bias |
| ピン 31 | GBUF — Common-mode buffer for line inputs |
| ピン 32 | RCAP — Reference voltage bypass capacitor |
| ピン 33 | AGND — Analog ground |
| ピン 34 | AVDD — Analog supply |
| ピン 35 | LINEOUT_L — Line output left (DAC) |
| ピン 36 | LINEOUT_R — Line output right (DAC) |
| ピン 37 | HP_GND — Headphone ground reference |
| ピン 38 | HPOUT_L — Headphone output left |
| ピン 39 | HPOUT_R — Headphone output right |
| ピン 40 | AGND — Analog ground |
| ピン 41 | AVDD — Analog supply |
| ピン 42 | DGND — Digital ground |
| ピン 43 | DVDD — Digital supply (CVDD 1.25 V) |
| ピン 44 | TEST — Test pin (per datasheet) |
| ピン 45 | GPIO5 — General-purpose I/O 5 |
| ピン 46 | GPIO6 — General-purpose I/O 6 |
| ピン 47 | GPIO7 — General-purpose I/O 7 |
| ピン 48 | XTEST — Reserved test pin (per datasheet) |
主な用途
VS1073A-L の用途: 6 件s: MP3 / Ogg / FLAC playback module, Voice recorder / dictation device, Two-way intercom / doorbell panel, USB audio adapter / streaming dongle, Industrial HMI with audio prompts, Embedded audio playback in IoT devices.
MP3 / Ogg / FLAC playback module
The VS1073A-L is ideal for standalone playback modules because it integrates a stereo 16-bit DAC, a hardware MP3/Ogg/FLAC/WAV decoder, and a high-level SCI command set. Per VLSI's product page, the host MCU streams compressed bytes over SPI while the on-chip DSP does the decompression, freeing the host for user interface work. The 1.25 V CVDD rail must come from a dedicated LDO per the VS10xx comparison app note. Sample rates from 8 kHz to 48 kHz cover all common consumer music files, and the LQFP-48 footprint is straightforward to route on a 2-layer board.
おすすめ
Voice recorder / dictation device
For voice recorder products, the VS1073A-L combines a stereo 16-bit ADC with on-chip Ogg Vorbis, MP3, and FLAC encoders so captured audio can be compressed and stored directly without taxing the host MCU. According to the VLSI product page, the IC supports G.711 u-law, G.711 A-law, and G.722 voice codecs for telephony-grade capture. The 6.144 MHz reference clock gives stable ADC sampling, and the dedicated SDI data path keeps compressed streams isolated from the SCI control bus.
おすすめ
Two-way intercom / doorbell panel
In two-way intercom panels the VS1073A-L handles both playback of stored prompts and capture/transmission of caller audio using the integrated stereo ADC and DSP encoder. Per the VS10xx comparison app note, hardware designs using the VS1073a LQFP-48 pinout stay future-proof across the family with a 12.288 MHz crystal. GPIO pins can drive status LEDs or relay triggers, while UART provides an out-of-band path for diagnostic logs in field-installed units.
おすすめ
USB audio adapter / streaming dongle
The VS1073A-L fits USB audio dongles that need both headphone output (via the on-chip DAC) and microphone input (via the on-chip ADC). Its I2S interface, listed by TME alongside GPIO/SPI/UART, lets a companion USB audio bridge stream PCM directly to the DAC. Because MP3/Ogg/FLAC decoding runs on the internal DSP, the host can remain a low-cost Cortex-M0 without hardware accelerators.
おすすめ
Industrial HMI with audio prompts
Industrial HMIs benefit from the VS1073A-L's ability to decode FLAC and MP3 prompts with high SNR while the host PLC handles the touch panel logic. The LQFP-48 package and SPI control interface make it easy to mount alongside an MCU on a backplane PCB. Per VLSI's datasheet, the analog and digital grounds are kept separate inside the IC, which helps reject the digital switching noise typical of industrial power environments.
おすすめ
Embedded audio playback in IoT devices
Smart-home and IoT sensor hubs use the VS1073A-L as a low-cost audio output stage for alarm tones, voice prompts, and music streaming. According to VLSI's product page, the host MCU only sends compressed bytes over SPI, leaving plenty of headroom for wireless stacks. The 1.25 V CVDD rail integrates cleanly with modern 1.2 V core regulators already present on most IoT SoCs.
おすすめ
おすすめ製品の概要
エンジニアリング参考データ: VS1073A-L — 比較、設計ガイダンス、コンプライアンス情報。
選定ガイド
代替品との比較
| パラメータ | この製品 | VS1063A-L | VS1053B-L | VS1003B-L | VS1053-L | VS1063-L |
|---|---|---|---|---|---|---|
| Package | LQFP-48 (SMD) | LQFP-48 - same | LQFP-48 - same | LQFP-48 - same | LQFP-48 - same | LQFP-48 - same |
| Brand | VLSI Solution | VLSI Solution | VLSI Solution | VLSI Solution | VLSI Solution | VLSI Solution |
| On-chip Encoder | Yes (MP3 / Ogg / FLAC / PCM) | Yes (MP3 / Ogg) | No (decode only) | No (decode only) | No (decode only) | Yes (MP3 / Ogg) |
| FLAC Decode/Encode | Yes | No | No | No | No | No |
| Digital Supply CVDD | 1.25 V | 1.85 V | 1.85 V | 1.85 V | 1.85 V | 1.85 V |
| Reference Clock | 6.144 MHz (12.288 MHz per app note) | 12.288 MHz | 12.288 MHz | 12.288 MHz | 12.288 MHz | 12.288 MHz |
| Host Interface | SPI (SCI + SDI) | SPI (SCI + SDI) | SPI (SCI + SDI) | SPI (SCI + SDI) | SPI (SCI + SDI) | SPI (SCI + SDI) |
| Voice Codecs (G.711/G.722) | Yes (encode + decode) | Yes | Partial | No | Partial | Yes |
主な差別化要因
- Adds FLAC encode and decode on-chip （vs VS1063A-L)
- On-chip encoding pipeline （vs VS1053B-L)
- Lower CVDD aligns with modern SoC rails （vs VS1003B-L)
設計ノート
The VS1073A-L lowers the digital supply CVDD from 1.85 V (VS1053/VS1063) to 1.25 V. Per the VS10xx comparison app note, designs should add a dedicated low-noise LDO for the CVDD rail rather than sharing the 1.8 V used for the older family, otherwise the part will not boot reliably. Apply AVDD before or simultaneously with CVDD on power-up; XRESET must be held low until both rails are stable. Estimated: the 1.25 V CVDD LDO must source roughly 30-50 mA during MP3 decode at 128 kbps.
Route analog (AGND) and digital (DGND) grounds back to the regulator as separate islands joined only at the IC's AGND/DGND pin pair, per VLSI datasheet layout guidance. Keep the 6.144 MHz crystal traces short (under 5 mm) and place the load capacitors within 2 mm of XTALI/XTALO to avoid jitter that degrades DAC SNR. Decouple AVDD with 10 uF + 100 nF, and CVDD/DVDD with 10 uF + 100 nF, all within 3 mm of the supply pins.
Do not connect GPIO/DSP serial pins to 5 V logic; the VS1073A-L I/O supply is 3.3 V maximum per the datasheet, and exceeding it will damage the ESD cells. Do not omit the SDI compressed-audio path even if only using the SCI control path - the IC expects compressed bytes on SDI during MP3 decode. For VS1053/VS1063 migration, remember that CVDD level differs from VS1073A-L; reusing a 1.8 V rail will not work.
Place the analog line-input coupling capacitors and the headphone-output AC-coupling caps as close as possible to the LINEOUT/HPOUT pins to keep ground return paths short. The GBUF pin needs a 1 uF (typ.) bypass to AGND; do not leave it floating or the line inputs will saturate. Route headphone traces as a differential pair on the PCB to reject common-mode noise.
コンプライアンス情報
RoHS status inferred from VLSI webstore listing the part as a current-production IC. AEC-Q100 is not applicable for a consumer/industrial audio codec. Halogen-free and conflict-minerals disclosures are not published on the product page; set to unknown per data authenticity rules.
