ADC/DAC
제품 (2518)
ISL26312FVZ-T - 12-bit 125kSPS SAR ADC, 2-ch Diff | Renesas
The Renesas ISL26312FVZ-T is a 12-bit, 125 kSPS successive-approximation register (SAR) analog-to-digital converter with two differential input channels, offered in a 16-pin TSSOP package for industrial and instrumentation front-ends. As a member of the ISL26310/11/12/13/14/15/19 family, it provides excellent linearity across supply and temperature variations while consuming only 11 mW at full throughput and dropping to a typical 8 µA between conversions when auto power-down is enabled, making it well suited for battery-aware data-acquisition systems. A SAR ADC is a converter architecture that performs a binary search through an internal capacitive charge-redistribution DAC, evaluating one bit per conversion clock and producing the result on a single clock cycle without requiring a pipeline delay. SAR ADCs are prized for low-latency triggering, deterministic behavior on multiplexed inputs, and excellent DC linearity with no missing codes - and they remain the dominant choice for multi-channel precision industrial front-ends where both sample-accurate acquisition and lowest idle power matter. Key specifications of this part include 12-bit resolution, 125 kSPS maximum sampling rate, ±10 V input range when configured for bipolar operation, true-differential analog inputs, an SPI-compatible serial interface, single 2.7 V to 5.25 V supply operation, and automotive-grade -40 °C to +125 °C temperature support. The 0.7 LSB typical DNL, on-chip track-and-hold, and integrated input multiplexer enable direct sensor interfacing with minimal external signal conditioning. The on-chip sequencer and auto power-down state machine, combined with a flexible analog input mux, make the ISL26312FVZ-T straightforward to drop into multiplexed sensor panels, isolated transducer front-ends, and process-control loops. The SPI port operates in mode 0 and mode 3 and is easily framed by most FPGAs, microcontrollers, and digital isolators, so a single part can serve both 3.3 V MCU rails and 5 V legacy PLC backplanes. Typical uses include industrial process instrumentation, multi-channel data loggers, motor-control feedback, isolated sensor readouts, and precision weigh-scale / strain-gauge signal chains. The wide 2.7 V to 5.25 V supply range tolerates either a regulated 3.3 V rail or a 5 V USB- or PLC-derived supply. Across all of these uses, the TSSOP-16 footprint keeps the converter area cost low and routing simple. When designing with this device, place a 100 nF decoupling capacitor within 5 mm of the AVDD pin and a 10 µF bulk capacitor on the analog supply, route the analog and digital grounds through a star tie at the AGND pin, and verify SPI mode (CPOL/CPHA) against the host controller. For low-distortion input buffers, an op-amp rail-to-output driver such as the OPA2188 is recommended to avoid degrading the converter's DNL. This page combines distributor pricing, pin-compatible drop-in alternatives, and application design notes into a single reference - saving engineering time versus cross-checking three separate component databases.
ISL26312FVZ-T7A - 12-bit 125kSPS Dual-Channel SAR ADC | Renesas
The Renesas ISL26312FVZ-T7A is a 12-bit, 125 kSPS low-power successive-approximation-register (SAR) analog-to-digital converter (ADC) with two differential input channels, packaged in a 16-pin TSSOP and shipped on a 7-inch tape-and-reel carrier. A SAR ADC is a type of data converter that compares the sampled input voltage against a precision DAC one bit at a time over successive clock cycles, achieving deterministic latency and excellent DC accuracy at moderate sampling rates. SAR converters sit in the broader hierarchy: data converter -> ADC -> SAR ADC -> precision acquisition IC -> mixed-signal semiconductor. They are preferred over delta-sigma or pipeline ADCs whenever multiplexed multi-channel inputs, low power, simple SPI/QSPI/MICROWIRE digital interfaces, and excellent AC performance are needed in industrial instrumentation. Key features of the ISL26312FVZ-T7A include 12-bit resolution, 125 kSPS throughput, two differential input channels (selectable from up to four single-ended or two differential inputs through an internal analog multiplexer), an SPI/QSPI/MICROWIRE-compatible serial interface, and a wide 2.7 V to 5.25 V analog supply range that supports single-supply 3.3 V or 5 V rails. Technical depth comes from the proprietary input multiplexer with an integrated input buffer amplifier, which reduces input drive requirements and minimizes channel-to-channel crosstalk. The device draws microamp-level supply current at lower sample rates, and offers a hardware power-down pin for battery-sensitive applications. Linearity is maintained across the industrial -40 C to +125 C temperature range, supported by a built-in track/hold and a robust internal reference option. Typical applications include industrial process control loops, multi-channel data-acquisition front-ends, isolated sensor signal chains, PLC analog input modules, and battery-powered instrument clusters where the combination of low power draw and clean 12-bit DC performance yields high measurement integrity. When designing with this part, place a 10 nF ceramic decoupling capacitor directly at the AVDD pin and a 1 uF bypass at DVDD to keep the SAR comparator noise floor low. The REFIN/REFOUT pin accepts either an external reference or uses the internal 2.5 V reference - drive REFOUT with a low-ESR 10 uF ceramic for best AC performance. This page synthesizes distributor pricing, drop-in alternatives within the ISL26310/11/12/13/14/15/19 family, and practical design notes not collected in the manufacturer datasheet alone.
ISL26314FVZ - 12-bit 125kSPS 4-CH Differential SAR ADC | Renesas
The Renesas ISL26314FVZ is a 12-bit, 125 kSPS successive-approximation-register (SAR) analog-to-digital converter with 4 differential input channels, packaged in a 16-pin TSSOP. It operates from a single 2.7 V to 5.25 V analog supply and a 1.8 V to 3.6 V digital supply, drawing only 6.4 mW at full speed, which makes it well-suited to low-power multi-channel data-acquisition front-ends. What is a SAR ADC? A successive-approximation-register analog-to-digital converter is a sampling ADC architecture that performs one bit-trial per clock cycle using a binary search across an internal capacitive DAC. SAR ADCs are valued for deterministic latency (one conversion = N clock cycles), zero pipeline delay, excellent DC linearity, and low power consumption - they sit in the IC hierarchy: ADC -> data converter -> mixed-signal IC -> semiconductor. SAR converters are preferred over delta-sigma converters for multiplexed multi-channel sampling where per-channel latency must be deterministic, and over pipeline ADCs when power and simplicity matter more than very high sample rates. Key features include 4 differential inputs (expandable to 8 single-ended via software), 125 kSPS maximum throughput, ±1 LSB INL (typical), a proprietary input multiplexer with integrated buffer amplifier that reduces external drive requirements, and a wide operating temperature range of -40°C to +125°C. The device also integrates an internal 2.5 V reference (10 ppm/°C typical), an SPI/QSPI/MICROWIRE-compatible serial interface, and a hardware / software shutdown pin that reduces supply current to under 1 µA between conversions. The ISL26314 is implemented on a low-power CMOS process. An internal charge redistribution DAC combined with the proprietary input multiplexer allows direct connection of high-impedance sensors without external instrumentation amplifiers, simplifying the analog front end. The part is part of a broader pin-compatible family (ISL26310/11/12/13/14/15/19) offering 1, 2, 4, and 8 single-ended and 1, 2, 4 differential channel counts - enabling one PCB layout to scale across product variants. Typical applications include industrial process control, 4-20 mA loop digitization, multi-cell battery monitoring, programmable logic controller (PLC) analog input modules, weigh scales, and temperature measurement front-ends (RTD/thermocouple with external amplifier). When designing with this part, note that the input buffer lowers kick-back current into high-source-impedance sensors, but adding an RC anti-alias filter ahead of the input requires careful selection to avoid degrading settling at 125 kSPS. Use the SHDN pin to drop idle channels to microamp-level quiescent current in battery-powered multi-channel systems. This page synthesizes distributor pricing, same-family pin-compatible drop-in alternatives, and design notes not found in the manufacturer datasheet alone.
ISL26314FVZ-T - 12-bit 125kSPS SAR ADC, 4-Ch Diff | Renesas
The Renesas ISL26314FVZ-T is a 12-bit, 125 kSPS successive-approximation-register (SAR) analog-to-digital converter offering 2/4 differential input channels with excellent linearity over supply and temperature variations. It integrates a proprietary input multiplexer and combination buffer amplifier that reduces input drive requirements, simplifying front-end design and lowering system cost. The device is offered in a 16-pin TSSOP (FVZ) package and operates from a single analog supply. An SAR ADC is a successive-approximation-register analog-to-digital converter that uses a binary-search algorithm and an internal capacitive DAC to digitize an analog input in N conversion cycles for N-bit resolution. SAR ADCs are valued in the data-acquisition hierarchy for their deterministic latency, lack of pipeline delay, and low power consumption compared to pipelined ADCs, making them well suited to multiplexed multi-channel systems, industrial control loops, and battery-powered instrumentation. Key features of the ISL26314FVZ-T include 12-bit resolution with no missing codes, 125 kSPS maximum sampling rate, single-ended and differential input configurations, an integrated input multiplexer, an internal reference / buffer, and low power consumption suitable for portable applications. The part supports 2-channel single-ended or 1-channel differential input operation with SPI/QSPI/MICROWIRE-compatible serial interface, and operates across an extended industrial temperature range. Compared with rival 12-bit SAR ADCs, the integrated front-end buffer minimizes external op-amp stages and reduces BOM count. Internally, the ISL26314FVZ-T uses a charge-redistribution DAC architecture with a sample-and-hold front-end and on-chip digital correction. The input buffer amplifier provides high-impedance, low-leakage signal acquisition across the full analog input range, and the digital interface is designed for low-EMI operation in noise-sensitive systems. The architecture delivers excellent INL/DNL performance while consuming minimal supply current at lower throughput rates. Typical applications include industrial process control and data acquisition, portable and battery-powered instrumentation, multi-channel sensor monitoring, and medical instrumentation. The wide input range and integrated input mux make it particularly well-suited to multi-sensor systems requiring sequential channel scanning with consistent conversion accuracy. When designing with this part, ensure that the analog and digital ground returns are joined at a single star point beneath the ADC to minimize digital switching noise coupling into the analog input. Use a low-ESR 10 µF bypass capacitor close to the supply pin in parallel with a 0.1 µF ceramic for high-frequency decoupling. Verify SPI timing against your controller's worst-case SCLK rise/fall times before committing to layout. This page synthesizes distributor pricing, drop-in alternatives from the same SAR-ADC family, and practical design notes not assembled in any single manufacturer document.
ISL26315FVZ - 12-bit 125kSPS 4-CH SAR ADC | Renesas / Intersil
The Renesas / Intersil ISL26315FVZ is a 12-bit, 125 kSPS, 4-channel single-ended input successive-approximation-register (SAR) analog-to-digital converter (ADC) housed in a 16-pin TSSOP package. It operates from a 2.7 V to 5.25 V analog and digital supply and supports an SPI-compatible serial interface, making it well-suited for low-power multi-channel data-acquisition systems. An ADC (Analog-to-Digital Converter) is an integrated circuit that samples a continuous analog voltage and converts it into a discrete digital code. SAR ADCs use a binary-search successive-approximation algorithm with an internal sample-and-hold and DAC; they deliver deterministic latency, low latency per conversion, and excellent DC linearity with no pipeline delay. The ISL26315 belongs to the broader product hierarchy of data converter -> ADC -> SAR ADC -> precision mixed-signal IC, sitting under the data acquisition category that includes successive-approximation, sigma-delta, and pipeline architectures. Key specifications of the ISL26315FVZ include 12-bit resolution, 125 kSPS maximum sampling rate, 4 single-ended input channels (selectable through an input multiplexer), integrated input buffer amplifier that lowers the input drive requirements, and up to 5 kV Human Body Model ESD survivability on the analog inputs. The converter is specified for the industrial temperature range of -40 °C to +125 °C and is offered in the TSSOP-16 surface-mount package. The internal architecture combines a proprietary input multiplexer, a unity-gain input buffer that reduces the source-impedance burden on external driving circuitry, a high-accuracy comparator, an internal DAC, and a successive-approximation register. This topology achieves excellent linearity over supply and temperature variations and produces accurate conversions without requiring external signal conditioning in most low-frequency applications. Typical applications for the ISL26315FVZ include industrial process control and instrumentation, multi-channel sensor monitoring (thermocouple, RTD, bridge, and 4-20 mA loop read-back via an external shunt), battery management system cell voltage and current monitoring, factory automation analog front ends, programmable logic controller (PLC) analog input modules, and general-purpose data-acquisition boards requiring up to four simultaneously-sampled-or-multiplexed single-ended channels. When designing with the ISL26315FVZ, place a 0.1 µF decoupling capacitor as close as possible to each supply pin (AVCC and DVDD) and provide a low-impedance ground return; add a small RC anti-alias filter at each analog input to attenuate out-of-band noise above the Nyquist frequency (≈62.5 kHz at 125 kSPS). This page synthesizes distributor pricing from Mouser, DigiKey, LCSC and Octopart, pin-compatible drop-in alternatives from the ISL2631x family and competing SAR ADCs, and practical design notes that complement - but do not replace - the manufacturer datasheet.
ISL26315FVZ-T - 12-bit 125kSPS 4-ch SAR ADC | Renesas
The Renesas ISL26315FVZ-T is a 12-bit, 125 kSPS successive-approximation-register (SAR) analog-to-digital converter with four single-ended input channels and SPI-compatible serial interface, housed in a 16-pin TSSOP package. It operates from a single 2.7 V to 5.25 V analog supply, achieves ±1 LSB INL/DNL over the industrial -40 °C to +125 °C temperature range, and consumes only 11 mW at full 125 kSPS throughput. A successive-approximation-register ADC is a precision data converter that performs a binary search against an internal DAC to digitize an analog input in one conversion cycle per bit. SAR ADCs sit within the broader data-converter hierarchy (ADC -> data converter -> mixed-signal IC -> semiconductor), and the ISL26315FVZ-T family (ISL26310–ISL26319) combines this SAR core with a proprietary input multiplexer and integrated buffer amplifier to simplify front-end design while maintaining low-noise linearity. Key features include a proprietary input multiplexer plus combination buffer amplifier that reduces input drive requirements, SPI/QSPI/MICROWIRE-compatible serial interface, hardware and software reset options, 5 kV Human Body Model ESD survivability, and an Auto Power-Down mode that drops operating current to a typical 8 µA between conversions. The TSSOP-16 footprint also supports easy layout on mixed-signal PCBs. Architecturally, the device uses a low-power SAR core with internal track-and-hold, an on-chip reference buffer, and a flexible input channel sequencer that lets a single host controller scan multiple single-ended or differential channels. The 8-channel-input family member (ISL26319) shares the same digital interface, allowing firmware reuse across channel counts. Typical applications include portable industrial data loggers, multi-sensor 4-20 mA loop digitization, battery-powered instrumentation, factory automation sensor front ends, and process-control analog input modules. The wide 2.7-5.25 V supply range makes the part compatible with both 3.3 V and 5 V microcontroller rails. When designing with this part, place 100 nF decoupling capacitors as close as possible to AVDD and DVDD pins, route the analog and digital grounds as separate planes joined at a single point under the IC, and leave the SHDN pin properly pulled to enable Auto Power-Down for battery savings. If higher channel counts are needed, migrate to the pin-compatible ISL26319 (8 single-ended inputs) rather than cascading multiple parts. This page synthesizes distributor pricing, drop-in alternatives, and practical PCB/design notes not found in the manufacturer datasheet.
ISL26315FVZ-T7A - 12-bit 125kSPS 4-CH SAR ADC | Renesas
The Renesas ISL26315FVZ-T7A is a 12-bit, 125 kSPS, 4-channel single-ended SAR analog-to-digital converter (ADC) housed in a 16-pin TSSOP package. It combines a proprietary input multiplexer and combination buffer amplifier that reduces external drive requirements, while a hardware-resettable sequencer simplifies multi-channel scanning without software intervention. Operating from a 2.7 V to 5.25 V analog supply and a 1.68 V to 5.25 V digital supply, the part is targeted at low-power precision data acquisition systems where multi-channel throughput and small PCB footprint matter. A SAR ADC is a successive-approximation-register analog-to-digital converter that performs one conversion per clock cycle using a binary-search algorithm against an internal precision DAC, then digitizes a single input sample per acquisition. Unlike delta-sigma ADCs, SAR converters offer deterministic latency, no pipeline delay, and excellent DC accuracy, which is why they dominate multiplexed data acquisition, industrial process control, and precision instrumentation. The ISL26315FVZ-T7A fits the SAR -> ADC -> data converter -> signal chain IC hierarchy. Key parametric features include ±1 LSB INL/DNL (max), 4 single-ended analog inputs routed through an internal MUX, an SPI/QSPI/MICROWIRE-compatible serial interface, and a hardware pin-selectable sequencer that cycles through pre-programmed input channels. The device supports both unipolar (0 to VREF) and bipolar (programmed through input scaling) input ranges by changing the reference voltage. Architecturally, the ISL26315FVZ-T7A uses a charge-redistribution DAC array with a high-impedance input stage. The internal buffer allows direct connection to high-impedance sources, while the SAR engine completes a 12-bit conversion in 8 µs. Power consumption scales linearly with sample rate, drawing roughly 3 mA at 125 kSPS and dropping into the µA range at lower throughput, enabled by an automatic power-down between conversions. Typical applications include industrial process control, battery-powered instrumentation, multi-channel sensor monitoring (temperature, pressure, strain gauges), and portable medical devices. The wide supply range and internal buffer make it ideal for monitoring multiple transducers with one ADC. Design consideration: place a 10 µF tantalum plus 0.1 µF ceramic bypass close to pins 13 (AVDD) and 2 (DVDD), and keep the analog ground return isolated from digital switching currents. Decoupling and short analog traces are critical for meeting the ±1 LSB linearity spec. This page synthesizes distributor pricing, drop-in alternatives, and practical design notes not found in the manufacturer datasheet.
ISL26319FVZ - 12-bit 125kSPS 8-ch SAR ADC | Renesas
The Renesas ISL26319FVZ is a 12-bit, 125 kSPS, low-power successive-approximation-register (SAR) analog-to-digital converter offering 8 single-ended or 4 differential input channels in a 16-pin TSSOP package. It integrates a proprietary input multiplexer and combination buffer amplifier that lowers the driving requirements on the front-end signal source. The device operates from a 2.7 V to 5.25 V analog supply, drawing only 2.5 mA typical supply current at full speed, and includes a separate digital I/O supply pin (VDD) for easy interfacing to 1.8 V to 5.25 V logic. A SAR ADC is a type of analog-to-digital converter that uses a binary-search algorithm with a comparator and a precision DAC to resolve each conversion one bit at a time. SAR ADCs sit in the broader taxonomy of mixed-signal data converters -> ADCs -> SAR ADCs -> low-power precision ADCs -> integrated circuits. They are favored for industrial instrumentation because they offer deterministic latency, no pipeline delay, and excellent linearity over supply and temperature variations without the power cost of delta-sigma or pipeline architectures. Key features of the ISL26319FVZ include 12-bit resolution with no missing codes, 125 kSPS maximum sampling rate, INL of ±0.5 LSB (typical), single-ended and pseudo-differential input modes, an on-chip track-and-hold amplifier, and an SPI-/QSPI-/MICROWIRE-compatible serial interface. The integrated input buffer eliminates the need for an external op-amp, reducing BOM cost and board area in multichannel systems. Technically, the device uses a charge-redistribution DAC array together with a high-bandwidth comparator and a precision reference input. Channel switching is performed through a low-leakage CMOS multiplexer with break-before-make sequencing to prevent channel-to-channel crosstalk. The reference voltage range accepts up to VDD, and the part offers an explicit power-down mode that drops consumption below 1 µA, making it suitable for battery-powered or duty-cycled data acquisition. Typical applications include industrial process control and PLC analog input modules, multi-channel data acquisition systems for instrumentation, sensor signal conditioning front-ends (thermocouple, RTD, strain-gauge bridges), portable/battery-powered medical monitoring equipment, and factory automation I/O. The 8-channel single-ended capability is particularly useful in systems that aggregate many slow-moving analog signals. When designing with this ADC, place the reference decoupling capacitor (typically 10 µF ceramic plus 0.1 µF) directly at the REF pin with the shortest possible trace to minimize conversion noise. Route analog and digital grounds as a star-grounded split with a single tie-point under the IC, and avoid switching digital signals near the analog input traces to preserve the converter's SNR. This page synthesizes Renesas distributor pricing, pin-compatible same-family alternatives (ISL26315FVZ, ISL26312FVZ, ISL26311FBZ), and practical design notes not found in the manufacturer datasheet alone.
ISL26319FVZ-T - 12-bit 125kSPS 8-CH SAR ADC | Renesas
The Renesas ISL26319FVZ-T is a 12-bit, 125 kSPS, 8-channel single-ended (4-channel differential) successive-approximation analog-to-digital converter (SAR ADC) in a 16-pin TSSOP (FVZ) package, specified over the industrial -40C to +125C range. The -T suffix denotes tape-and-reel shipping. According to the Renesas datasheet, the part accepts single supplies from 2.7 V to 5.25 V, draws 11 mW (typical 8 uA between conversions in Auto Power-Down), and provides a true-differential input stage with proprietary input multiplexer/combination buffer that lowers input drive requirements. SAR ADCs are a class of analog-to-digital converters that resolve one bit per clock cycle through a switched-capacitor binary-weighted DAC. They are prized for deterministic latency, no pipeline delay, excellent DC linearity, and low power consumption at modest sample rates, making them a standard choice for industrial process control, instrumentation, data-acquisition front-ends, and multi-channel sensor readouts. Within the converter hierarchy, the ISL26319FVZ-T sits at the precision-low-power-mid-speed tier (12-bit, 125 kSPS), above micro-power 8/10-bit SARs and below 16/18/24-bit precision SARs or sigma-delta converters. Key features include 8 single-ended input channels (or 4 differential), an SPI-compatible serial interface for configuration and data read-back, integrated input buffer with high impedance, an internal 4.096 V or external reference option, and an auto power-down mode that drops quiescent current to microampere levels between conversions. The wide supply range allows direct connection to 3.3 V or 5 V rails commonly found in industrial and battery-backed systems. Typical applications include multi-channel data-acquisition modules, process-control sensor reading (temperature, pressure, strain-gauge bridges with external signal conditioning), battery monitoring in 12-24 V systems, PLC analog input cards, and portable instrumentation where low average power is mandatory. Designers should provide a clean analog ground plane, decouple AVDD with a low-ESR 1 uF/100 nF pair, and observe the 50 ns minimum CS setup time. Auto power-down timing must be honored to achieve the 8 uA typical standby figure. This page consolidates distributor pricing, drop-in alternatives, and design notes not found in the manufacturer datasheet.
ISL26320FBZ-T7A - 12-bit 250kSPS 1-Ch SAR ADC | Renesas
The Renesas ISL26320FBZ-T7A is a 12-bit, 250 kSPS, single-channel, low-power SAR (Successive Approximation Register) analog-to-digital converter with serial interface in a 8-pin SOIC N package. It accepts single-ended and differential input signals, operates from a 2.7 V to 5.25 V analog supply, and provides SPI-/QSPI-/MICROWIRE-compatible serial output for direct connection to microcontrollers and DSPs. The -T7A suffix indicates 7-inch (178 mm) tape-and-reel packaging. A SAR ADC is a type of analog-to-digital converter that uses a binary search algorithm to determine each bit of the conversion result. SAR ADCs are prized for low power consumption, zero-latency single-shot conversions, and excellent DC linearity. They sit beneath the broader ADC hierarchy (SAR -> Nyquist ADC -> data converter -> mixed-signal IC), sharing the family with delta-sigma, pipeline, and flash architectures. SAR converters typically dominate applications in the 8- to 16-bit range and 100 kSPS to 1 MSPS throughput band - exactly the niche the ISL26320 family targets. Key specifications include 12-bit resolution, 250 kSPS maximum sample rate, low single-ended and differential input support, and an integrated input multiplexer plus combination buffer amplifier that lowers the external drive requirement. The proprietary input stage simplifies the signal chain, reducing overall BOM cost and PCB area in multi-channel and battery-powered designs. The device belongs to the ISL26320/21/22/23/24/25/29 pin-compatible family from Renesas, which scales channel count and sample rate across the portfolio. The ISL26320 is the 1-channel, 250 kSPS entry point. It uses a bipolar CMOS process variant with trimmed thin-film resistors, achieving excellent linearity over the rated -40 °C to +85 °C industrial temperature range. Typical applications include industrial process control, portable instrumentation, battery-powered data loggers, sensor signal conditioning, and multi-channel data-acquisition front-ends where low power and small footprint matter. Its single 5 V supply operation suits industrial 24 V bus systems after front-end regulation. When designing in this ADC, decouple AVDD and DVDD separately with 0.1 µF ceramic capacitors close to the pins, and provide a clean low-impedance reference. Place the analog and digital grounds on split planes joined under the ADC. Note that the wider ISL2632x family footprint remains pin-compatible across channel-count variants, simplifying PCB scaling. This page synthesizes distributor pricing, drop-in same-package alternatives, and practical design notes not found in the manufacturer datasheet alone, helping engineers select and source this Renesas SAR ADC efficiently.
ISL26323FBZ - 12-Bit 250kSPS Dual-Channel SAR ADC | Renesas
The Renesas ISL26323FBZ is a 12-bit, 250 kSPS successive-approximation-register (SAR) analog-to-digital converter with two single-ended input channels, housed in an 8-pin SOIC (NB) package. It supports an analog input range of 0 V to VREF (with VREF up to 5 V) and operates from a single 2.7 V to 5.25 V analog supply, drawing only 2.5 mA typical supply current at 250 kSPS. An analog-to-digital converter (ADC) is a data converter that translates real-world continuous voltages into discrete digital codes. SAR ADCs in particular use a binary-search capacitor array and comparator to resolve one bit per clock cycle, delivering deterministic latency with no pipeline delay - which makes them well suited to multiplexed multi-channel data-acquisition systems and control loops where deterministic timing matters. The ISL26323 sits in the precision-data-acquisition product hierarchy: SAR ADC -> ADC -> data converter -> signal chain IC -> semiconductor. Key features include INL of ±1 LSB maximum, DNL of ±1 LSB maximum, an internal 2.5 V reference option (with external reference override up to 5 V), an SPI-/QSPI-/MICROWIRE-compatible serial interface, a hardware SHND pin, and a true-differential analog input structure that rejects common-mode noise. The 8-pin SOIC footprint simplifies PCB layout and is compatible with standard surface-mount assembly lines. The device uses a charge-redistribution SAR core with a proprietary input multiplexer and input buffer, lowering the drive requirement on the upstream sensor or instrumentation amplifier. A throughput of 250 kSPS is sufficient for vibration, motor-control, and precision-sensor signal chains that previously required expensive delta-sigma converters. Typical applications include industrial process control loop digitization, multi-channel temperature sensing via RTD or thermocouple front ends, battery-cell voltage monitoring in 12 V/24 V/48 V battery-management systems, portable instrumentation, and PLC analog input modules. The wide supply range and small footprint also suit it to point-of-load digitization in factory-automation I/O cards. When designing with the ISL26323FBZ, treat the analog ground return as a star-grounded island separate from noisy digital returns; route SCLK, SDO, and CONVST traces over a continuous ground plane to limit digital coupling into the sample-and-hold. The shutdown pin can cut supply current to under 1 microamp for battery-powered sensor nodes. This page synthesizes distributor pricing for the ISL26323FBZ, drop-in same-package alternatives from the ISL263xx family, and practical PCB and reference-layout notes not found in the manufacturer datasheet, giving engineers a single, citation-ready reference for new designs and field replacements.
ISL26323FBZ-T - 12-bit 250kSPS Dual-Channel Low-Power SAR ADC | Renesas
The Renesas ISL26323FBZ-T is a 12-bit, 250 kSPS successive-approximation-register (SAR) analog-to-digital converter with two differential input channels, housed in an 8-pin SOIC (N) package. It supports both single-ended and differential input modes, offers a serial SPI-compatible digital interface, and operates from a 2.7 V to 5.25 V analog supply. The device is part of the ISL26320/21/22/23/24/25/29 low-power SAR ADC family, which features excellent linearity over supply and temperature variations. A SAR ADC is a type of analog-to-digital converter that uses a binary-search successive-approximation algorithm to convert an analog input to a digital code in a fixed number of clock cycles, typically one per bit. SAR ADCs sit within the broader data-converter family (SAR -> ADC -> data converter -> mixed-signal IC -> semiconductor), and are valued for their deterministic latency, low power consumption, and high effective resolution per sample. The ISL26323FBZ-T specifically targets the 12-bit precision segment with sample rates up to 250 kSPS, making it well suited for industrial sensor readout, multi-channel data acquisition, and instrumentation front ends. Key features of the ISL26323FBZ-T include up to 5 kV Human Body Model ESD survivability, guaranteed monotonic operation, and an industrial temperature range of -40 °C to +125 °C. Its single-ended/differential input flexibility allows the same PCB footprint to accept either sensor type without a re-design, while the SPI/serial digital interface reduces microcontroller pin count compared to parallel-output ADCs. Typical applications include industrial process control loops, multi-channel temperature and pressure monitoring, PLC analog input modules, battery-cell voltage monitoring in BMS front ends, and general-purpose data-acquisition systems. The wide analog supply range (2.7 V to 5.25 V) supports both 3.3 V and 5 V microcontroller environments with the same BOM. When designing with this part, ensure the analog and digital grounds are tied together at a single point near the IC, and place the 10 µF bulk + 0.1 µF bypass capacitors as close to the AVDD pin as possible. The SOT-23-6/8-SOIC thermally enhanced package allows continuous operation at full sample rate without thermal throttling, but the input RC antialiasing filter should be sized to keep the -3 dB bandwidth below the Nyquist frequency of 125 kHz for 250 kSPS throughput. This page synthesizes verified distributor pricing, pin-compatible drop-in alternatives, and practical design notes not consolidated in the Renesas datasheet PDF.
ISL26323FBZ-T7A - 12-bit 250kSPS SAR ADC, 2-Ch | Renesas
The Renesas ISL26323FBZ-T7A is a 12-bit, 250 kSPS successive-approximation (SAR) analog-to-digital converter with two single-ended input channels (or one differential channel), offered in an 8-pin SOIC package on a 7-inch tape-and-reel carrier (T7A suffix). It belongs to the ISL26320/21/22/23/24/25/29 ADC family from Renesas (originally Intersil) and is specified over the -40 °C to +125 °C automotive temperature range, drawing only a few milliwatts from a single analog supply. A SAR ADC (Successive Approximation Register Analog-to-Digital Converter) is a conversion topology that uses a binary-search algorithm against an internal precision DAC to digitize an input voltage in N clock cycles for N-bit resolution. SAR ADCs occupy the middle ground between high-speed flash converters and high-precision delta-sigma converters, combining low latency (no digital filter delay), deterministic throughput, and strong dynamic performance for multiplexed multi-channel data-acquisition systems where the input must settle and convert on every sample period. The defining features of the ISL26323FBZ-T7A are its 12-bit resolution, 250 kSPS guaranteed sampling rate, integrated input multiplexer, proprietary input buffer amplifier that lowers the driving amplifier requirements, a flexible serial interface (SPI/QSPI/MICROWIRE-compatible plus DSP-mode framing), and very low power consumption. The high linearity is maintained over supply and temperature, enabling true 12-bit performance without calibration in tightly-budgeted industrial loops. Architecturally, the part pairs an inherent low-noise charge-redistribution DAC with a SAR engine and an on-chip track-and-hold. The internal buffer reduces the burden on the upstream op-amp, so designers can use lower-power amplifiers and still meet the 250 kSPS settle requirement on the multiplexer output, which simplifies the analog front end. Typical applications include factory-automation analog input modules, multi-channel sensor-digitizer boards, portable instrumentation, weigh scales, process-control I/O, and automotive telematics/sensor ECUs. The wide operating range and small footprint also suit battery-powered data loggers and isolated data-acquisition front ends. When designing with this ADC, sequence the analog supply with a low-noise LDO such as the ISL75051SRH or TPS7A4700, place a 10 nF ceramic bypass right at the AVDD pin, and keep the analog and digital grounds joined at a single point under the exposed pad or a guard ring. Source impedance below 500 Ω preserves linearity at the highest conversion rates. This page synthesizes distributor pricing, drop-in same-family and cross-brand alternatives, and practical design notes that go beyond the manufacturer datasheet to help engineers shorten their bring-up time.
ISL26324FVZ - 12-bit 250kSPS 4-ch SAR ADC | Renesas
The Renesas ISL26324FVZ is a 12-bit, 250 kSPS successive-approximation-register (SAR) analog-to-digital converter with 4 single-ended (or 2 differential) input channels, housed in a 16-pin TSSOP package. The device operates from a 2.7 V to 5.25 V analog supply and draws low power across the sample-rate range, making it well suited to multi-channel industrial instrumentation and battery-powered monitoring front-ends. An on-chip proprietary input multiplexer and combination buffer amplifier reduce the external drive requirements on each input source. A SAR ADC operates by performing a binary search through an internal capacitive DAC, comparing the sampled input against successively switched reference levels on each clock cycle. The architecture delivers zero-latency conversions (a single-cycle latency at the digital interface) and excellent linearity over supply and temperature variations. SAR ADCs sit inside the broader data-converter taxonomy between delta-sigma converters (which prioritize resolution at low speeds) and flash converters (which prioritize speed at low resolution), and are typically the preferred choice for multiplexed mid-speed multi-channel acquisition where channel switching on every cycle is acceptable. Key specifications include ±1 LSB INL and DNL over temperature, throughput up to 250 kSPS in normal mode, integrated input buffers, an SPI-compatible serial interface, and a TSSOP-16 footprint with -40 °C to +85 °C (or extended automotive) operating range. The combination buffer amplifier allows direct connection to high-impedance sensors and to signal-conditioning circuits without external op-amps. Power consumption scales with the configured sample rate, enabling software-managed trade-offs between speed and dissipation. Typical applications include multi-channel industrial process instrumentation, factory-automation analog input modules, battery-cell voltage monitoring in battery-management systems, programmable logic controller (PLC) analog front-ends, and isolated data-acquisition front-ends. The wide supply range (2.7 V – 5.25 V) also makes the part suitable for 3.3 V and 5 V digital systems that share a common supply rail with downstream logic. When designing the analog front-end, keep source impedances low and decouple AVDD and DVDD with 10 µF bulk plus 0.1 µF ceramic capacitors placed within 5 mm of the supply pins. The REF input requires a low-noise, low-drift reference; a single REF decoupled with 10 µF and 0.1 µF on the pin delivers rated performance. Use the chip-select pin for multi-device SPI bus sharing, and follow standard SPI mode-0 or mode-3 timing as documented in the datasheet. This page synthesizes distributor pricing, drop-in alternatives from the same TSSOP-16 SAR family, and practical design notes not found in the manufacturer datasheet.
ISL26324FVZ-T - 12-bit 250kSPS 4-ch SAR ADC | Renesas
The Renesas ISL26324FVZ-T is a 12-bit, 250 kSPS successive-approximation-register (SAR) analog-to-digital converter with four single-ended and two differential input channels, housed in a 16-pin TSSOP package. According to the Renesas datasheet, it operates from a single 2.7 V to 5.25 V analog supply, delivers ±1 LSB INL and DNL, and consumes 15 mW typical at full throughput. An ADC (analog-to-digital converter) is a mixed-signal integrated circuit that samples a continuous analog voltage and quantizes it into a discrete binary code. Within the converter taxonomy, SAR ADCs use a binary-search successive-approximation algorithm with an internal sample-and-hold and a precision DAC, providing deterministic latency, low power, and high accuracy at moderate sampling rates (typically up to ~1 MSPS). SAR ADCs are widely used as the precision A/D building block inside data-acquisition systems, motor control loops, instrumentation front-ends, and sensor signal chains where DC accuracy and repeatable sampling latency matter more than raw speed. Key features of the ISL26324FVZ-T include a high-impedance analog input multiplexer with proprietary input buffer that relaxes external driver requirements, an SPI-compatible serial digital interface for easy connection to microcontrollers and FPGAs, an auto power-down mode that reduces operating current to 8 µA typical between conversions, and excellent linearity (THD -82 dBFS) over the full supply and temperature range. The internal architecture combines an input multiplexer, a track-and-hold buffer, the SAR conversion core, and a precision reference input. The serial interface uses simple SCLK, SDOUT and CS lines, supporting read-out rates up to the maximum conversion rate without requiring an external clock. Channel selection and configuration are programmed through the SPI interface. Typical applications include industrial process control, multi-channel sensor monitoring, portable instrumentation, factory automation, and medical patient monitoring. The wide supply range (2.7 V to 5.25 V) makes the part equally at home in 3.3 V microcontroller systems and 5 V industrial backplanes. A key design consideration is the bypass network on AVDD and DVDD: place 10 µF tantalum and 0.1 µF ceramic capacitors within a few millimeters of each supply pin to keep switching transients out of the conversion result. Reference decoupling is also critical, particularly when an external reference is used. This page synthesizes verified distributor pricing, drop-in alternative MPNs from the same ISL2632x family and competitive SAR ADCs, and practical design notes - information gain that is not assembled on the Renesas product page alone.
ISL26325FVZ - 12-Bit 250kSPS 4-Channel SAR ADC | Renesas
The Renesas ISL26325FVZ is a 12-bit, 250 kSPS low-power successive-approximation-register (SAR) analog-to-digital converter with four single-ended (or two differential) input channels, housed in a 16-pin TSSOP package. The part operates from a single 5 V nominal supply, draws only 15 mW at 250 kSPS, and falls to 8 µA typical between conversions when Auto Power-down mode is enabled, making it well-suited to power-constrained multi-channel data-acquisition systems. The serial digital interface is SPI-compatible, simplifying connection to popular FPGAs and microcontrollers across industrial and consumer designs. A SAR ADC is a successive-approximation-register analog-to-digital converter that uses a binary-search algorithm against an internal DAC to resolve each conversion in N bit-clock cycles. SAR ADCs offer the best trade-off among speed, resolution, and latency for precision multiplexed applications. They are a sub-category of data converters, which sit within the broader signal-chain IC family alongside amplifiers, filters, and references. Key features of the ISL26325FVZ include 12-bit resolution, 250 kSPS throughput, a proprietary input multiplexer and combination buffer amplifier that lowers input drive requirements, integrated sequencer support, and excellent linearity over supply and temperature. The Auto Power-down function reduces idle current dramatically between bursts, extending battery life in portable instruments. The internal architecture pairs a capacitive-DAC SAR core with a low-leakage input MUX and on-chip reference buffer, allowing the converter to maintain INL/DNL performance over the full -40 °C to +125 °C automotive temperature range. The SPI/QSPI/MICROWIRE-compatible serial port supports daisy-chaining multiple devices for high-channel-count systems. Typical applications include industrial process control and PLC analog front ends, automotive sensor monitoring, battery-management telemetry, portable instrumentation, and multi-zone temperature or pressure monitoring. Designers often pair the ISL26325 with a precision op-amp driver and an external 2.5 V or 4.096 V reference to maximize absolute accuracy. When designing the input front end, ensure the source impedance stays below the value recommended in the manufacturer datasheet to avoid gain errors. The Auto Power-down mode assumes a stable clock and consistent CS framing - verify timing in your MCU's SPI peripheral before relying on the lowest quiescent current. This page synthesizes distributor pricing, drop-in alternatives, and practical design notes that are not found in the manufacturer datasheet alone, helping engineers shorten the selection cycle and avoid common pitfalls.
ISL26325FVZ-T - 12-bit 250kSPS 4-Ch SAR ADC | Renesas
The Renesas ISL26325FVZ-T is a 12-bit, 250 kSPS, low-power successive-approximation register (SAR) analog-to-digital converter with four single-ended or differential input channels and an SPI-compatible serial interface, housed in a 16-pin TSSOP package. Headline parameters include 12-bit resolution, 250 kSPS sampling rate, four input channels, and a TSSOP-16 outline that fits compact data-acquisition layouts. A SAR ADC is a type of analog-to-digital converter that uses a binary-search algorithm with an internal capacitive DAC and a high-speed comparator to produce one conversion result per acquisition cycle. SAR ADCs sit within the broader hierarchy of ADC architectures (flash, SAR, sigma-delta, and pipeline), and are favored for moderate-resolution, moderate-speed, low-latency conversions where deterministic behavior and excellent DC linearity are required. The ISL26325FVZ-T belongs to the data-acquisition and precision-converter category of mixed-signal ICs. Key features include four software-configurable input channels accepting single-ended or differential signals, an SPI-compatible serial data interface, an auto power-down mode that reduces supply current to 8 µA typical between conversions, and total power consumption of 15 mW at the full 250 kSPS sampling rate. The wide supply range and integrated input multiplexer simplify front-end analog design in multiplexed sensor applications. Technically, the device operates from a single analog supply, integrates a high-accuracy internal reference path, and delivers excellent linearity over the full operating range. The SAR core architecture provides no pipeline latency, so each conversion result is available immediately after the requested sample instant - an important property in closed-loop control and multiplexed data acquisition. Typical applications include industrial process control and instrumentation, multichannel sensor monitoring, battery management system telemetry, factory-automation analog front ends, and portable medical or measurement equipment that needs low standby current between scans. When designing with this part, ensure the analog supply is well-decoupled close to the IC and that the SPI clock speed respects the SAR conversion timing budget; verify that auto-power-down timing matches your scan-cycle schedule to maximize energy savings. This page synthesizes distributor pricing, drop-in TSSOP-16 alternatives, and practical design guidance not aggregated in the manufacturer datasheet.
ISL26325FVZ-T7A - 12-bit 250kSPS 4-ch SAR ADC | Renesas
The Renesas (formerly Intersil) ISL26325FVZ-T7A is a 12-bit, 250 kSPS successive-approximation-register (SAR) analog-to-digital converter with 4 single-ended or differential input channels, housed in a 16-pin TSSOP package. It operates from a 2.7 V to 5.5 V analog supply, supports an external reference up to AVDD, and draws a typical supply current of 1.9 mA at 250 kSPS, with a power-down mode that drops current to a few hundred nanoamps for battery-friendly duty-cycled measurements. An SAR ADC is a Nyquist-rate converter that performs a binary search on the analog input using an internal capacitive DAC and comparator. Unlike sigma-delta ADCs, SAR converters deliver a single conversion per acquisition with no pipeline latency, making them ideal for multiplexed multi-channel data-acquisition systems where deterministic latency and fast channel-to-channel settling matter. SAR parts slot into the hierarchy analog-to-digital converter -> data converter -> signal-chain IC -> mixed-signal semiconductor. Key features of the ISL26325FVZ include ±1 LSB INL (typical), a true 12-bit no-missing-codes guarantee, a serial SPI-/QSPI-/MICROWIRE-compatible interface, and a proprietary input multiplexer with integrated input buffer amplifier that reduces the external driver requirements. The part accepts single-ended inputs in the range 0 V to AVDD and differential inputs in the range -AVDD to +AVDD, supporting bipolar signal swings around a common-mode voltage. Typical applications span industrial process control, multi-loop programmable logic controllers (PLC) analog front ends, portable instrumentation, battery-powered sensor hubs, 4-wire RTD / thermocouple digitizers, and general-purpose data-acquisition cards. The wide supply range, low power, and small TSSOP-16 footprint also make the device attractive in compact embedded designs where board area and quiescent current are at a premium. When designing with the ISL26325FVZ, choose the analog input capacitor and external reference capacitor per the application note recommendations for AC performance, place the AVSS and DGND ground returns on a low-impedance ground plane, and verify the SCLK idle level matches the chosen SPI mode (CPOL/CPHA) of the host microcontroller. Decouple AVDD and DVDD with separate 10 µF + 0.1 µF pairs to keep digital switching transients out of the analog reference. This page synthesizes distributor pricing (as of 2026-10-13), drop-in alternatives, comparison parameters, and design notes not collated in the manufacturer datasheet alone, giving engineers a single reference for sourcing and second-sourcing decisions on the ISL26325 family.
ISL26329FVZ-T - 12-bit 250kSPS SAR ADC 8-Ch | Renesas
The Renesas (formerly Intersil) ISL26329FVZ-T is a 12-bit, 250 kSPS successive-approximation-register (SAR) analog-to-digital converter with 8 single-ended input channels (or 4 differential) and a serial interface, supplied in a 16-pin TSSOP package. The -T suffix denotes tape-and-reel packaging, and the device operates from a single 2.7 V to 5.25 V analog supply while drawing very low quiescent current, targeting battery and industrial measurement systems. A SAR ADC is a successive-approximation analog-to-digital converter that uses a binary-search algorithm and an internal capacitive DAC to convert each analog sample in N clock cycles, where N is the resolution in bits. SAR converters offer deterministic latency, no pipeline delay, and excellent DC linearity, which makes them the dominant architecture for multiplexed multi-channel data-acquisition front ends in the 10-16 bit, 1 kSPS to 1 MSPS range. The ISL26329FVZ-T sits in the middle of that range as a low-power, multi-channel SAR ADC for general-purpose signal acquisition. Key features include 12-bit resolution with no missing codes, 250 kSPS throughput, an integrated input multiplexer with 8 single-ended or 4 differential channels, and an input buffer/amplifier that reduces the external drive requirements. The on-chip sequencer allows automatic channel scanning, and the SPI-/QSPI-/MICROWIRE-compatible serial interface simplifies connection to microcontrollers and DSPs. The single-ended input range is 0 V to VREF (or 0 V to AVDD when using AVDD as reference), and the differential input range is -VREF to +VREF. Typical applications include industrial process instrumentation, multi-channel sensor data loggers, battery-powered portable measurement, factory-automation analog front ends, and general-purpose multi-channel data-acquisition boards. The wide supply range (2.7 V to 5.25 V) and low power consumption also suit handheld medical and consumer measurement devices. When designing with this part, place a 100 nF decoupling capacitor close to each supply pin and follow the datasheet's PCB layout guidelines for the analog and digital grounds. The reference voltage input directly determines absolute accuracy, and the input multiplexer settling time must be respected when scanning channels at full throughput. This page synthesizes distributor pricing, drop-in alternatives, and practical design notes not found in the manufacturer datasheet, helping engineers shorten selection time and avoid common pitfalls when migrating from similar multi-channel SAR ADCs.
ISL26708IHZ-T - 8-Bit 1MSPS SAR ADC SOT-23-8 | Renesas
The Renesas ISL26708IHZ-T is an 8-bit, 1 MSPS successive-approximation-register (SAR) analog-to-digital converter (ADC) housed in an 8-pin SOT-23 package, offered on tape-and-reel. It is the 8-bit member of the ISL26708/ISL26710/ISL26712 SAR ADC family and operates from a single 2.7V to 5.25V analog supply, providing a high-impedance fully-differential input that preserves specified linearity even when input signals swing to the supply rails. The reference voltage accepts inputs from 0V to VDD, enabling ground-referenced single-ended measurements in low-voltage systems. A SAR ADC is a successive-approximation-register analog-to-digital converter that uses a binary-search algorithm and an internal capacitive DAC to convert each analog sample to a digital code in one conversion cycle per bit. Within the broader converter hierarchy, SAR converters sit between flash ADCs (fastest, most power) and sigma-delta ADCs (highest resolution, lowest speed). The SAR topology delivers an excellent speed-vs-power trade-off for industrial instrumentation, motor control, and portable data-acquisition front-ends where mid-bandwidth 8-to-12-bit conversion is required. Key features of the ISL26708IHZ-T include 1 MSPS guaranteed throughput with no latency, low integral and differential non-linearity across the full supply and temperature range, an SPI-compatible serial interface, a true-differential analog input with high common-mode rejection, and an operating temperature range suited to industrial environments. The fully-differential input simplifies direct connection to bridge sensors, current-shunt amplifiers, and audio line inputs without external instrumentation amplifiers. The architecture combines a high-impedance track-and-hold front end with a precision charge-redistribution DAC. Each conversion is initiated by the user via the CNVST pin and the result is clocked out on the SDO pin through a standard SPI frame. Power consumption scales linearly with sampling rate, allowing the device to idle at microamp-level standby currents between bursts, which is valuable for battery-powered or duty-cycled applications. Typical applications include industrial process-control analog front ends, portable instrumentation and battery monitors, optical-module monitoring (SFP/QSFP), temperature and pressure sensor digitizers, motor control feedback, and consumer audio metering. The wide supply range (2.7V to 5.25V) covers both 3.3V and 5V rails, and the differential input tolerates ground-referenced or rail-referenced sensor outputs. When designing with this device, place the 0.1uF decoupling capacitor as close as possible to the AVDD pin and keep the analog and digital ground returns separated until they join at a single point beneath the IC. The reference decoupling capacitor value and ESR directly affect AC performance; a low-ESR ceramic on REF is recommended for full 1 MSPS operation. This page synthesizes distributor pricing, drop-in alternatives from Renesas and select competitors, and practical design notes not found in the manufacturer datasheet alone.
ISL26708IHZ-T7A - 8-Bit 1MSPS SAR ADC | Renesas | SOT-23-8
The Renesas ISL26708IHZ-T7A is an 8-bit, 1 MSPS successive-approximation-register (SAR) analog-to-digital converter housed in an 8-lead SOT-23 package. It operates from a 2.7V to 5.25V analog supply and provides excellent linearity over supply and temperature variations. The fully-differential input architecture presents high input impedance to minimize leakage-induced errors, and the device accepts true bipolar or unipolar input ranges. The part is specified over the -40C to +85C industrial temperature range. A SAR ADC is a type of analog-to-digital converter that uses a binary-search algorithm through an internal capacitive DAC to successively approximate the input voltage against a precision reference. SAR ADCs offer the best combination of throughput, latency, and power consumption for multiplexed data acquisition, motor control, and instrumentation front-ends where a single conversion result must be captured per trigger without the pipeline delay of higher-speed architectures. Key features of the ISL26708IHZ-T7A include 1 MSPS minimum throughput, no missing codes at 8-bit resolution, low power consumption (approximately 8.5 mW at 1 MSPS with 5V supply), a SPI/QSPI/MICROWIRE-compatible serial interface, and a true-differential analog input that supports ±VREF common-mode. An external reference voltage (1V to 5V) sets the input full-scale range, giving designers flexibility to optimize dynamic range. The robust input structure, wide supply tolerance, and small SOT-23-8 footprint make the ISL26708IHZ-T7A well-suited for portable instrumentation, industrial process control loops, sensor signal conditioning, and battery-monitoring front-ends. Its differential input rejects common-mode noise present in long sensor cable runs. When designing with this device, place the 0.1 uF and 10 uF decoupling capacitors as close as possible to the AVDD and DVDD pins to ensure conversion accuracy, and route the analog and digital ground returns to a single-point star ground near the ADC's GND pin to avoid digital switching noise coupling into the analog input. This page synthesizes distributor pricing, drop-in alternatives, and practical design notes not found in the manufacturer datasheet.
ISL26708IRTZ-T7A - 8-Bit 1MSPS SAR ADC, 8-TDFN | Renesas
The Renesas ISL26708IRTZ-T7A is an 8-bit, 1 MSPS successive-approximation-register (SAR) analog-to-digital converter supplied in an 8-lead TDFN-EP (3 mm x 3 mm) package with an exposed thermal pad. It operates from a single 2.7 V to 5.25 V analog supply and integrates a low-noise track-and-hold, precision reference input, and a high-speed serial interface. A SAR ADC is a successive-approximation-register analog-to-digital converter that uses a binary-search algorithm and an internal capacitive DAC to convert an analog input to a digital code in one conversion cycle per bit. SAR ADCs combine high throughput (often hundreds of kSPS to multi-MSPS) with deterministic latency and excellent DC accuracy - placing them in the broader taxonomy: ADC -> data converter -> signal chain IC -> mixed-signal semiconductor. Key features include 1 MSPS throughput, ±1 LSB INL/DNL (typical), a SPI-/QSPI-/MICROWIRE-compatible serial interface, low 8 mW power dissipation at 1 MSPS with 3 V supply, and a 2.5 V reference input accepting external references for system-level gain trim. The wide supply range allows direct interfacing to 3.3 V and 5 V microcontrollers or DSPs without level translators. An exposed thermal pad (EP) reduces junction-to-ambient thermal resistance, which is important for sustained 1 MSPS operation at elevated ambient temperatures. The converter is built on a BiCMOS process that pairs a precision analog front-end with a small-footprint serial host interface, delivering low total harmonic distortion at full Nyquist input while keeping quiescent supply current modest in partial-power-down and full-power-down modes. Typical applications include industrial process control loop readouts, multi-channel data-acquisition front ends, optical-module monitor photodiodes, and precision sensor conditioning where deterministic latency and small PCB area matter. An end-of-conversion (EOC) flag and dedicated CNVST rising-edge conversion control simplify DMA hand-off and oversampling schemes in embedded designs. When designing with the ISL26708, allocate the analog and digital ground planes as a single star-ground tied under the EP, and bypass AVDD and DVDD independently with 10 uF bulk plus 100 nF high-frequency ceramic capacitors within 5 mm of the pins. This page bundles distributor pricing, drop-in alternates, application examples, and design notes curated for engineers evaluating SAR ADCs in industrial, sensor, and instrumentation designs.
ISL2671286IBZ-T - 12-Bit 20kSPS SAR ADC | Renesas
The Renesas ISL2671286IBZ-T is a 12-bit, 20kSPS successive-approximation-register (SAR) analog-to-digital converter supplied in an 8-pin SOIC package and qualified for the -40C to +85C industrial temperature range. It offers a single differential input channel, an SPI-compatible serial interface, and operates from a single +5V analog supply. The device features excellent linearity over supply and temperature variations and is designed as a drop-in compatible alternative to all ADS1286 performance grades. A SAR ADC is a successive-approximation-register analog-to-digital converter that uses a binary-search algorithm against an internal precision DAC to digitize an analog input in N conversion cycles for an N-bit code. SAR ADCs are favored for low-latency, single-shot conversions with no pipeline delay, and they offer excellent static linearity because every conversion uses the same precision comparator and DAC. In the broader data-converter hierarchy, SAR ADCs sit alongside delta-sigma and pipeline ADCs as the three dominant precision ADC architectures; SAR specifically targets multiplexed, multiplexed low-channel-count precision sampling up to a few megasamples per second. Key features include a true-differential analog input, integrated track-and-hold, low power consumption suitable for battery-powered or loop-powered instruments, and an SPI/QSPI/MICROWIRE-compatible serial output interface. The 8-SOIC package is industry-standard, allowing straightforward PCB layout and easy drop-in replacement of legacy ADS1286 designs. The wide operating range and high linearity make the part suitable for industrial environments where supply and temperature variation would otherwise compromise measurement accuracy. Typical applications include industrial process control loop transmitters, weigh-scale and load-cell digitizers, portable instrumentation, programmable logic controller (PLC) analog input modules, and battery monitoring systems. Designers select this ADC when a single-channel, low-latency, high-linearity conversion is required at sample rates up to 20 kSPS without the complexity of a multi-channel converter. When designing with this part, pay attention to the analog input common-mode voltage and provide adequate input RC filtering to limit broadband noise. According to the manufacturer datasheet, the part provides a drop-in compatible alternative to all ADS1286 grades, meaning existing ADS1286 PCB layouts can be reused without modification. This page synthesizes distributor pricing, parametric alternatives, and practical design notes that go beyond the manufacturer datasheet.
ISL26712IHZ-T - 12-bit 1MSPS SAR ADC | Renesas | SOT-23-8
The Renesas ISL26712IHZ-T is a 12-bit, 1MSPS sampling SAR-type analog-to-digital converter housed in an 8-pin SOT-23 surface-mount package. It pairs true-differential input architecture with low power consumption, achieving ±1 LSB INL across the industrial temperature range while operating from a single 2.7V to 5.25V supply. A successive-approximation register (SAR) ADC is a converter architecture that performs a binary search across an internal precision DAC during each conversion cycle. Within the converter hierarchy, SAR ADCs sit between high-speed flash converters and high-resolution sigma-delta ADCs, providing an optimal mix of speed (up to multi-MSPS) and resolution (8-18 bits) for general-purpose data acquisition. The ISL26712 belongs to Renesas's precision-SAR family designed for industrial instrumentation, process control, and battery-powered sensing. Key features include 12-bit resolution with no missing codes, throughput up to 1MSPS, fully differential analog inputs with high input impedance to minimize leakage-induced errors, a wide 2.7V-5.25V analog supply range, and an SPI/QSPI/MICROWIRE-compatible serial interface. The internal reference can be overdriven by an external VREF for absolute-accuracy applications. Robust ESD ratings (HBM 4kV, CDM 1.5kV) and a -40C to +85C industrial operating range support demanding field-deployed instrumentation. The ISL26712 uses a charge-redistribution DAC with input sampling on internal capacitors, achieving excellent linearity across temperature and supply variations. The robust sampling front-end tolerates input signals up to the supply rails without linearity degradation, and the simple CS/SHDN-controlled conversion start simplifies MCU/DSP handshaking without complex sequencer overhead. Typical applications include industrial process control loops, weight scales and load-cell digitizers, portable instrumentation, motor-control current sensing, temperature-measurement systems using thermocouples or RTDs, and data acquisition front-ends. The 1MSPS throughput also supports digital oscilloscope front-ends and feedback-loop digitizers inside switching power converters. When designing with this device, place the 0.1uF VREF bypass capacitor as close as possible to the VREF pin and provide a clean ground return separate from noisy digital returns to preserve AC performance. Series resistance between the input source and the +IN/-IN pins should be kept below 50 ohm to avoid conversion-time-induced gain error. This page synthesizes distributor pricing, drop-in alternatives from the same Renesas/Intersil SAR family, and practical layout notes not consolidated in the manufacturer datasheet.