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PIC32MX130F064DT-V/PT - 32-bit MCU 64KB Flash 40MHz TQFP-44 | Microchip
PIC32MX130F064DT-V/PT

PIC32MX130F064DT-V/PT - 32-bit MCU 64KB Flash 40MHz TQFP-44 | Microchip

The Microchip Technology PIC32MX130F064DT-V/PT is a 32-bit MIPS32 M4K RISC microcontroller with 64KB Flash and 16KB SRAM, operating at up to 40 MHz in a 44-pin TQFP (10x10 mm) package with automotive AEC-Q100 qualification. It integrates USB, two I2S/SPI modules, two UART, two I2C, a Parallel Master Port (PMP) for graphics, Peripheral Pin Select (PPS), mTouchTM capacitive touch support, a 1 ns high-resolution timer, on-chip temperature sensor, and up to 21 general-purpose I/O pins in a 2.3V-3.6V supply range. The -V suffix designates the automotive temperature grade of -40C to +105C. A microcontroller is a complete embedded computing unit that integrates a CPU core, program memory (Flash), data memory (SRAM), and a rich set of peripherals on a single silicon die. Within the broader taxonomy, this PIC32MX1XX/2XX family sits in the 32-bit RISC MCU class, which itself belongs to embedded processors, microcontrollers, and ultimately semiconductors. The PIC32MX130 line specifically targets cost-effective applications requiring USB connectivity, audio/graphical interfaces (via PMP), and advanced analog features at low active current under 0.5 mA/MHz. Key features of the PIC32MX130F064DT-V/PT include MIPS16e mode for up to 40% smaller code size, five 16-bit general-purpose timers, up to 4 hardware DMA channels with automatic data size detection, separate PLLs for the CPU and USB clocks, dual I2S modules for codec interfacing, and configurable Watchdog Timer with on-chip low-power RC oscillator. Peripheral Pin Select (PPS) remaps digital peripherals to a wide choice of physical pins, dramatically easing PCB routing. The PMP enables direct connection to graphical LCDs, and mTouchTM supports capacitive touch buttons and sliders. Architecture-wise, the device combines a Harvard-style 32-bit MIPS32 M4K core with 5-stage pipeline, 32 x 32-bit register file, and dedicated hardware multiply/divide. Up to 4 DMA channels operate autonomously from the CPU, reducing interrupt load and improving throughput for USB, UART, SPI, and ADC transfers. Two separate PLLs let the CPU and USB clock domains run independently at optimal frequencies while sharing one 8 MHz primary oscillator. Typical applications include automotive body and infotainment modules, USB human-interface devices (HIDs), audio playback units with I2S codecs, low-cost graphical control panels, capacitive-touch user interfaces, and industrial sensor hubs. AEC-Q100 qualification makes the -V variant especially suited to under-hood and cabin automotive electronics. When designing with this MCU, ensure VDDCORE decoupling follows Microchip's recommended layout (typically 10 uF plus 0.1 uF close to the core supply). USB applications require the on-chip transceiver's 48 MHz PLL to be tuned to within +/-0.25%, and the D+/D- trace lengths matched to 90 ohms differential impedance. Always budget for boot Flash and configuration bits when sizing program memory against the 64 KB Flash limit. This page synthesizes distributor pricing, automotive-grade alternatives, and practical design notes not consolidated in the manufacturer datasheet, helping engineers select the right PIC32MX130 variant for AEC-Q100 grade versus industrial/medical use cases.

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PIC32MX130F128H-50I/MR - 50MHz 32-bit MCU, 128KB Flash | Microchip
PIC32MX130F128H-50I/MR

PIC32MX130F128H-50I/MR - 50MHz 32-bit MCU, 128KB Flash | Microchip

The Microchip Technology PIC32MX130F128H-50I/MR is a 32-bit MIPS32 M4K microcontroller running up to 50 MHz / 83 DMIPS, equipped with 128 KB Flash and 16 KB SRAM, and housed in a 64-pin QFN (MR) 9x9 mm package with industrial -40C to +85C temperature rating. A PIC32MX microcontroller is a 32-bit flash MCU family from Microchip that combines a MIPS M4K core with rich digital peripherals, suitable for connected embedded products, consumer devices, and industrial control. The PIC32MX130F128H-50I/MR is the lower-pin-count sibling in the family and targets cost-sensitive applications that still need 32-bit performance, DSP acceleration (single-cycle MAC), and ample code space. The M4K core architecture retains the PIC ecosystem's reputation for deterministic interrupt response while adding 32-bit register width and 83 DMIPS throughput at 50 MHz. Key features highlighted in the Microchip datasheet include 128 KB single-cycle Flash, 16 KB SRAM, Peripheral Pin Select (PPS) for flexible signal routing, three I2S/SPI modules, a Parallel Master Port (PMP) with dual buffers for graphics or memory-mapped interfaces, an integrated 10-bit ADC, and CTMU for capacitive touch sensing. USB and CAN are not present on this device, so designers targeting those should look at the PIC32MX2xx/5xx siblings. The device integrates 5 16-bit timers, 5 IC/OC/PWM channels, two I2C, two UART, and supports up to 49 digital I/O via PPS. The 64-QFN 9x9 mm package exposes most of the available peripherals and provides a thermal pad for improved heat dissipation in continuous-operation industrial environments. Typical applications include low-cost HMI panels with small TFTs driven by PMP, consumer audio accessories using I2S, multi-protocol sensor hubs with UART and I2C bridges, capacitive touch keypads via CTMU, and small logic-replacement or protocol-bridging controllers. The wide industrial temperature range and 50 MHz headroom also suit factory sensor nodes and serial-bridge appliances. When designing with this part, plan the PPS mapping early because PPS groups constrain which pins can be assigned to which peripherals. Always provide a 1uF + 0.1uF decoupling pair near each VDD pin and confirm that any high-frequency I/O traces are length-matched for SPI or I2S synchronous operation. This page consolidates distributor pricing, same-family drop-in alternatives, and practical design notes not duplicated from the manufacturer datasheet, including cross-references to PIC32MX1XX/2XX/5XX 64/100-pin family siblings.

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PIC32MX130F128H-50I/PT - 50MHz 32-bit MCU 128KB Flash | Microchip
PIC32MX130F128H-50I/PT

PIC32MX130F128H-50I/PT - 50MHz 32-bit MCU 128KB Flash | Microchip

The Microchip Technology PIC32MX130F128H-50I/PT is a 32-bit MIPS MCU running up to 50 MHz/83 DMIPS, integrating 128 KB Flash and 16 KB SRAM in a 64-pin TQFP (10x10 mm) package. The device operates from 2.5 V to 3.6 V and exposes the full PIC32MX1xx/2xx peripheral set including two I2S, four SPI, two I2C, five UART, a 10-bit 1 Msps ADC, a Parallel Master Port (PMP), and Peripheral Pin Select (PPS) for flexible signal mapping. A 32-bit microcontroller (MCU) is a single-chip computer that integrates a high-performance processor core, program and data memory, and configurable peripherals. The PIC32MX130 family specifically occupies the low-cost, low-power entry tier of Microchip's PIC32 lineup - bridging 8-bit PIC16/PIC18 designs and the higher-end PIC32MX3/4/5/6/7 families. Within the broader taxonomy it sits under microcontroller -> embedded MCU -> 32-bit MCU -> MIPS M4K core device. The 50 MHz core delivers 83 DMIPS, comparable to legacy ARM Cortex-M3 parts in the same cost band, while keeping the 8-bit PIC instruction ecosystem familiar to legacy Microchip developers. Key features include 128 KB single-cycle Flash with live update support, 16 KB SRAM, a 10-bit 1 Msps 13-channel ADC, a CTMU for capacitive touch and time measurement, two comparators, a 5-bit DAC, and PMP with dual read/write buffers for graphics or external memory interfaces. PPS remaps digital peripherals onto most I/O pins, easing PCB layout. The CTMU and mTouch capability enable capacitive touch sensing without external components. Typical applications include industrial control (HMI panels, sensor hubs), consumer audio (Bluetooth speakers with I2S codecs), USB-to-UART bridges, graphical low-cost displays using PMP, capacitive touch key pads, and low-power IoT edge nodes. The 128 KB Flash / 16 KB RAM headroom supports IPv4 stacks and lightweight USB device firmware. Design consideration: the device requires a 2.5 V or 3.3 V rail - many analog rails cannot be fed directly. Place a 0.1 µF + 10 µF bulk pair within 5 mm of VDD/AVDD pins and use a ferrite bead between VDD and AVDD to keep switching noise out of ADC measurements. Configure unused I/O as outputs low to minimize I_dd leakage. This page combines distributor pricing, drop-in PIC32 alternatives, and practical design notes that the manufacturer datasheet alone does not provide - supporting faster part selection and PCB reuse decisions.

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PIC32MX130F128H-I/MR - 32-bit 50MHz MCU, 128KB Flash | Microchip
PIC32MX130F128H-I/MR

PIC32MX130F128H-I/MR - 32-bit 50MHz MCU, 128KB Flash | Microchip

The Microchip Technology PIC32MX130F128H-I/MR is a 32-bit MIPS32 M4K microcontroller running up to 50 MHz / 83 DMIPS, integrating 128 KB of Flash and 16 KB of SRAM in a 64-pin QFN (MR, 9x9 mm) package. It supports an industrial operating range of -40°C to +85°C, draws power from a 2.3 V to 3.6 V supply, and provides 53 general-purpose I/O pins through Peripheral Pin Select (PPS) routing. A microcontroller (MCU) is a single-chip computer that integrates a CPU core, volatile and non-volatile memory, and a configurable mix of peripherals. PIC32MX devices sit in the mid-performance tier of Microchip's PIC32 portfolio, bridging 8-bit PIC16/PIC18 designs and the higher-end PIC32MZ parts, and they are widely used in consumer, industrial, and IoT applications that need more horsepower than 8-bit parts can deliver but do not require DSP or floating-point capability. Key features of the PIC32MX130F128H-I/MR include two I2S and four SPI modules for audio codec and high-speed serial connectivity, USB 2.0 full-speed device/host/OTG support, a 10-bit ADC with up to 1 Msps conversion rate, a Parallel Master Port (PMP) with dual read/write buffers for graphics interfaces, an mTouch capacitive-touch peripheral, and a CTMU (Charge Time Measurement Unit) for time-of-flight and capacitive measurements. The 5-stage pipelined M4K core delivers 1.56 DMIPS/MHz and executes most instructions in a single cycle, while dedicated DMA reduces CPU load on data-movement tasks. Typical applications for this part include USB peripherals, audio streaming devices using I2S codecs, low-cost graphics interfaces driven by PMP, capacitive-touch user panels via mTouch, and industrial control nodes that need deterministic serial communication. The 53 I/O pins and PPS flexibility make it a strong fit for designs that consolidate UART, SPI, I2C, and timer resources on a single device without external glue logic. When designing with the PIC32MX130F128H-I/MR, place the ICSP programming pins (PGECx/PGEDx) on accessible test points to keep field firmware updates practical. Ensure all VDD/VSS pins are connected even if some appear unused, since missing power pins can prevent proper programming on production boards. This page synthesizes Microchip datasheet excerpts, drop-in same-package alternatives from the PIC32MX family, and practical design notes not found in the basic distributor listings.

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PIC32MX130F128H-V/MR - 32-bit MCU, 128KB Flash, 64-QFN | Microchip
PIC32MX130F128H-V/MR

PIC32MX130F128H-V/MR - 32-bit MCU, 128KB Flash, 64-QFN | Microchip

The Microchip Technology PIC32MX130F128H-V/MR is a 32-bit MIPS32 M4K microcontroller running up to 50 MHz / 83 DMIPS, with 128 KB Flash and 16 KB SRAM, housed in a 64-pin QFN (MR, 9x9 mm) package with exposed thermal pad. The "V" suffix denotes the -40C to +105C industrial temperature grade suitable for thermally stressed environments, and the "MR" suffix identifies the 64-QFN surface-mount package. The part is AEC-Q100 qualified, enabling automotive deployment alongside industrial and consumer designs. A PIC32MX microcontroller is a 32-bit MIPS-based MCU from Microchip's PIC32 family, sitting between 16-bit PIC24/dsPIC and 32-bit ARM Cortex-M devices. It combines a Harvard-architecture M4K core with rich peripherals such as USB, CAN, I2S, PMP, and Peripheral Pin Select (PPS) routing, making it a versatile choice for connectivity, graphical, and real-time control applications. Key features of the PIC32MX130F128H-V/MR include up to 50 MHz / 83 DMIPS core performance, two I2S and four SPI modules for codec and serial communications, Peripheral Pin Select (PPS) for flexible peripheral-to-pin mapping, Parallel Master Port (PMP) with dual buffers for graphics interfaces, a 10-bit 1 Msps ADC with up to 13 channels, and an mTouch capacitive-touch peripheral for touch-sensing user input. The 128 KB Flash supports large application firmware with library overhead. Architecturally, the device integrates a 5-stage pipeline M4K core with single-cycle multiplication, a prefetch cache to accelerate Flash execution, an 8-channel DMA controller for low-CPU-overhead data movement, and a 10-bit 1 Msps analog-to-digital converter. The 2.5V/3.3V dual-voltage core with on-chip regulator simplifies single-supply 3.3V designs while maintaining low active power consumption typical of the PIC32MX1xx family. Typical applications include automotive body and infotainment subsystems, industrial HMI panels with PMP-driven LCDs, USB peripherals such as HID and CDC class devices, IoT sensor nodes, audio playback products using I2S DACs, and capacitive-touch user interfaces. The wide operating temperature range and AEC-Q100 qualification support under-hood and dashboard deployments. When designing with this MCU, allocate the 128 KB Flash budget between bootloader, application, and library code early; PPS reassignment must be configured in code at startup to avoid pin conflicts; the QFN EP requires thermal via stitching under the exposed pad for reliable heat dissipation in industrial/automotive environments. This page synthesizes distributor pricing, drop-in PIC32MX alternatives, PPS-aware design notes, and AEC-Q100 qualification context not found aggregated on any single manufacturer page.

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PIC32MX130F128HT-50I/PT - 32-bit MCU 50MHz 128KB Flash | Microchip
PIC32MX130F128HT-50I/PT

PIC32MX130F128HT-50I/PT - 32-bit MCU 50MHz 128KB Flash | Microchip

The Microchip Technology PIC32MX130F128HT-50I/PT is a 32-bit MIPS M4K microcontroller operating at 50 MHz with 128 KB Flash and 16 KB SRAM, housed in a 64-pin TQFP (10x10 mm) industrial-grade package. It delivers up to 83 DMIPS performance and integrates Peripheral Pin Select (PPS), Parallel Master Port (PMP) with dual read/write buffers for graphics interfaces, two I2S modules, four SPI modules, and a 10-bit ADC supporting up to 1 Msps conversion. A microcontroller (MCU) is a single-chip computer containing a processor core, program memory, data memory, and programmable I/O peripherals. The PIC32MX family belongs to the broader hierarchy of embedded processor -> microcontroller -> 32-bit MCU -> MIPS-based MCU, designed by Microchip for cost-sensitive embedded applications that need higher performance than 8-bit or 16-bit cores without stepping up to ARM Cortex-M cost. The MIPS M4K core used here combines deterministic interrupt response with a 5-stage pipeline and hardware multiply/divide. Key features include 128 KB Flash program memory, 16 KB SRAM, four SPI, two I2C, two UART, two I2S, PMP, 10-bit 1 Msps ADC with up to 28 analog inputs via PPS, CTMU for capacitive touch, and a wide operating voltage range. Industrial temperature range of -40C to +85C suits factory automation, building controls, and outdoor equipment. The PIC32MX130 uses a Harvard architecture with separate Flash and SRAM buses, allowing simultaneous instruction fetch and data access. PPS remaps digital peripherals to almost any I/O pin, dramatically simplifying PCB layout when multiple SPI, UART, or PWM channels must be routed. PMP with dual buffers enables direct connection to graphical LCDs and parallel memory devices without external glue logic. Typical applications include low-cost graphical HMI panels, sensor hubs with I2S audio capture, industrial controllers, home appliances, USB device bridges, and embedded data loggers. The combination of I2S, PMP, CTMU, and PPS allows a single chip to replace several external components. Design consideration: route the ICSP/ICD pins (PGECx/PGEDx) to a 6-pin header for in-circuit debugging and Flash programming - omitting this costs zero board area but blocks field firmware updates. Decouple VDDCORE/VSS pair with 100 nF plus 10 uF ceramic close to the pins. This page synthesizes distributor pricing, verified drop-in alternatives, and practical design notes beyond what the Microchip datasheet alone provides for engineering evaluation.

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PIC32MX130F128HT-I/MR - 32-bit MCU, 128KB Flash, 64-QFN | Microchip
PIC32MX130F128HT-I/MR

PIC32MX130F128HT-I/MR - 32-bit MCU, 128KB Flash, 64-QFN | Microchip

The Microchip Technology PIC32MX130F128HT-I/MR is a 32-bit MIPS32 M4K microcontroller offering 128KB Flash and 16KB RAM in a 64-pin 9x9 mm QFN (MR) package with exposed thermal pad. Operating at up to 50 MHz/83 DMIPS, this PIC32MX1xx family member integrates two I2S and four SPI modules for audio and serial communication, a Parallel Master Port with dual buffers, and full Peripheral Pin Select (PPS) remappable I/O. The 'T' suffix denotes tape-and-reel packaging, 'I' denotes the industrial -40C to +85C temperature grade, and 'MR' is the 64-QFN package code. A microcontroller (MCU) is a single-chip computer containing a processor core, program memory (Flash), working memory (RAM), and programmable peripherals. PIC32MX devices belong to the 32-bit MCU hierarchy (microcontroller -> 32-bit MCU -> MIPS-based MCU -> PIC32 family) and target general-purpose embedded applications requiring USB, CAN, audio, or graphics-capable peripherals without the cost of higher-tier Cortex-M parts. Key features of this part include: 128KB on-chip Flash, 16KB SRAM, 10-bit ADC with up to 16 channels, four UART modules, two I2C modules, two I2S/SSI modules for digital audio, USB 2.0 full-speed OTG, a Charge Time Measurement Unit (CTMU) for touch sensing, and an on-chip 8 MHz and 32 kHz oscillator. The 64-QFN 9x9 mm package provides a compact footprint with an exposed pad enabling efficient thermal dissipation for industrial-grade designs. The PIC32MX130F128H family uses the MIPS32 M4K Harvard architecture with 5-stage pipeline, single-cycle multiply, and hardware divide. Code execution is fetched from Flash through a 16KB prefetch cache to deliver zero-wait-state performance up to 50 MHz. PPS remaps most digital peripherals to any of the remappable I/O pins, dramatically simplifying board layout for mixed-signal designs. Typical applications include consumer audio docks (using I2S to drive external DACs and the CTMU for capacitive touch keypads), USB human-interface devices such as keyboards and HID-class peripherals, low-cost graphics HMI terminals driving small TFT displays via PMP, sensor-hub controllers for industrial monitoring, and firmware-replaceable motor-control front ends. The wide peripheral mix makes it well suited as a feature-rich drop-in upgrade for 8-bit PIC users migrating to 32-bit. Designers should plan for two decoupling capacitors per VDD/AVDD pin pair (0.1 uF ceramic + 4.7 uF bulk), keep the 64-QFN exposed pad soldered to a continuous ground copper pour for thermal relief, and confirm the PPS mapping before assigning pin functions in code to avoid runtime conflicts. Programming is supported by MPLAB X IDE with the XC32 compiler and the MPLAB Harmony framework. This page consolidates distributor pricing, same-family drop-in alternatives, application context, and design notes that complement - rather than duplicate - the manufacturer datasheet.

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PIC32MX130F128HT-I/PT - 50MHz 32-bit MCU 128KB Flash TQFP-64 | Microchip
PIC32MX130F128HT-I/PT

PIC32MX130F128HT-I/PT - 50MHz 32-bit MCU 128KB Flash TQFP-64 | Microchip

The Microchip PIC32MX130F128HT-I/PT is a 32-bit MIPS32 M4K microcontroller running at up to 50 MHz / 83 DMIPS, packaged in a 64-pin TQFP (10x10 mm) with 128 KB Flash and 16 KB SRAM. The PIC32MX130 family integrates two I2S modules, four SPI/I2S interfaces, and a Parallel Master Port (PMP) with dual read/write buffers for graphics interfaces, plus Peripheral Pin Select (PPS) for flexible signal routing. A 32-bit microcontroller (MCU) is an integrated circuit containing a CPU core, program memory, data memory, and a rich set of on-chip peripherals targeted at embedded systems. PIC32MX devices sit in the hierarchy: MCU -> 32-bit MCU -> MIPS M4K core -> PIC32MX1xx/2xx family -> Microchip MCU lineup. They typically follow Harvard architecture, RISC instruction sets, and provide deterministic interrupt latency, making them suitable for real-time control and consumer/HMI applications. Key features of this device include 53 digital I/O pins with PPS remapping, a 10-bit 1 Msps ADC with up to 13 channels, five 16-bit timers/counters, two comparators, two I2C and two UART modules, and an on-chip 8 MHz internal oscillator with PLL. The device operates from 2.3V to 3.6V across an industrial -40C to +85C temperature range. The TQFP-64 footprint is the largest package option in this family, exposing the full peripheral set including the PMP graphics interface and maximum I/O count. The PIC32MX130F128HT-I/PT uses Microchip's MPLAB X IDE, MPLAB Harmony, and XC32 compiler toolchain, with extensive middleware support via the Harmony framework. Pin-compatible variants in TQFP-64 include the PIC32MX130F064H and PIC32MX230F128H family members, which differ in Flash size or peripheral mix. The die footprint is shared with the PIC32MX1xx/2xx series, simplifying PCB layout reuse across product tiers. Typical applications include industrial control panels with TFT LCDs (PMP + graphics library), consumer audio products (I2S codec interface), USB device peripherals, sensor hubs, and home appliance HMI. Designers favor this part for low-cost 32-bit performance combined with mature MPLAB ecosystem support and long-life Microchip supply commitments. When designing, ensure decoupling follows Microchip's recommended pattern: a 0.1 uF ceramic as close as possible to each VDD/AVDD pair plus a bulk 10 uF tantalum or ceramic. The PMP bus is 8-bit multiplexed and benefits from 100 ohm series resistors on long traces. Leave the programming/debug pins (PGECx/PGEDx) accessible for production programming. This page synthesizes distributor pricing, TQFP-64 drop-in alternatives, and practical MPLAB design notes not found in the manufacturer datasheet.

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PIC32MX130F128L-50I/PF - 32-bit 50MHz MCU 128KB Flash | Microchip
PIC32MX130F128L-50I/PF

PIC32MX130F128L-50I/PF - 32-bit 50MHz MCU 128KB Flash | Microchip

The Microchip PIC32MX130F128L-50I/PF is a 32-bit MIPS32 M4K microcontroller with 50 MHz/83 DMIPS performance, 128 KB Flash and 16 KB SRAM, housed in a 100-pin TQFP (14x14 mm) industrial-temperature package. It is a member of the PIC32MX1xx/2xx/5xx 64/100-pin family and integrates two I2S, four SPI, two I2C, USB 2.0 full-speed device/host/OTG, five 16-bit timers, a 10-bit 1 Msps ADC with up to 48 channels, and a Parallel Master Port (PMP) for graphics interfaces. A microcontroller (MCU) is a single-chip computer that integrates a CPU core, program memory (Flash), data memory (SRAM), and a rich set of on-chip peripherals such as timers, communication controllers, and analog blocks. Within the broader taxonomy, a 32-bit MCU sits above 8-bit and 16-bit MCUs in compute class, below microprocessors (MPUs) that require external memory, and belongs to the Embedded Processors & Controllers hierarchy under Integrated Circuits. The PIC32MX130 series specifically targets cost-sensitive 32-bit applications that previously used 16-bit controllers, offering MIPS-class performance at a comparable price point while consuming as little as 0.5 mA/MHz in Run mode. Key features include 128 KB Flash with live update support, 16 KB SRAM, Peripheral Pin Select (PPS) for flexible I/O mapping, mTouch capacitive touch support, JTAG and 2-wire trace debugging, and an industrial -40C to +85C operating range. Five 16-bit timer/counters, a real-time clock, and a 16-bit input capture/compare/PWM module support motor control and waveform synthesis tasks. The integrated USB 2.0 full-speed OTG controller enables device, host, or on-the-go operation without an external PHY. The PIC32MX130F128L is built on a 5-stage pipelined MIPS32 M4K Harvard architecture with single-cycle multiply and hardware divide for deterministic DSP-class math. The 10-bit successive-approximation ADC delivers up to 1 Msps across up to 48 analog inputs (depending on package), making it suitable for multi-sensor acquisition. PPS remapping of digital peripherals to most I/O pins shortens PCB routing and enables late-stage pinout changes. The PMP with dual read/write buffers drives external parallel graphics controllers, QVGA panels, and FIFO-style memory ports. Typical applications include consumer and industrial USB peripherals, capacitive touch human-machine interfaces, HVAC and appliance controllers, multi-channel sensor hubs, low-cost audio recorders and toys using the I2S module, data loggers, and small GUI nodes driven by PMP-attached TFT displays. The 50 MHz core plus 128 KB Flash comfortably runs USB stacks, simple TCP/IP, and lightweight graphics libraries. When designing with this device, plan for a stable 8 MHz external crystal for USB accuracy and a robust decoupling network of 100 nF per VDD/VSS pair plus a 10 uF bulk capacitor on AVDD/AVSS. Always program the configuration words first and lock the JTAG ports only after firmware is fully validated.

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PIC32MX130F128L-I/PT - 32-bit MCU, 128KB Flash, 100-TQFP | Microchip
PIC32MX130F128L-I/PT

PIC32MX130F128L-I/PT - 32-bit MCU, 128KB Flash, 100-TQFP | Microchip

The Microchip Technology PIC32MX130F128L-I/PT is a 32-bit MIPS32 M4K microcontroller with 128KB Flash and 16KB SRAM, operating up to 50 MHz/83 DMIPS, housed in a 100-pin TQFP (12x12 mm) package. It features 85 programmable I/O lines, 2 I2S and 4 SPI modules, a Parallel Master Port (PMP) with dual read/write buffers, and Peripheral Pin Select (PPS) for flexible signal routing. A 32-bit microcontroller (MCU) is a microprocessor core that processes data in 32-bit chunks, providing higher throughput than 8-bit or 16-bit alternatives while integrating Flash memory, RAM, and peripherals into a single IC. PIC32MX devices sit in the 32-bit MCU taxonomy between low-cost Cortex-M0 parts and higher-end Cortex-M4 / PIC32MZ devices, making them suitable for mid-complexity embedded applications including graphics, audio, and connectivity. Key features include a 10-bit ADC with up to 16 channels, 5 16-bit timers, an analog comparator, a charge time measurement unit (CTMU) for capacitive touch and accurate time measurement, and a JTAG interface for boundary scan and debug. The 128KB Flash supports self-programmable In-Circuit Serial Programming (ICSP) and 10K erase/write cycles, while the 16KB SRAM provides space for protocol stacks and audio buffering. Architecturally, the device pairs an M4K core with a 5-stage pipeline, single-cycle hardware multiply/divide, and tightly-coupled peripherals including USB 2.0 full-speed OTG, two I2C channels, and PMP for direct LCD and graphics memory access. The PPS module allows most digital I/O to be remapped to multiple physical pins, greatly simplifying PCB layout for dense designs. Typical applications include graphical LCD displays with touch, USB audio interfaces, industrial control panels, consumer appliances with HMI, and connectivity bridges using SPI or I2S codecs. The integrated PMP and CTMU make it especially attractive for low-cost graphics plus touch solutions without external logic. Design consideration: PPS remapping must be locked before peripheral use, and unused digital I/O should be configured as outputs to minimize power. The CTMU requires precise calibration of current source and ADC for accurate capacitance measurements in touch applications. This page synthesizes distributor pricing, drop-in alternatives, and practical design notes not found in the manufacturer datasheet alone.

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PIC32MX130F128LT-50I/PT - 50MHz 128KB Flash MCU TQFP-100 | Microchip
PIC32MX130F128LT-50I/PT

PIC32MX130F128LT-50I/PT - 50MHz 128KB Flash MCU TQFP-100 | Microchip

The Microchip Technology PIC32MX130F128LT-50I/PT is a 32-bit MIPS MCU from the PIC32MX1/2/5 family featuring 128 KB Flash, 16 KB SRAM, and a 50 MHz/83 DMIPS MIPS32 M4K core, housed in a 100-pin TQFP (12x12 mm) package. The "L" pin-count designator and "T" suffix denote the 100-pin TQFP variant and tape-and-reel packaging, while the "-50I" speed grade specifies 50 MHz operation over the industrial -40C to +85C temperature range. An 8-bit microcontroller (MCU) is a single-chip computer integrating a CPU, memory, and peripherals; a 32-bit MCU like the PIC32MX130 extends this with a 32-bit data path, higher clock rates, and richer peripherals, positioning it between 16-bit MCUs and application processors. The PIC32MX130 belongs to the broader hierarchy of embedded microcontrollers -> 32-bit MCUs -> MIPS-based MCUs -> PIC32 family -> PIC32MX1xx sub-family. This positioning makes it well-suited for applications requiring more performance than 8/16-bit parts but without the cost or complexity of Cortex-M4/M7 designs. Key features include two I2S interfaces, four SPI modules for codec and serial communications, Peripheral Pin Select (PPS) for flexible pin mapping, a Parallel Master Port (PMP) with dual read/write buffers for graphics interfaces, USB 2.0 Full-Speed device/host/OTG, a 10-bit 1 Msps ADC with up to 28 channels, and five 16-bit timers. The device operates from 2.3 V to 3.6 V with typical active current around 1.1 mA/MHz and offers multiple low-power sleep modes down to approximately 20 uA in idle. Architecturally, the PIC32MX130 uses a Harvard-style MIPS32 M4K core with single-cycle multiply, hardware divide, and a 5-stage pipeline. The 128 KB Flash is single-bank and supports live update with a separate 3 KB boot Flash, and the 16 KB SRAM supports battery-backed retention in deep sleep via the on-chip RTCC. The PMP peripheral enables direct connection to graphical LCDs and external parallel memory, while PPS allows most digital peripherals to be remapped to a wide range of I/O pins. Typical applications include HMI panels and small graphical displays, USB audio devices, IoT edge sensor nodes, industrial control and human-machine interface (HMI) touch panels, consumer white goods with USB connectivity, and low-cost CAN-connected peripherals. The 100-pin TQFP provides enough I/O (85 pins) to drive a TFT panel plus capacitive touch sensing simultaneously. When designing with this device, ensure the supply rail stays within 2.3 V to 3.6 V and that decoupling follows the datasheet's 100 nF + bulk capacitor recommendation near each VDD/VSS pair. For USB applications, the internal USB transceiver requires a precise 48 MHz clock source and a 1.5 kohm pull-up on D+; software must configure the USB PLL and bias generator before VBUS is asserted. This page synthesizes distributor pricing, drop-in alternatives within the PIC32MX1/2/5 family, and practical design notes not found in the standalone manufacturer datasheet.

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PIC32MX130F128LT-I/PF - 32-bit MCU 128KB Flash 40MHz TQFP-100 | Microchip
PIC32MX130F128LT-I/PF

PIC32MX130F128LT-I/PF - 32-bit MCU 128KB Flash 40MHz TQFP-100 | Microchip

The Microchip Technology PIC32MX130F128LT-I/PF is a 32-bit MIPS32 M4K microcontroller integrating 128 KB Flash and 16 KB SRAM in a 100-pin TQFP (14x14 mm) package, tape-and-reel packaged for high-volume SMT assembly. It operates at up to 50 MHz delivering 83 DMIPS, supports 2.5V and 3.3V rails, and runs across the industrial -40C to +85C range. A PIC32MX microcontroller is a 32-bit MIPS-based MCU family from Microchip Technology that bridges the gap between 8/16-bit PIC microcontrollers and higher-performance Cortex-M devices. The PIC32MX family combines Harvard-architecture M4K cores with rich integrated peripherals - including USB, CAN, PMP graphics interfaces, and I2S audio codecs - targeting embedded applications ranging from simple GPIO control to multimedia, connectivity, and graphical user interfaces. Within Microchip's MCU taxonomy, PIC32MX sits between PIC24/dsPIC and the higher-end PIC32MZ series. Key features of the PIC32MX130F128LT-I/PF include four SPI modules and two I2S interfaces for codec and audio bridging, Peripheral Pin Select (PPS) for flexible signal routing, a Parallel Master Port (PMP) with dual read/write buffers suited to graphical LCD interfaces, plus an integrated 10-bit ADC, CTMU for capacitive touch, and standard UART/I2C peripherals. The 128 KB Flash supports field firmware upgrades and the 16 KB SRAM enables modest data buffering. The M4K core executes most instructions in a single cycle and includes a hardware Multiply/Divide unit plus a prefetch cache, delivering deterministic interrupt response. The wide 2.5V-3.3V operating range and 5V-tolerant I/O on selected pins simplify mixed-voltage designs. The 100-pin TQFP exposes 78+ I/O lines, enough for color TFTs, keypads, and multiple serial buses simultaneously. Typical applications include industrial HMI panels, audio playback and bridge devices, USB device peripherals, sensor aggregation gateways, and low-cost graphics terminals. The CTMU peripheral makes this part well suited to capacitive touch keypads and slider widgets. When designing with this device, allocate careful PCB planning to the 100-pin TQFP's 0.5 mm pitch - this is hand-solderable but requires reflow or hot-air rework. Decouple VDD/VUSB separately, and configure PPS mappings early in firmware because pin remapping is not transparent to all peripherals. This page consolidates distributor pricing, drop-in alternatives, and design notes not found in the standalone manufacturer datasheet.

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PIC32MX130F128LT-V/PF - 32-bit MCU, 128KB Flash, 100-TQFP | Microchip
PIC32MX130F128LT-V/PF

PIC32MX130F128LT-V/PF - 32-bit MCU, 128KB Flash, 100-TQFP | Microchip

The Microchip Technology PIC32MX130F128LT-V/PF is a 32-bit MIPS M4K microcontroller delivering 83 DMIPS at 50 MHz core frequency, housed in a 100-pin TQFP (14x14 mm) package with 128 KB Flash and 16 KB RAM. It integrates two I2S, four SPI, USB, I2C, UART, 10-bit ADC, and a Parallel Master Port (PMP), plus a Charge Time Measurement Unit (CTMU) for touch and capacitive sensing. AEC-Q100 qualified grade and an extended -40C to +105C junction temperature range make it a fit for industrial and automotive embedded systems. What is a PIC32MX microcontroller? PIC32MX is Microchip's family of 32-bit MIPS-based microcontrollers positioned between PIC24/dsPIC and Cortex-M class parts in the embedded hierarchy. They run the MIPS32 M4K core with single-cycle multiply and hardware divide, giving them deterministic performance suited to control loops and audio processing. Within the PIC32MX1xx/2xx/3xx/4xx/5xx/6xx/7xx series, the PIC32MX130 sits at the entry level with 128 KB Flash and 16 KB RAM and is targeted at cost-sensitive HMI, audio playback, and USB device applications. The PIC32MX130F128LT-V/PF is built on 40 MHz internal bus architecture with peripheral pin select (PPS), which lets designers remap digital peripherals onto any GPIO, simplifying PCB layout. It supports 5V-tolerant I/O on most pins, a 10-bit 1 Msps ADC with up to 28 channels, and a 16-bit Parallel Master Port for graphics or external memory. The integrated USB 2.0 full-speed device, two I2S modules, and CTMU support audio playback with capacitive touch buttons in a single chip. Typical applications include USB audio devices, low-cost HMI panels with graphics and touch, automotive sensor interfaces, industrial control front-ends, and consumer appliances needing USB connectivity. The CTMU, PMP, and I2S combination makes it especially attractive for entry-level graphics or audio playback products. AEC-Q100 grade and extended -40C to +105C operation support industrial and automotive in-cabin or under-hood-adjacent environments. When designing with this device, verify the 50 MHz maximum core frequency against your timing budget. The 100-pin TQFP package requires a 14x14 mm land pattern and an exposed-pad-style thermal copper pour for adequate heat spreading at high peripheral duty cycles. Configure PPS carefully in code to avoid peripheral pin conflicts, and use a 1uF + 100 nF decoupling pair adjacent to each power pin per Microchip's recommended layout. This page synthesizes distributor pricing, drop-in same-package alternatives, and engineering design notes that complement the manufacturer datasheet. Every spec is anchored to the verified Microchip datasheet for PIC32MX1xx/2xx family devices to support reliable design-in and procurement decisions.

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PIC32MX130F256B-50I/ML - 32-bit 50MHz MCU, 256KB Flash | Microchip
PIC32MX130F256B-50I/ML

PIC32MX130F256B-50I/ML - 32-bit 50MHz MCU, 256KB Flash | Microchip

The Microchip Technology PIC32MX130F256B-50I/ML is a 32-bit MIPS32 M4K PIC microcontroller operating at up to 50 MHz delivering 83 DMIPS, integrating 256 KB of Flash and 16 KB of SRAM, and housed in a 28-pin QFN (6x6 mm) package with exposed thermal pad. The 50 MHz MIPS32 M4K core delivers 83 DMIPS while drawing a typical 0.5 mA/MHz active current, allowing USB-powered and battery-powered designs to retain thermal headroom in compact enclosures. A microcontroller (MCU) is a single-chip computer that integrates a CPU core, program memory (Flash), working memory (RAM), and a rich set of peripherals such as timers, ADCs, communication interfaces, and I/O pins. Within the semiconductor taxonomy, the PIC32MX130F256B-50I/ML sits at: microcontroller -> 32-bit MCU -> MIPS M4K architecture MCU -> PIC32MX family -> PIC32MX1xx sub-family. This positioning places it above 8-bit PIC16/PIC18 MCUs in performance and below the higher-pin-count PIC32MX3xx/4xx/5xx/6xx/7xx families in peripheral count. Key features include two I2S/SPI modules for codec and serial communication, Peripheral Pin Select (PPS) for flexible signal routing, a Parallel Master Port (PMP) for graphics and external memory interfaces, mTouch capacitive touch support, 1 ns high-resolution time measurement, an on-chip temperature sensor, and a 10-bit ADC. The 28-QFN package includes an exposed pad that lowers thermal resistance to roughly 30 C/W when properly soldered, supporting sustained 50 MHz operation across the -40C to +85C industrial range. The PIC32MX130F256B-50I/ML uses Microchip's MIPS32 M4K Harvard bus architecture with separate Flash and SRAM buses for instruction and data, enabling single-cycle Flash accesses at 50 MHz. The 2.5V/3.3V operation (2.3V-3.6V tolerant) makes the part directly compatible with 3.3V logic systems commonly used in audio, industrial sensing, and consumer HMI applications. Typical applications include capacitive touch key panels, low-cost graphical HMI with PMP-driven LCDs, audio playback using I2S codecs, USB device-class human-interface devices (HID), industrial sensor hubs with 10-bit ADC, and portable instrumentation that leverages the 1 ns timer resolution. Designers targeting lower-power designs can run the core at scaled frequencies via the on-chip PLL and oscillator switching. When designing with this MCU, allocate sufficient decoupling capacitance (100 nF plus 4.7 uF bulk) close to the VDDCORE pins and ensure the exposed pad is soldered to a continuous ground plane for thermal dissipation. The 50 MHz maximum frequency requires the crystal or external clock to remain within +-50 ppm tolerance for UART and USB timing accuracy. This page synthesizes distributor pricing, drop-in alternatives, and design notes that extend beyond the manufacturer datasheet to help engineers shorten design-in cycles and validate second-source options.

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PIC32MX130F256B-50I/SP - 50MHz 32-bit MCU 256KB Flash 28-SPDIP | Microchip
PIC32MX130F256B-50I/SP

PIC32MX130F256B-50I/SP - 50MHz 32-bit MCU 256KB Flash 28-SPDIP | Microchip

The Microchip PIC32MX130F256B-50I/SP is a 32-bit MIPS M4K microcontroller running up to 50 MHz delivering 83 DMIPS, integrating 256 KB of flash and 16 KB of SRAM in a 28-pin SPDIP package. The -50 speed grade guarantees 50 MHz operation across the industrial -40C to +85C temperature range, with 0.5 mA/MHz typical core current consumption. The part integrates two I2S/SPI modules, a 10-bit 1 Msps ADC, Peripheral Pin Select (PPS), a Parallel Master Port (PMP) for graphics, and on-chip temperature measurement. A 32-bit microcontroller (MCU) is a programmable logic device built around a 32-bit data path, instruction pipeline and address space, in contrast to 8-bit or 16-bit MCUs. The PIC32MX1XX/2XX family belongs to the broader hierarchy MCU -> microcontroller -> embedded controller -> semiconductor IC, and is intended for connected, low-power, mixed-signal embedded designs. The M4K core is a MIPS32 instruction-set RISC processor with hardware multiply/divide and a 5-stage pipeline; this combination gives PIC32MX parts their distinctive price/performance position versus Cortex-M0/M3 alternatives. Key features that differentiate the PIC32MX130F256B include 256 KB flash for application code, 16 KB SRAM for data, a Charge Time Measurement Unit (CTMU) for mTouch capacitive touch and 1 ns high-resolution time measurement, and a USB 2.0 full-speed OTG peripheral on the larger-pin variants. The 28-SPDIP package exposes 21 general-purpose I/O pins through the PPS mapper, so almost any digital peripheral function can be routed to almost any pin - a flexibility advantage versus fixed-pin MCUs. The integrated 10-bit 1 Msps ADC with up to 13 analog channels supports mixed-signal sensing without an external converter. Architecturally, the part uses a single-cycle 32-bit ALU with hardware MAC for DSP-style operations, 32 KB instruction cache to accelerate flash execution, and a bus matrix that lets DMA and the CPU access peripherals in parallel. Compared with 8-bit PIC16/PIC18 parts running at the same clock, the M4K core delivers roughly 10x more DMIPS per MHz, so designers can either drop clock frequency to save power or run complex TCP/IP and USB stacks that simply do not fit on an 8-bit MCU. Typical applications include USB human-interface devices, mTouch capacitive touch panels, low-cost graphics with PMP, audio codec front-ends via I2S, and general-purpose connected sensor nodes. Industrial automation HMI panels and consumer appliances also benefit from the 5V-tolerant I/O on many pins of the SPDIP variant. When designing with this part, remember that the SPDIP package is intended for through-hole prototyping, hand-repair-friendly designs, and harsh-environment sockets where mechanical retention matters. Decouple VDD with a 100 nF ceramic plus a 4.7 uF bulk cap placed within 5 mm of the pins, and configure the Configuration Words in code so the device does not latch up on first power-up. The PPS mapper must be unlocked before peripheral remapping takes effect. This page synthesizes distributor pricing, drop-in alternatives, and practical design notes for the PIC32MX130F256B-50I/SP that are not assembled in the manufacturer datasheet alone.

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PIC32MX130F256B-50I/SS - 32-bit MCU, 50MHz, 256KB Flash | Microchip
PIC32MX130F256B-50I/SS

PIC32MX130F256B-50I/SS - 32-bit MCU, 50MHz, 256KB Flash | Microchip

The Microchip PIC32MX130F256B-50I/SS is a 32-bit MIPS32 M4K RISC microcontroller running up to 50 MHz (83 DMIPS) with 256 KB of Flash program memory and 16 KB of SRAM, housed in a 28-pin SSOP package for industrial-grade (-40C to +85C) operation. It integrates a 10-bit 1 Msps ADC with up to 13 input channels, two I2S/SPI modules, two I2C, five 16-bit timers/counters, a Parallel Master Port (PMP), and Peripheral Pin Select (PPS) for flexible remapping of digital peripherals to any GPIO. According to the manufacturer product page, the device consumes a typical 0.5 mA/MHz active current, supports mTouch capacitive touch sensing, and includes a high-resolution 1 ns timer/capture module. What is a 32-bit microcontroller? A microcontroller (MCU) is a single-chip computer containing a CPU core, program memory (Flash), data memory (SRAM), and integrated peripherals such as ADC, timers, and communication interfaces. 32-bit MCUs like the PIC32MX1XX/2XX family provide higher computational throughput than 8/16-bit MCUs, positioning them in the hierarchy: microcontroller -> embedded MCU -> 32-bit MCU -> RISC MCU -> MIPS-based MCU -> semiconductor. The PIC32MX130F256B sits in the entry-level branch of the PIC32 family, designed for cost-sensitive applications needing USB-less, lower-pin-count designs. Key features include 256 KB self-programmable Flash, 16 KB SRAM, USB 2.0 Full-Speed On-The-Go (OTG) peripheral, four-channel DMA, and a Charge Time Measurement Unit (CTMU) for capacitive touch and precise time measurement. The 28 SSOP industrial-grade variant operates from 2.3V to 3.6V and supports in-circuit serial programming (ICSP) via PGECx/PGEDx pairs. Typical applications include consumer electronics, industrial control, embedded control with graphical user interfaces via PMP, low-cost audio with I2S, and capacitive touch human-machine interfaces. The combination of USB OTG, PMP, and PPS makes the device a flexible platform for human-interface and connectivity nodes. Design consideration: Multiple VDD/VSS pairs must all be connected for reliable operation. Decoupling capacitors (typically 0.1 uF per VDD pin) close to the IC are mandatory. The PGECx/PGEDx pair must be used consistently for ICSP programming. This page synthesizes distributor pricing, drop-in alternatives, and practical design notes not found in the manufacturer datasheet alone, providing engineers with consolidated decision-making context for embedded MCU selection.

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PIC32MX130F256B-I/ML - 40MHz 32-bit MCU, 256KB Flash, 28-QFN | Microchip
PIC32MX130F256B-I/ML

PIC32MX130F256B-I/ML - 40MHz 32-bit MCU, 256KB Flash, 28-QFN | Microchip

The Microchip PIC32MX130F256B-I/ML is a 32-bit MIPS M4K microcontroller with 256KB Flash and 16KB SRAM running at 40MHz, packaged in a 28-pin QFN (6x6 mm) with an exposed thermal pad. It operates from 2.3V to 3.6V and supports industrial temperature range -40C to +85C. The device integrates a 10-bit ADC up to 1 Msps, multiple timers, I2C/SPI/UART peripherals, USB 2.0 full-speed OTG, and up to 21 general-purpose I/O pins. A 32-bit microcontroller (MCU) is a single-chip computer core, memory, and peripherals that executes instructions on 32-bit data paths in a single cycle. The PIC32MX family belongs to the wider PIC32 product line, which is itself a branch of Microchip's 8/16/32-bit PIC microcontroller portfolio. Within the broader taxonomy, PIC32MX1XX/2XX sits between the entry-level PIC32MM (lower pin counts, lower power) and higher-performance PIC32MK/MZ (DSP, FPU, larger memory). The M4K core is a Harvard-architecture MIPS32 core with single-cycle multiply and hardware divide. Key features include 256KB Flash (256K x 8), 16KB SRAM, 40MHz/50MHz MIPS performance (50 MIPS), USB 2.0 full-speed OTG with on-chip transceiver, 10-bit 1 Msps ADC with up to 13 channels, and 5 16-bit timers/counters. The device also offers PMP/PSP for graphics and parallel interfaces, I2S for digital audio, JTAG and 2-wire programming/debug interfaces, and a CTMU for capacitive touch. The architecture integrates a 5-stage pipeline, MPU for memory protection, and zero-wait-state Flash access at 40MHz. The device can be programmed in C with MPLAB X IDE and the XC32 compiler. Power management includes Idle, Sleep, and Deep Sleep modes, plus an integrated LDO that allows single 3.3V rail operation even at higher core voltages. Typical applications include USB peripherals and human-interface devices, industrial control panels with TFT displays, low-cost audio accessories using I2S, sensor hubs, and consumer electronics requiring modest Flash and USB connectivity. The compact 6x6 mm QFN package makes it suited for space-constrained designs. When designing, observe decoupling guidelines: place 0.1 uF ceramic capacitors near each VDD pin, keep trace lengths under 5mm, and use the exposed pad as the primary ground return. For USB applications, ensure the 3.3V USB transceiver supply is stable during enumeration to comply with USB-IF specifications. This page synthesizes current distributor pricing, drop-in pin-compatible alternatives, and application-specific design notes not found in the manufacturer datasheet alone, giving engineers a complete sourcing and design-decision reference.

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PIC32MX130F256B-I/SS - 32-bit 40MHz MCU, 256KB Flash | Microchip
PIC32MX130F256B-I/SS

PIC32MX130F256B-I/SS - 32-bit 40MHz MCU, 256KB Flash | Microchip

The Microchip Technology PIC32MX130F256B-I/SS is a 32-bit MIPS32 M4K microcontroller running up to 50 MHz (40 MHz in this I-temp grade) with 256 KB of Flash and 16 KB of SRAM, packaged in a 28-pin SSOP (5.30 mm body). It belongs to the PIC32MX1XX/2XX family and combines a high-performance 32-bit RISC core with rich on-chip peripherals including a 10-bit ADC, two I2S/SPI modules, two UART, two SPI, two I2C, a Parallel Master Port (PMP), USB, and Peripheral Pin Select (PPS) functionality for flexible signal routing. A microcontroller (MCU) is a single-chip computer that integrates a CPU core, non-volatile program memory (Flash), volatile working memory (SRAM), and a range of analog and digital peripherals. Within the broader semiconductor taxonomy, MCUs sit under microcontrollers, which are a sub-category of embedded processors, which in turn fall under the integrated circuit family. PIC32MX devices specifically use the MIPS32 M4K architecture and are positioned as Microchip's mainstream 32-bit MCU line, bridging 8-bit PIC16/PIC18 designs and higher-performance ARM-based families. Key features of the PIC32MX130F256B-I/SS include 256 KB Flash, 16 KB SRAM, 40 MHz CPU speed (up to 50 MHz in the 50I grade), 0.5 mA/MHz typical active current, on-chip 1% RC oscillator, separate PLLs for CPU and USB clocks, 4-channel hardware DMA with automatic data size detection, configurable watchdog timer with on-chip low-power RC oscillator, and multiple power management modes including deep sleep. The PPS block allows remapping of most digital peripherals to a wide range of physical pins, simplifying PCB routing in space-constrained designs. The device supports industrial temperature operation (-40 °C to +85 °C), 3.3 V typical core supply, and integrates multiple analog blocks such as a 10-bit 1 Msps ADC with up to 13 input channels, comparators, and a charge time measurement unit (CTMU) for capacitive touch applications. Hardware multiply/divide and a single-cycle 32-bit ALU deliver up to 83 DMIPS at 50 MHz, making the device well-suited for real-time control loops. Typical applications include USB audio class devices, low-cost capacitive touch user panels, sensor hubs, low-power industrial controllers, graphical user interfaces using the Parallel Master Port, home appliance controllers, and consumer electronics that previously required a 16-bit MCU but benefit from 32-bit performance at similar BOM cost. The integrated USB 2.0 full-speed controller and ample SRAM also suit small TCP/IP stacks with appropriate firmware libraries. When designing with this device, prefer an external 8 MHz or 10 MHz crystal when USB is required to meet the ±0.25% clock accuracy spec, since the internal 8 MHz oscillator alone is not USB-accurate. Reserve a footprint for a 12 pF crystal load capacitor pair and follow the SSOP-28 thermal pad layout even though the device has no exposed thermal pad. This page consolidates distributor pricing, drop-in package-compatible alternatives, application notes, and practical design considerations not found in the manufacturer datasheet alone, helping engineers evaluate sourcing risk and second-source options for new designs.

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PIC32MX130F256B-V/ML - 32-bit MCU, 256KB Flash, USB, 28-QFN | Microchip
PIC32MX130F256B-V/ML

PIC32MX130F256B-V/ML - 32-bit MCU, 256KB Flash, USB, 28-QFN | Microchip

The Microchip Technology PIC32MX130F256B-V/ML is a 32-bit MIPS32 M4K PIC microcontroller running at 40 MHz, integrating 256 KB of Flash and 16 KB of SRAM in a 28-pin QFN (6x6 mm) automotive-qualified package. The -V suffix indicates an automotive grade qualified to AEC-Q100, supporting extended temperature operation and mission-critical reliability. The device combines USB 2.0 full-speed, two I2S/SPI modules, I2C, UART, a Parallel Master Port (PMP), a 10-bit ADC, Charge Time Measurement Unit (CTMU) for capacitive touch, and Peripheral Pin Select (PPS) for flexible I/O mapping. A PIC32MX microcontroller is a 32-bit RISC MCU built on the MIPS microAptiv/M4K core, sitting in the product hierarchy as: PIC32MX -> 32-bit MCU -> microcontroller -> embedded processor -> semiconductor. Compared with 8-bit PIC16/PIC18 parts, PIC32MX devices deliver 83 DMIPS at 40 MHz with instruction execution in a single clock cycle, while consuming roughly 0.5 mA/MHz. This performance level bridges the gap between classic 16-bit PIC24/dsPIC parts and higher-tier Cortex-M devices, making PIC32MX well suited for cost-sensitive applications that still require USB, graphics, or audio interfaces. Key differentiating features include 256 KB self-programmable Flash, 16 KB SRAM, a 10-bit 1 Msps ADC with up to 13 channels, on-chip temperature sensor, and mTouch capacitive touch support via the CTMU. PPS allows remapping of digital peripherals to any I/O after PCB layout, while PMP enables direct connection to graphics displays, SRAM, or FIFOs without external glue logic. USB 2.0 full-speed with on-chip transceiver eliminates external PHY cost. Typical applications include USB peripherals (HID, CDC, mass-storage), capacitive touch human-machine interfaces, audio playback via I2S to DACs, and small graphical displays. Industrial uses span sensor hubs and motor control entry points; consumer uses span fitness wearables, toys, and home appliances. The automotive-grade -V variant fits body controllers, lighting modules, and HVAC human-machine interfaces. When designing with this part, place a 10 µF bulk and 0.1 µF ceramic bypass close to VDD/AVDD pairs, route USB DP/DM as a 90-ohm differential pair, and use the PPS registers to remap peripherals only after the I/O matrix is finalized. Avoid sharing analog and digital ground returns - use a star-ground or split-plane layout to keep ADC noise below 1 LSB at full sampling rate. This page synthesizes verified distributor pricing, same-brand and cross-brand drop-in alternatives, and practical PCB/application design notes that complement, but do not replace, the Microchip family datasheet.

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PIC32MX130F256B-V/SS - 32-bit MCU 256KB Flash 40MHz 28-SSOP
PIC32MX130F256B-V/SS

PIC32MX130F256B-V/SS - 32-bit MCU 256KB Flash 40MHz 28-SSOP

The Microchip Technology PIC32MX130F256B-V/SS is a 32-bit MIPS32 M4K PIC microcontroller IC running at 40 MHz, with 256 KB Flash and 16 KB SRAM in a 28-pin SSOP package. The -V suffix indicates the automotive AEC-Q100 qualified version, qualified for 2.5V/3.3V operation across the -40C to +105C extended automotive temperature range. A microcontroller (MCU) is a single-chip computer that integrates a CPU core, Flash program memory, SRAM, and a rich set of peripherals on one die. PIC32MX devices specifically use a MIPS32 M4K Harvard-architecture core delivering up to 83 DMIPS at 50 MHz, placing this part in the hierarchy: MCU -> 32-bit MCU -> MIPS core MCU -> PIC32MX family -> embedded controller. The 256 KB Flash supports complex application code, while 16 KB SRAM accommodates data buffers and protocol stacks. Key features include 256 KB Flash program memory (256K x 8), 16 KB SRAM, a 10-bit ADC with up to 13 input channels, USB 2.0 full-speed device/host/OTG support, two I2S/SPI modules for audio codecs, Peripheral Pin Select (PPS) for flexible signal routing, a Parallel Master Port (PMP) for graphics interfaces, a Charge Time Measurement Unit (CTMU) for capacitive touch, and an RTCC. UART, I2C, and JTAG (4-wire MIPS Enhanced) interfaces are also integrated. The PIC32MX130F256B-V/SS uses the Microchip MPLAB X IDE ecosystem with MPLAB Harmony framework, XC32 compiler, and programming via MPLAB Snap, PICkit, or ICD debuggers. In-circuit and in-application programming is supported. The architecture separates peripheral functions from fixed pin assignments via PPS, dramatically simplifying board layout when multiple serial interfaces conflict on default pin locations. Typical applications include automotive body and comfort modules, USB peripherals, consumer audio devices with I2S codec interfaces, low-cost graphic displays driven through PMP, capacitive touch user interfaces using CTMU, industrial sensor nodes with UART/I2C peripherals, and IoT edge devices requiring USB connectivity. The AEC-Q100 -V grade makes this part especially suited for cabin electronics, HVAC controls, and instrument clusters where automotive qualification is required. When designing with this MCU, allocate proper decoupling (100 nF + 10 uF) near each VDD pin pair, observe the 3.3V core voltage constraint, and use the PPS feature to remap peripherals away from conflicting default pins. The automotive -V grade requires careful BOM control - confirm all adjacent components share equivalent automotive qualifications if the end product targets vehicle integration.

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PIC32MX130F256BT-I/ML - 40MHz 32-bit MCU 256KB Flash | Microchip
PIC32MX130F256BT-I/ML

PIC32MX130F256BT-I/ML - 40MHz 32-bit MCU 256KB Flash | Microchip

The Microchip PIC32MX130F256BT-I/ML is a 32-bit MIPS32 M4K microcontroller running at 40 MHz with 256 KB Flash and 16 KB SRAM in a 28-pin QFN (6x6 mm) package. It belongs to the PIC32MX1XX/2XX 28/36/44-pin family that integrates USB, I2S, PMP, and a 10-bit ADC into a low-power RISC core with Peripheral Pin Select (PPS). What is a PIC32MX microcontroller: PIC32MX is Microchip's MIPS32 M4K-based line of 32-bit microcontrollers that bridge 8/16-bit PIC legacy to higher MIPS throughput while preserving the MPLAB X toolchain and Harmony ecosystem. Within the taxonomy, PIC32MX sits below 32-bit microcontrollers -> microcontrollers -> microcontrollers and ICs -> semiconductors, and shares the 32-bit MCU category with ARM Cortex-M3/M4 devices. Key features of the PIC32MX130F256BT-I/ML include 40 MHz / 50 MHz maximum operating frequency (40 MHz in this industrial -I/ML variant), 256 KB Flash program memory organized as 256K x 8, 16 KB SRAM, a 10-bit ADC, full-speed USB 2.0 device/host/OTG, two I2S/SPI modules for codec interfaces, a Parallel Master Port (PMP) for graphics, and a 1 ns high-resolution timer. Peripheral Pin Select (PPS) remaps most digital functions to any I/O, simplifying PCB routing. The device integrates an on-chip temperature sensor, supports mTouch capacitive touch buttons/sliders, and delivers 83 DMIPS at 50 MHz with 0.5 mA/MHz typical active current. USB OTG, two UARTs, two SPI/I2S, two I2C, PMP, and a 16-bit timer/capture make it a versatile general-purpose platform. Typical applications include USB HID peripherals, audio codec peripherals, embedded graphics with PMP, capacitive touch interfaces, low-cost 32-bit control for industrial sensing, and consumer products migrating from 8/16-bit PIC to 32-bit. When designing with this part, keep the maximum supply at 3.6 V, place the decoupling regulator core (PPS remap oscillator bypass capacitor) close to VDD/VSS, and respect the 50 MHz maximum frequency rating. This page synthesizes distributor pricing, drop-in same-package alternatives, and practical design notes not consolidated in the manufacturer's datasheet.

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PIC32MX130F256BT-I/SS - 256KB Flash 32-bit MCU | Microchip
PIC32MX130F256BT-I/SS

PIC32MX130F256BT-I/SS - 256KB Flash 32-bit MCU | Microchip

The Microchip Technology PIC32MX130F256BT-I/SS is a 32-bit MIPS32 M4K RISC microcontroller integrating 256 KB of Flash program memory and 16 KB of SRAM in a 28-pin SSOP package, operating at up to 40 MHz. The PIC32MX1xx/2xx 28/36/44-pin family targets cost-sensitive embedded designs that need USB connectivity, advanced analog, and audio/graphics peripherals in a compact footprint. A microcontroller (MCU) is a single-chip computer that integrates a CPU core, non-volatile program memory (Flash), volatile data memory (SRAM), and a rich set of peripherals such as timers, ADCs, communication controllers, and GPIO into one IC. Within the broader semiconductor taxonomy, MCUs sit under microcontrollers -> embedded processors -> digital ICs -> semiconductors. The PIC32MX1xx family is positioned as the entry point into Microchip's 32-bit PIC32 portfolio, balancing MIPS performance with PIC ecosystem familiarity. Key features of this device include a 40 MHz maximum CPU clock with 80 DMIPS performance, 10-bit 1 Msps ADC with up to 13 channels, USB 2.0 full-speed device/host/OTG, two I2C, two SPI (one with I2S), two UART (with LIN and IrDA), 5 16-bit timers, and a Charge Time Measurement Unit (CTMU) for capacitive touch and precise time measurement. The 28-SSOP package measures only 0.209 inch wide, enabling space-constrained designs while still exposing 21 GPIO. Architecturally, the PIC32MX130 uses a Harvard-style bus with separate Flash and RAM paths, a hardware multiply/divide unit, and a 5-stage pipeline that delivers deterministic interrupt latency. The CTMU peripheral and Peripheral Pin Select (PPS) provide flexible signal routing that simplifies PCB layout. The integrated USB 2.0 full-speed transceiver eliminates external PHY cost in HID, CDC, and basic device-class designs. Typical applications include USB HID peripherals such as keyboards, mice, and custom input devices, embedded audio playback with I2S DACs, sensor hubs with CTMU-based capacitive touch, low-cost industrial control nodes requiring LIN connectivity, and consumer products needing USB-CDC virtual COM ports. The 2.3V to 3.6V supply range and low-power sleep modes also support battery-powered IoT edge nodes. Designers should plan for an external 8 MHz crystal to drive the USB PLL, ensure PPS assignments do not conflict on shared peripheral pins, and budget Flash endurance at 20 k cycles minimum when designing bootloader or OTA firmware update flows. This page synthesizes distributor pricing, drop-in alternatives, and practical design notes not found in the manufacturer datasheet alone.

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PIC32MX130F256D-50I/PT - 50MHz 32-bit MCU, 256KB Flash | Microchip
PIC32MX130F256D-50I/PT

PIC32MX130F256D-50I/PT - 50MHz 32-bit MCU, 256KB Flash | Microchip

The Microchip PIC32MX130F256D-50I/PT is a 32-bit MIPS M4K microcontroller running at up to 50 MHz / 83 DMIPS, integrating 256 KB Flash and 16 KB SRAM in a 44-pin TQFP (10x10 mm) industrial-temperature package. It belongs to the PIC32MX1xx general-purpose MCU family with Peripheral Pin Select (PPS) and operates from 2.5 V to 3.6 V. A 32-bit microcontroller (MCU) is a single-chip computer that integrates a 32-bit CPU core, program memory (Flash), data memory (SRAM), and a configurable set of peripherals. The PIC32MX130F256D sits in the PIC32MX1xx sub-family, which itself is part of Microchip's broader PIC32 ecosystem. Architecturally, it falls under: 32-bit MCU -> RISC microcontroller -> embedded processor -> semiconductor. The M4K core executes the MIPS32 instruction set with 5-stage pipeline, giving 1.56 DMIPS/MHz - competitive with Cortex-M3 in its class. Key features include two I2S/SPI modules for codec and audio connectivity, a Parallel Master Port (PMP) for graphics and external memory interfaces, mTouch capacitive touch support with 1 ns high-resolution time measurement, an on-chip temperature sensor, and a 10-bit ADC with up to 1 Msps conversion rate. Peripheral Pin Select (PPS) allows most digital peripherals to be remapped to a wide choice of pins, simplifying PCB routing. Typical applications include consumer audio accessories, low-cost graphics HMIs using PMP-driven LCDs, capacitive touch user interfaces (buttons, sliders, proximity), USB-device bridge firmware, and general-purpose industrial control nodes. The combination of 16 KB SRAM and 256 KB Flash gives headroom for protocol stacks such as USB device, TCP/IP via a MAC add-on, or audio processing. When designing with this MCU, note the 2.5 V-3.6 V supply range: a 3.3 V LDO is the typical choice. The 50 MHz maximum is only reached when the internal PLL is configured; the default FRC oscillator starts at 8 MHz. PPS reassignment must be committed before peripheral enable to avoid glitches.

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PIC32MX130F256D-50I/TL - 50MHz 32-bit MCU, 256KB Flash | Microchip
PIC32MX130F256D-50I/TL

PIC32MX130F256D-50I/TL - 50MHz 32-bit MCU, 256KB Flash | Microchip

The Microchip Technology PIC32MX130F256D-50I/TL is a 32-bit RISC microcontroller built on the MIPS32 M4K core, operating at up to 50 MHz (83 DMIPS), with 256 KB of Flash program memory and 16 KB of SRAM, housed in a 44-pin VTLA (6x6 mm) package with an exposed thermal pad. A 32-bit microcontroller (MCU) is a single-chip computer that integrates a 32-bit processor core, volatile and non-volatile memory, and programmable peripherals. Microcontrollers sit at the lowest tier of embedded computing, below microprocessors and application processors, and are classified within the broader category of integrated circuits and semiconductors. The PIC32MX1XX/2XX family uses a Harvard architecture with separate Flash and SRAM buses, enabling deterministic instruction fetch and improving effective throughput versus single-bus Von Neumann designs at the same clock rate. Key features include 256 KB Flash (256K x 8), 16 KB SRAM, 50 MHz / 83 DMIPS core, USB 2.0 full-speed On-The-Go (OTG) device/host, two I2S/SPI modules for codec and serial communications, Peripheral Pin Select (PPS) for flexible signal routing, Parallel Master Port (PMP) for graphics interfaces, mTouch capacitive-touch support, Charge Time Measurement Unit (CTMU), 1 ns high-resolution time measurement, on-chip temperature measurement, and 10-bit ADC. The Industrial (-I) temperature range is -40 C to +85 C. The architecture combines a 5-stage pipelined MIPS32 M4K core with single-cycle multiply and hardware divide, giving 1.66 DMIPS/MHz efficiency. The 0.5 mA/MHz typical run current keeps active power around 25 mA at 50 MHz, while multiple low-power sleep modes with RTCC retention drop quiescent consumption into the microamp range - useful for battery-powered sensor nodes and industrial meters. Typical applications include USB peripherals (HID, CDC, mass-storage), audio playback and recording with the on-chip I2S interface, low-cost graphics via PMP to TFT panels, capacitive-touch user interfaces, industrial sensor hubs, and small-footprint IoT edge nodes. The combination of USB-OTG, I2S, and PPS makes the device a strong fit when system BOM and board area must remain small. When designing with this device, ensure the VTLA-44 exposed pad is soldered to a continuous ground plane with sufficient thermal vias. Decouple AVDD/AVSS analog rails with a 10 uF plus 0.1 uF pair placed within 5 mm of the pins to preserve ADC accuracy. This page synthesizes distributor pricing, drop-in same-package alternatives, and practical design notes not found in the manufacturer datasheet alone.

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