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GW16159 - 802.11ah Wi-Fi HaLow M.2 Radio Card | Gateworks
The Gateworks GW16159 is an 802.11ah Wi-Fi HaLow M.2 radio card delivering up to 32 Mbps data rate, operating in the 900 MHz license-exempt band (926.5 MHz center), and integrating the Silex SX-SDMAH module powered by the Morse Micro MM6108 system-on-chip in a compact M.2 form factor. Wi-Fi HaLow (IEEE 802.11ah) is a sub-1 GHz wireless networking standard that extends Wi-Fi technology into the sub-GHz spectrum. Compared with conventional 2.4 GHz and 5 GHz Wi-Fi, sub-GHz radio waves penetrate buildings, walls, and foliage far more effectively, enabling kilometer-scale links at low power. Wi-Fi HaLow sits within the broader hierarchy of wireless communication standards alongside Wi-Fi 6, LoRa, and Bluetooth, targeting long-range, low-power IoT connectivity. Key features of the GW16159 include support for the 802.11ah standard, up to 32 Mbps throughput, SDIO host interface, and operation in the 900 MHz license-exempt band. The M.2 card format allows straightforward integration into Gateworks VeniceFLEX rugged single-board computers and other hosts with M.2 sockets, requiring no RF design work by the end user. Technically, the card is built around the Morse Micro MM6108 SoC, one of the first purpose-built 802.11ah silicon solutions. Because the sub-GHz spectrum offers better propagation characteristics than 2.4 GHz/5 GHz radios, the GW16159 achieves substantially longer range and lower power consumption per bit, which is critical for battery-operated and solar-powered deployments. The 900 MHz band is license-exempt in many regions, simplifying regulatory approval compared with licensed cellular options. Typical applications include Industrial IoT (IIoT) infrastructure, smart transportation systems, factory automation, energy and utility monitoring, and asset tracking, where long-range backhaul between Gateworks embedded gateways and field sensors is required. A key design consideration is antenna selection: proper sub-GHz antenna placement directly determines achievable link budget, so plan mounting and cable loss early in the design. This page synthesizes distributor availability, datasheet extracts, and practical integration notes for the GW16159 in one place - information that would otherwise require consulting Gateworks, Silex, and Morse Micro documentation separately.
GW16167 - 802.11ah Wi-Fi HaLow M.2 Radio, +26 dBm | Gateworks
The Gateworks GW16167 is an 802.11ah Wi-Fi HaLow M.2 2230 E-Key radio module built on the Morse Micro MM8108 system-on-chip, operating in the 850-950 MHz sub-GHz band with up to +26 dBm transmit power and data rates up to 43 Mbps over a USB 2.0 host interface. Wi-Fi HaLow (IEEE 802.11ah) is a sub-1 GHz wireless networking standard defined by the IEEE as a low-power, long-range extension of the familiar Wi-Fi family. Unlike conventional 2.4 GHz and 5 GHz Wi-Fi, 802.11ah trades raw throughput for range and penetration, making it a wireless protocol within the broader hierarchy of IoT connectivity technologies: radio module, sub-GHz wireless transceiver, low-power WAN (LPWAN) alternative, and industrial IoT networking layer. Key features of the GW16167 include its 850-950 MHz operating band, which delivers more than 1 km of range with strong signal penetration through walls, buildings, and foliage; up to +26 dBm transmit output power; and up to 43 Mbps data rate, which is substantially higher than most sub-GHz LPWAN alternatives such as LoRa. The module uses the standard M.2 2230 E-Key form factor with a USB 2.0 interface, allowing it to plug directly into the M.2 sockets of Gateworks single board computers and other embedded hosts. Technically, the card is built around the Morse Micro MM8108 SoC, a dedicated 802.11ah baseband and RF system-on-chip. Because it operates in sub-GHz spectrum, the GW16167 achieves link budgets far beyond 2.4 GHz radios at equivalent power, while retaining native IP connectivity and standard Wi-Fi security rather than the constrained protocols of proprietary LPWAN systems. Typical applications include long-range industrial IoT sensor networks, smart city and metering infrastructure, agricultural monitoring, security cameras at remote sites, and backhaul-free connectivity for Gateworks single board computers used in gateways. It is specifically targeted at Internet of Things deployments where devices sit hundreds of meters to over a kilometer from an access point. When designing with this module, verify that your host platform provides a USB 2.0-capable M.2 E-Key socket and an appropriate sub-GHz antenna (U.FL or similar connector as supported by the carrier board), and confirm regional regulatory approval for the 850-950 MHz band in your target market. This page synthesizes distributor pricing channels, verified manufacturer product data, and practical design guidance not found in a single datasheet, providing engineers a one-stop reference for evaluating and sourcing the GW16167.
GX36420-F-DNT - 64Gbps Linear Quad TIA | Renesas Electronics
The Renesas Electronics GX36420-F-DNT is a 64Gbps linear quad transimpedance amplifier (TIA) integrating four TIA channels on a single die, designed for 400G/600G coherent optical communication applications. According to distributor data, the device is categorized as a Transimpedance Amplifier / Telecom IC and is offered in stock at LCSC from $398.9627 as of 2026-10-10. A transimpedance amplifier (TIA) is a current-to-voltage converter that sits at the front end of an optical receiver, converting the photocurrent generated by a photodiode into a proportional voltage signal. Within the signal-chain hierarchy, a TIA is a high-speed analog amplifier, a subclass of operational-amplifier-based receiver front ends, which in turn belong to the broader power and signal management IC family. In coherent optical transceivers, four TIAs process the XI, XQ, YI, and YQ polarization/multiplexed channels of a coherent receiver. Key features of the GX36420 family include four integrated linear TIA lanes per die at 64Gbps per lane, on-chip digital interface circuitry for DC controls, and single-die integration optimized for 400G/600G coherent receiver modules. Linear (unlimited amplitude) TIA output preserves the analog waveform, enabling downstream DSP-based clock and data recovery and digital signal processing required by coherent modulation formats such as DP-QPSK and DP-16QAM. The architecture combines the four TIAs with the digital control interface on one die, reducing channel-to-channel skew and simplifying integration inside coherent receiver photonic assemblies. Linear gain characteristics allow the DSP to perform equalization and phase recovery, a requirement that limiting (saturating) TIAs cannot satisfy. Typical applications include 400G and 600G coherent optical transceivers, data-center interconnect (DCI) and long-haul/telecom coherent line cards, and coherent receiver ROADM subsystems. Design consideration: linear TIAs are sensitive to photodiode parasitic capacitance and supply noise; follow the manufacturer evaluation-board layout guidance for the photodiode-to-TIA bond/interface path. [DATA_NEEDED: package name, supply voltage, power dissipation, and full electrical ratings are not present in the provided web data.] This page synthesizes distributor pricing, availability, and family-level technical context not found on a single datasheet page; several detailed electrical specifications require datasheet verification.
GX39220-DNT - 96GBaud 2-Ch Linear TIA | Renesas | CFP2/CFP4
The Renesas Electronics GX39220-DNT is a dual-channel (2 x 96 GBaud) linear transimpedance amplifier (TIA) for coherent optical communications, integrating two TIA signal paths for the I and Q channels of a coherent receiver in a compact die-sale (DNT) form factor. A linear transimpedance amplifier is an analog front-end (AFE) device that converts the low-level photocurrent generated by a photodiode into a proportional voltage output while preserving linearity, unlike limiting TIAs that saturate the output. In the signal-chain hierarchy, the TIA sits directly after the photodetector in an optical receiver, feeding downstream ADCs and DSP-based equalization in coherent DSP ASICs. Linear TIAs are therefore foundational building blocks of high-speed optical transport systems used in datacenter interconnects and long-haul telecom. Key features of the GX39220 include dual 96 GBaud channels supporting high-order coherent modulation formats, a linear transfer characteristic that enables DSP-based equalization of PAM/QAM waveforms, and a high-performance, low-power, compact design specifically engineered for small-form-factor pluggable modules such as CFP2 and CFP4 coherent modules. The GX39220 architecture integrates matched I and Q signal paths, ensuring channel-to-channel consistency required for coherent demodulation, where amplitude and phase balance between quadrature branches directly affect constellation quality and system OSNR tolerance. The linear gain approach allows downstream digital signal processing to recover the full waveform, including multi-level modulation. Typical applications include CFP2/CFP4 coherent optical transceiver modules, datacenter interconnect (DCI) and metro/long-haul coherent receivers, and coherent DWDM telecom line cards operating at symbol rates approaching 96 GBaud per polarization tributary. Design consideration: because the part is offered as die-sale (DNT), module designers must implement chip-on-board or known-good-die assembly with verified bondout and RF/thermal design; consult the Renesas datasheet and the GX39220-DNT evaluation board (GX39220-DNT-EVB) for reference layouts. This page synthesizes distributor pricing, availability data, and application context not found in a single manufacturer source, with all parameter placeholders explicitly flagged rather than estimated.
HMC270A - GaAs MMIC SPDT Switch DC-8GHz | Analog Devices
The HMC270A is a broad-band non-reflective GaAs MMIC SPDT (Single-Pole Double-Throw) switch from Analog Devices, covering DC to 8 GHz. It is housed in an 8-lead MSOP grounded base surface mount plastic package, offering excellent isolation from 70 dB at low frequencies to 35 dB at 8 GHz. The switch is controlled by a negative control voltage of -5 V, making it suitable for a wide range of RF and microwave applications. An SPDT switch is a fundamental RF component that routes a common input to one of two outputs (or vice versa), enabling signal selection, T/R switching, and test instrumentation. In a non-reflective design, the unused port is terminated internally, providing a matched 50-ohm impedance at all ports, which minimizes reflections and improves system performance. This switch is part of the broader category of RF switches, which are essential in wireless communication, radar, and test equipment. Key features of the HMC270A include its wide frequency range from DC to 8 GHz, high isolation, and non-reflective operation. The device operates with a single negative supply voltage of -5 V, simplifying bias circuitry. The MSOP package is compact and suitable for high-density PCB layouts, and the grounded base provides good thermal and electrical performance. Technically, the HMC270A is fabricated using GaAs MMIC technology, which offers low insertion loss and high linearity at microwave frequencies. The switch is designed for 50-ohm systems and provides a typical insertion loss of [DATA_NEEDED: insertion loss] dB and a return loss of [DATA_NEEDED: return loss] dB. The switching speed is [DATA_NEEDED: switching speed] ns, enabling fast signal routing. Typical applications include test and measurement instrumentation, radar systems, communication systems, and military electronics. The wide bandwidth and high isolation make it ideal for signal routing in broadband systems. When designing with the HMC270A, ensure proper decoupling on the control lines and provide a clean -5 V supply. The RF ports should be matched to 50 ohms, and the ground pad should be soldered to a low-inductance ground plane for optimal performance.
HMC270AMS8GE - SPDT RF Switch DC-8GHz | Analog Devices
The HMC270AMS8GE is a broad-band non-reflective GaAs MMIC SPDT switch from Analog Devices, designed for RF and microwave applications from DC to 8 GHz. Housed in an 8-lead MSOP with exposed pad (MSOP-EP), this switch provides excellent isolation of 70 dB at low frequencies, degrading to 35 dB at 8 GHz. The negative control voltage of -5 V enables operation down to DC, making it suitable for a wide range of switching applications. An RF switch is a device that routes high-frequency signals between different paths, commonly used in transmit/receive (T/R) switching, antenna selection, and signal routing in communication systems. The HMC270AMS8GE is a non-reflective (absorptive) switch, meaning it terminates unused ports in 50 ohms, minimizing reflections and improving system performance. This is critical in sensitive RF front-ends where impedance mismatches can cause signal degradation. Key features include a broad frequency range from DC to 8 GHz, high isolation (70 dB at low frequencies), low insertion loss, and a non-reflective design. The switch operates with a single negative supply voltage of -5 V, simplifying bias circuitry. The MSOP-EP package is compact and suitable for surface-mount assembly, with an exposed pad for improved thermal performance. Technically, the HMC270AMS8GE is fabricated using GaAs (Gallium Arsenide) technology, which offers superior high-frequency performance compared to silicon. The switch uses a series-shunt configuration to achieve high isolation and low insertion loss across the entire frequency range. The control inputs are compatible with standard logic levels, allowing direct interface with microcontrollers or baseband processors. Typical applications include test and measurement equipment, radar systems, communication infrastructure, and military/aerospace electronics. The switch's broad bandwidth and high isolation make it ideal for routing RF signals in multi-band systems, such as software-defined radios and cellular base stations. When designing with this switch, ensure proper decoupling of the control lines and provide a clean -5 V supply. The exposed pad should be soldered to a ground plane for optimal thermal and electrical performance. Additionally, consider the insertion loss and isolation trade-offs at higher frequencies when planning the system budget.
HMC270AMS8GETR - SPDT RF Switch DC-8GHz | Analog Devices
The HMC270AMS8GETR from Analog Devices is a broad-band non-reflective GaAs SPDT (Single-Pole Double-Throw) RF switch designed for applications covering DC to 8 GHz. Housed in an 8-lead MSOP with exposed pad (MSOP-EP), this switch provides excellent isolation ranging from 70 dB at low frequencies to 35 dB at 8 GHz. The device operates with a negative control voltage of -5 V, enabling operation down to DC, and is optimized for 50-ohm systems. An RF switch is a critical component in wireless and test systems, allowing a single signal path to be routed to multiple destinations or selecting between multiple sources. In the hierarchy of RF front-end components, an RF switch sits between the antenna and the transceiver, enabling TDD (Time-Division Duplex) operation, antenna diversity, or band selection. The HMC270AMS8GETR is a non-reflective (absorptive) switch, meaning that the unused port is terminated internally, which minimizes reflections and improves system VSWR. Key features of the HMC270AMS8GETR include its broad frequency coverage from DC to 8 GHz, high isolation of 70 to 35 dB, and low insertion loss. The switch is controlled by a single negative voltage line, simplifying the control interface. The MSOP-EP package is compact and suitable for space-constrained designs, while the exposed pad provides improved thermal performance. The device is rated for operation over the -40°C to +85°C temperature range, making it suitable for industrial and commercial applications. Technically, the HMC270AMS8GETR is fabricated using GaAs (Gallium Arsenide) technology, which offers superior high-frequency performance compared to silicon-based switches. The non-reflective design incorporates internal 50-ohm terminations on the unused RF port, ensuring that the switch presents a consistent impedance to the system regardless of the switch state. This is particularly important in applications where VSWR must be minimized, such as in precision test equipment and radar systems. Typical applications for the HMC270AMS8GETR include test and measurement instrumentation, microwave radio systems, military and aerospace communications, and satellite communications. Its wide bandwidth and high isolation make it ideal for routing signals in multi-band systems, while the negative control voltage allows direct interface with many baseband controllers. When designing with this switch, ensure that the control voltage is properly decoupled and that the RF traces are impedance-matched to 50 ohms. The exposed pad should be soldered to a ground plane for optimal thermal and electrical performance. Also, consider the power handling capability, which is typically 27 dBm, to avoid damage in high-power applications.
HMC311ALP3E - DC-6GHz Gain Block MMIC, 17dBm P1dB | Analog Devices
The Analog Devices HMC311ALP3E is a GaAs InGaP Heterojunction Bipolar Transistor (HBT) Gain Block monolithic microwave IC (MMIC) amplifier covering DC to 6 GHz in a 16-lead, 3 mm x 3 mm LFCSP surface-mount package. It delivers 14.5 dB of small-signal gain, +17 dBm output P1dB, and an output IP3 of +32 dBm while drawing only 56 mA from a single +5 V supply, making it one of the most efficient broadband gain stages in its class. A gain block MMIC is a self-biased, 50 Ω-matched RF amplifier intended to be cascaded as a generic gain stage within a transceiver or signal-chain design. HBT gain blocks sit in the RF front-end hierarchy below power amplifiers and above LNAs; the HMC311ALP3E in particular is widely used as a LO driver for mixers, an IF buffer, or a general-purpose cascadable gain element where flat gain, good linearity, and minimal external parts are required. Key features include the Darlington feedback pair topology, which reduces sensitivity to normal process variations and yields excellent gain stability over temperature. The device requires only a single positive supply, two RF bypass capacitors, and an optional RF choke, dramatically simplifying PCB layout. Internal matching to 50 Ω at both RF ports eliminates the need for external matching networks in the 0.05–6 GHz band, supporting broadband applications such as test instrumentation, IF buffers, and LO distribution. Typical applications include driving the LO port of Analog Devices HMC mixers with up to +17 dBm of output power, fiber-optic driver amplification, IF amplification in microwave radio links, and general-purpose broadband gain stages for laboratory test equipment. The wide DC-6 GHz bandwidth also makes it suitable as a buffer for synthesizers and frequency-agile up/down converters. When designing with the HMC311ALP3E, observe the absolute maximum input RF drive of +20 dBm to prevent damage to the HBT input stage. Decouple Vcc with 100 pF and 4.7 nF capacitors placed as close to the Vcc pin as possible, and provide a 50 Ω microstrip or coplanar launch at both RF pins for stable broadband operation above 3 GHz. This page synthesizes distributor pricing, drop-in pin-compatible alternatives, application circuits, and engineering design notes that complement the manufacturer datasheet and are not duplicated on distributor catalog pages.
HMC311SC70ETR - DC-8GHz GaAs HBT Gain Block MMIC Amplifier | ADI
The Analog Devices HMC311SC70ETR is a GaAs InGaP Heterojunction Bipolar Transistor (HBT) Gain Block MMIC SMT amplifier covering DC to 8 GHz in an industry-standard 6-pin SC-70 package. It delivers 15 dB of small-signal gain, +30 dBm output IP3, and up to +15 dBm output power, while drawing only 54 mA from a 5 V supply. An RF gain block is a wideband, unconditionally-stable amplifier IC used to provide a fixed amount of gain across a broad frequency range. In the RF/microwave signal chain hierarchy, a gain block sits between the LNA/mixer and the next stage (PA, ADC driver, or LO chain), and is implemented as a monolithic microwave integrated circuit (MMIC) on GaAs, SiGe, or GaN. The HMC311SC70 (E) is the industry's classic general-purpose cascadable 50-ohm gain stage for sub-8 GHz IF and LO buffering. Key features include 15 dB gain, 5 dB noise figure, +11 dBm P1dB output power, and a +30 dBm output IP3 at 1 GHz. The HBT process is biased directly from a single 5 V rail with no external bias network required, and the device internally matches to 50 ohms at input and output, eliminating the need for off-chip matching components. The SC-70 (SOT-363) footprint makes it one of the smallest wideband gain blocks available. The architecture is a single-stage Darlington HBT with on-chip bias regulation. The InGaP/GaAs HBT process gives the part excellent thermal stability and ruggedness - it tolerates 50-ohm load VSWRs without damage - while the active-bias circuit holds quiescent current nearly constant over temperature. The result is a drop-in amplifier that performs identically across multiple cascaded stages and over industrial temperature ranges. Typical applications include driving the LO port of HMC-series mixers up to +15 dBm, IF buffering in microwave radios, cellular BTS transceiver gain stages, broadband test equipment, and military EW/surveillance front-ends. The wide DC-8 GHz bandwidth also makes it a useful general-purpose gain block in lab setups and instrumentation. When designing with this device, AC-couple both input and output ports to protect the DC bias point and to avoid disturbing the on-chip match. Keep input power below the P1dB for linear operation, and note that the part is not internally reverse-isolation-protected - always add a DC-blocking cap and, if upstream devices have DC on their outputs, a bias tee or series DC-block. This page synthesizes DigiKey/Mouser pricing, ADI datasheet specs, drop-in alternatives in the SC-70 footprint, and PCB-level design notes not collected on any single distributor page.
HMC329A-DIE - 22-38 GHz GaAs MMIC Double Balanced Mixer | Analog Devices
The HMC329A-DIE is a general-purpose, double-balanced MMIC mixer from Analog Devices, designed for upconversion and downconversion in the 22 GHz to 38 GHz frequency range. This bare die version offers a compact chip area of 0.87 mm × 0.58 mm, making it ideal for space-constrained, high-frequency applications. The device is fabricated in GaAs technology, providing excellent isolation and linearity performance. A double-balanced mixer is a type of frequency mixer that uses two balanced diode or transistor pairs to suppress both the local oscillator (LO) and radio frequency (RF) ports from the intermediate frequency (IF) output. This architecture inherently provides high isolation between ports, reducing the need for external filtering and improving overall system performance. In the hierarchy of RF components, a mixer is a fundamental building block in transceivers, following the low-noise amplifier (LNA) in the receive chain and preceding the power amplifier (PA) in the transmit chain. Key features of the HMC329A-DIE include a wide RF/LO frequency range of 22 GHz to 38 GHz, an IF frequency range of DC to 8 GHz, and a conversion loss of typically 8 dB. The device offers excellent isolations, with LO-to-RF isolation of 35 dB and LO-to-IF isolation of 25 dB, minimizing signal leakage and spurious responses. The input third-order intercept point (IIP3) is typically 15 dBm, ensuring good linearity for demanding modulation schemes. Technically, the HMC329A-DIE is a passive mixer, meaning it does not require DC bias, which simplifies circuit design and reduces power consumption. The GaAs MMIC process ensures consistent performance across temperature and lot variations. The bare die format allows for direct integration into hybrid circuits or multi-chip modules, offering flexibility in packaging and assembly. Typical applications include point-to-point and point-to-multipoint radios, satellite communications, radar systems, and test and measurement equipment. The wide frequency range and high isolation make it suitable for both military and commercial systems operating in the Ka-band. When designing with this bare die, careful attention must be paid to wire bonding and die attach processes to ensure reliable electrical and thermal connections. The die should be handled in a cleanroom environment to prevent contamination, and proper ESD precautions are essential.
HMC424ALP3ETR - 6-Bit 31.5dB GaAs Digital Attenuator | ADI
The Analog Devices HMC424ALP3ETR is a broadband 6-bit gallium arsenide (GaAs) monolithic microwave integrated circuit (MMIC) digital attenuator in a 16-lead leadless surface-mount package (LP3) with an exposed pad, covering DC to 13 GHz with a 31.5 dB total attenuation control range in 0.5 dB steps. According to the manufacturer datasheet, the bit weights are 0.5 (LSB), 1, 2, 4, 8, and 16 dB, and the typical insertion loss is less than 4 dB across the operating band. A digital step attenuator (DSA) is a variable-attenuation RF building block that adjusts signal level in discrete, calibrated increments under serial or parallel digital control. DSAs sit in the RF signal chain between the transceiver and the power amplifier (or between the LNA and the ADC) to implement automatic gain control (AGC), temperature compensation, and beam-weighting in phased arrays. At the hierarchy level, a DSA is a subset of RF attenuators, which are in turn part of the broader RF/microwave integrated circuit family used in modern wireless infrastructure. Key features of the HMC424ALP3ETR include 6-bit parallel control, ±0.2 dB typical attenuation accuracy (chip-scale package), 0.5 dB LSB resolution, and a hermetic leadless LP3 package that is compatible with standard surface-mount assembly including lead-free reflow. The exposed pad provides a low-inductance thermal and RF ground path, supporting stable RF performance up to 13 GHz. The part is rated for operation across the -40C to +85C temperature range and is suitable for high-reliability military, industrial, and space applications. Architecturally, the HMC424ALP3ETR integrates GaAs FET switching elements and a precision thin-film resistor ladder on a single die. Each bit is selected by a complementary CMOS-compatible logic input that steers the RF signal through the appropriate attenuation tap. Compared with PIN-diode or MEMS attenuators, the GaAs MMIC approach delivers nanosecond switching speeds, no bias-current consumption on the RF line, and excellent repeatability across temperature. Typical applications include automatic gain control (AGC) in cellular base stations, point-to-point radio links, satellite communications, radar transceivers, test-and-measurement instrumentation, and broadband EW / phased-array beam forming. The wide DC-13 GHz bandwidth covers all sub-6 GHz 5G FR1 bands, the 2.4/5/6 GHz Wi-Fi bands, and the X-band radar band (8-12 GHz). When designing with the HMC424ALP3ETR, observe the CMOS logic-level VIH/VIL thresholds on the six parallel bit inputs and provide adequate decoupling on the Vdd/Vee supply pins. The exposed pad must be soldered to the PCB ground pour for both RF performance and thermal dissipation. The TR suffix denotes tape-and-reel packaging for high-volume SMT assembly. This page synthesizes distributor pricing, drop-in LP3-package alternatives, and practical RF design notes that are not contained in the manufacturer datasheet alone.
HMC509LP5E - 7.8-8.8 GHz MMIC VCO with Fo/2 Output | Analog Devices
The Analog Devices (formerly Hittite) HMC509LP5E is a GaAs InGaP Heterojunction Bipolar Transistor (HBT) MMIC Voltage Controlled Oscillator (VCO) covering 7.8 GHz to 8.8 GHz fundamental output and providing a half-frequency (3.9-4.4 GHz) divided output. Housed in a 32-lead 5x5 mm QFN-EP package, it integrates resonators, negative-resistance devices, and varactor diodes on a monolithic die, delivering +13 dBm typical output power from a single +5 V supply while exhibiting excellent phase noise performance over temperature, shock and process variation. A Voltage Controlled Oscillator (VCO) is a fundamental building block of frequency synthesis. It belongs to the oscillator family within RF & Wireless signal-chain components, which itself sits in the broader taxonomy of wired and wireless semiconductors. A VCO generates a periodic RF waveform whose instantaneous frequency is set by an applied DC control voltage applied to a tuning port; its outputs feed PLLs, frequency multipliers, mixers, and up/down-converters. Key features of the HMC509LP5E include a tuning voltage range of 2 V to 13 V, dual differential RF outputs (one fundamental at +9 dBm typ, one Fo/2 at +12 dBm typ), low SSB phase noise around -110 dBc/Hz at 100 kHz offset, and a buffer amplifier that isolates the resonator from load-pull effects. Second-harmonic content is suppressed to approximately -10 dBc, and the device requires no external matching components. Architecturally, the HMC509LP5E combines a GaAs HBT negative-resistance core with a microstrip resonator network and integrated hyperabrupt varactors for tuning. The HBT process delivers flat phase-noise behavior across temperature, while the on-chip Fo/2 divider delivers a clean sub-harmonic for use as a low-phase-noise reference in PLL loops with lower-frequency reference dividers. Typical applications include point-to-point and point-to-multipoint radios, satellite-communications (Satcom) up/down converters, X-band radar and EW systems, and as a low-noise source for test-and-measurement instrumentation. The HMC509LP5E is also recommended for new designs by Analog Devices. Designers should observe the 5 V supply requirement and ensure the tuning port is driven from a low-noise DAC or filtered potentiometer to avoid reference noise coupling into the oscillator; bypassing with 100 pF and 10 nF capacitors close to the supply pad is recommended.
HMC558ALC3BTR - 5.5-14GHz GaAs MMIC Mixer | Analog Devices
The Analog Devices HMC558ALC3BTR is a general-purpose GaAs MMIC double-balanced mixer supplied in a leadless, RoHS-compliant 12-pin CLCC (2.9 x 2.9 mm) ceramic surface-mount package, designed for use as an upconverter or downconverter between 5.5 GHz and 14.0 GHz. Per the Analog Devices datasheet HMC558A, the device exhibits a typical conversion loss of 7.5 dB across the 5.5-14 GHz RF band, with LO drive rated at +15 dBm and IF typically tested at 100 MHz in upper-sideband mode. A double-balanced passive mixer is a frequency-translation building block used in superheterodyne transceivers; it multiplies the radio-frequency (RF) input with a local-oscillator (LO) signal to produce sum and difference intermediate-frequency (IF) outputs, suppressing both the RF and LO leakage at the IF port. Passive Schottky-diode or FET-ring implementations like the HMC558A require no DC bias, which simplifies board-level power architecture but also means they have an inherent insertion loss rather than a conversion gain. Mixers sit beneath the broader RF front-end taxonomy of up/down converters and are essential in any architecture that requires frequency translation. Key specifications include a broadband RF/LO range from 5.5 GHz to 14 GHz, low conversion loss, and high LO-to-RF and LO-to-IF isolation that is characteristic of the double-balanced topology. The leadless CLCC package eliminates bond wires, improving high-frequency repeatability versus chip-on-board implementations of the bare HMC558 die, and supports high-volume reflow-compatible assembly. The mixer operates from a single supply-free passive configuration, simplifying integration. The HMC558A chip is fabricated in a GaAs metal-semiconductor field-effect transistor (MESFET) process, leveraging the high electron mobility and low parasitic capacitance of GaAs to achieve low conversion loss and good port-to-port isolation across an octave-spanning band. Internal baluns transform the differential mixer cell to 50-ohm single-ended RF, LO, and IF interfaces, removing the need for external hybrid couplers. Typical applications include microwave point-to-point and point-to-multipoint radio links, military radar and electronic-warfare receivers and exciters, space and satellite communications payloads, and general-purpose test-and-measurement up/down conversion. When designing with this part, observe the maximum LO drive rating published in the datasheet and ensure the LO source can deliver +15 dBm with adequate harmonic filtering; for evaluation, the device can be ordered in eval-board-ready tape-and-reel packaging (suffix TR) that mates with standard 50-ohm microstrip interfaces.
HMC558ALC3BTR-R5 - 5.5-14 GHz GaAs MMIC Double-Balanced Mixer | Analog Devices
The Analog Devices HMC558ALC3BTR-R5 is a general-purpose, double-balanced GaAs MMIC fundamental mixer housed in a 12-lead leadless RoHS-compliant SMT package (2.9 x 2.9 mm CLCC-style LCC-12, exposed pad). Operating as either an upconverter or downconverter, the device covers the 5.5 GHz to 14 GHz RF band and requires no external components or matching circuitry, enabling compact transceiver front-end layouts. The -R5 suffix denotes the 500-piece reel packaging variant of the HMC558ALC3BTR family. A double-balanced mixer is a passive or active frequency-conversion stage that multiplies a radio-frequency (RF) input by a local oscillator (LO) signal to produce sum and difference intermediate-frequency (IF) products while suppressing certain spurious responses. In the receiver chain hierarchy, a mixer sits between the low-noise amplifier and the IF/baseband stage, while in the transmitter chain it sits between the baseband modulator and the power amplifier. Double-balanced topologies employ two transformers or baluns to provide inherent LO-to-RF and LO-to-IF port isolation, which is critical for dense multi-converter designs where LO leakage would otherwise leak into adjacent channels. Key features of the HMC558A include wide RF/LO bandwidth (5.5 GHz to 14 GHz), typical input IP3 of +17 dBm, typical LO-to-RF isolation of 35 dB, and a passive GaAs MESFET Schottky-diode topology that needs no DC bias. The leadless ceramic SMT package is compatible with standard reflow profiles and offers repeatable performance up to 14 GHz, an advantage over chip-on-board solutions for production volumes. Architecturally, the HMC558A is fabricated in a GaAs metal-semiconductor field-effect transistor (MESFET) Schottky-barrier diode process, an Analog Devices Hittite Microwave heritage technology chosen for low conversion loss and high linearity at microwave frequencies. The double-balanced diode quad, driven by an on-chip balun, provides symmetrical port isolation without external hybrids. Typical applications include 5.5-14 GHz point-to-point and point-to-multipoint radios, C-band and Ku-band downlinks, microwave backhaul upconverters, electronic warfare (EW) receiver front ends, and radar IF strips. The wide bandwidth also covers unlicensed 5 GHz ISM and U-NII bands plus portions of the 6 GHz and 7 GHz microwave links. When designing with this mixer, ensure the LO drive level meets the +13 dBm typical recommended input so that conversion loss and port-to-port isolation stay within datasheet limits. Use low-loss PCB substrates (e.g., Rogers RO4003C) above 10 GHz and keep the LO trace short to suppress feedthrough. This page synthesizes the manufacturer datasheet, distributor inventory (Mouser, DigiKey), reel/packaging variant guidance, and drop-in alternative analysis not consolidated in the original datasheet, giving engineers a single AEO-optimized source for selection, sourcing, and PCB redesign decisions.
HMC649A - 6-Bit Digital Phase Shifter 3-6 GHz | Analog Devices
The HMC649A is a GaAs MMIC 6-bit digital phase shifter designed for operation from 3 GHz to 6 GHz, manufactured by Analog Devices. It provides 64 phase states with a typical RMS phase error of 4 degrees and extremely low insertion loss variation of ±0.5 dB across all phase states. The device is controlled with positive control logic of 0/+5V and is housed in a compact 6x6 mm plastic leadless SMT package (28-QFN). It is internally matched to 50 Ohms, requiring no external components. A digital phase shifter is a critical component in RF and microwave systems that alters the phase of an incoming signal by a discrete amount, controlled by digital bits. It is used in phased array antennas, radar systems, and communication systems to steer beams electronically. The HMC649A belongs to the category of RF phase shifters, which are essential for beamforming and signal conditioning in modern wireless infrastructure. Key features of the HMC649A include 6-bit resolution providing 64 phase states, a frequency range of 3 GHz to 6 GHz, and a typical insertion loss of [DATA_NEEDED: insertion loss] dB. The device operates with a supply voltage of Vdd=+5V and Vss=-5V, and control voltage of 0/+5V. It is recommended for new designs and is available in a 28-QFN (6x6 mm) package, suitable for surface mount assembly. The HMC649A utilizes GaAs MMIC technology, offering high performance and reliability for demanding RF applications. The device's low RMS phase error and consistent insertion loss across all states ensure accurate beamforming and signal integrity. Its compact package and 50 Ohm internal matching simplify PCB design and reduce external component count. Typical applications include phased array radar, satellite communications, and 5G beamforming systems. The HMC649A is also used in test and measurement equipment for phase calibration and in electronic warfare systems for signal manipulation. When designing with the HMC649A, ensure proper power supply decoupling and control logic interfacing. The device requires both positive and negative supply rails, and the control lines should be driven with appropriate logic levels to achieve accurate phase states.
HMC649ALP6E - 6-Bit Digital Phase Shifter 3-6GHz | Analog Devices
The HMC649ALP6E is a GaAs MMIC 6-bit digital phase shifter from Analog Devices, operating from 3 to 6 GHz. It provides 360 degrees of phase coverage with a least significant bit (LSB) of 5.625 degrees, enabling precise phase control for radar and communication systems. The device is housed in a compact 6x6 mm plastic leadless SMT package (28-QFN) and is internally matched to 50 Ohms, requiring no external components. A digital phase shifter is a critical RF component that alters the phase of an incoming signal by discrete steps, controlled by digital logic. It is a subset of phase shifters, which are essential in phased-array antennas, beamforming networks, and radar systems. The HMC649ALP6E belongs to the family of RF/microwave ICs, specifically within the category of phase shifters, which are used to steer antenna beams electronically without moving parts. Key features include extremely low insertion loss variation of ±0.5 dB across all phase states, high accuracy with a phase error of ±4 degrees, and positive control logic of 0/+5V. The device operates over a wide temperature range and is RoHS compliant. Its 6-bit resolution provides 64 distinct phase states, allowing fine-grained beam steering. Technically, the HMC649ALP6E uses GaAs MMIC technology, which offers high electron mobility and low noise, making it suitable for high-frequency applications. The phase shifter is designed for use in radar systems, satellite communications, and test equipment. Its 50-ohm internal matching simplifies integration into RF chains, reducing design complexity and component count. Typical applications include phased-array radar, electronic warfare systems, and 5G beamforming. The device's wide bandwidth and precise phase control make it ideal for these demanding applications. When designing with this component, ensure proper grounding and decoupling to maintain performance. The control logic inputs should be driven with a 0/+5V signal, and the RF input/output should be AC-coupled to prevent DC bias issues.
HMC649ALP6ETR - 6-Bit Digital Phase Shifter 3-6GHz | Analog Devices
The HMC649ALP6ETR is a 6-bit digital phase shifter from Analog Devices, designed for RF applications operating from 3 GHz to 6 GHz. It provides 64 phase states with a 5.625° step, covering 0° to 360° with low insertion loss and high accuracy. The device is housed in a compact 28-lead QFN (6x6 mm) package, making it suitable for space-constrained radar and communication systems. A digital phase shifter is a critical RF component that adjusts the phase of a signal passing through it, controlled by digital logic bits. It is used in phased-array antennas, beamforming networks, and radar systems to steer the antenna beam electronically without moving parts. The HMC649ALP6ETR integrates the phase-shifting network and digital control interface into a single MMIC, simplifying system design and reducing board space. Key features include a frequency range of 3 GHz to 6 GHz, 6-bit resolution with 64 phase states, low insertion loss of typically 6 dB, and RMS phase error of less than 3 degrees. The device operates with a single +5V supply and a -5V supply, with control voltages of 0/+5V. It is fabricated using GaAs MMIC technology, ensuring consistent performance across temperature and process variations. The HMC649ALP6ETR uses a switched-line phase shifter architecture, where different path lengths are selected by PIN diodes or FET switches to achieve precise phase shifts. This design provides wideband performance and high power handling capability. The digital control interface is compatible with TTL/CMOS logic levels, allowing direct connection to microcontrollers or FPGAs. Typical applications include phased-array radar, satellite communications, 5G beamforming, and test equipment. The device's wide frequency range and high phase accuracy make it ideal for both military and commercial systems. Its small package and low power consumption enable integration into portable and handheld devices. When designing with this device, ensure proper decoupling of the Vdd and Vss supplies and provide adequate ground vias under the exposed pad for thermal and electrical performance. The control lines should be kept short to minimize parasitic inductance and maintain fast switching speeds.
HMC735LP5E - 10.5-12.2 GHz GaAs HBT MMIC VCO with Divide-by-4 | Analog Devices
The Analog Devices HMC735LP5E is a GaAs InGaP Heterojunction Bipolar Transistor (HBT) MMIC Voltage Controlled Oscillator (VCO) with an integrated divide-by-4 frequency output, covering 10.5 GHz to 12.2 GHz fundamental frequency range and delivering +17 dBm typical output power in a 32-pin QFN-EP (LP5) surface-mount package. The monolithic structure integrates resonators, negative resistance devices, and varactor diodes on a single die, providing -100 dBc/Hz phase noise at 100 kHz offset. According to the Analog Devices HMC735 datasheet, the part is recommended for new designs. A VCO (Voltage Controlled Oscillator) is a fundamental building block in frequency synthesis and RF signal generation. It produces an output frequency that varies linearly with an applied tuning voltage. VCOs sit at the heart of Phase-Locked Loops (PLLs), frequency synthesizers, and up/down-converters in wireless transceivers. By tuning the control voltage, designers can generate precise, agile RF carriers used in radar, satellite communication, point-to-point microwave links, electronic warfare, and test instrumentation. The HMC735 family specifically targets the 10.5-12.2 GHz microwave band used by unlicensed industrial-scientific-medical (ISM) allocations and X-band radar systems. Key differentiating features include integrated divide-by-4 prescaler output (delivering 2.625 GHz to 3.05 GHz), single +5V supply operation, low SSB phase noise of -100 dBc/Hz at 100 kHz offset, monolithic GaAs InGaP HBT construction for excellent temperature/shock/process stability, and +17 dBm typical RF output power. The 5V supply simplifies LO distribution designs by avoiding the need for negative bias generators. Architecturally, the HMC735LP5E uses a common-collector HBT negative-resistance topology with an on-chip dielectric resonator network and hyperabrupt varactor diodes for tuning. The integration eliminates bond-wire inductance and PCB parasitics that typically degrade discrete VCO phase noise. The exposed-pad QFN-32 package provides low thermal resistance for stable operation across industrial temperature ranges. Typical applications include point-to-point radio, satellite communications, X-band radar, electronic warfare jamming, frequency synthesizers, and test instrumentation. The wide tuning bandwidth and divide-by-4 output make it particularly well-suited as the fundamental oscillator feeding a down-converting mixer or a PLL frequency synthesizer with relaxed comparison frequencies. When designing with the HMC735LP5E, ensure the tuning port is decoupled with high-Q capacitors and the supply is bypassed with a combination of 100 pF and 4.7 µF capacitors placed within 1 mm of the supply pin. The exposed pad must be soldered to a continuous ground plane with multiple thermal vias to dissipate the approximately 1-2 W of dissipated power and maintain long-term frequency stability. This page synthesizes distributor pricing, same-family and pin-compatible alternatives, phase-noise comparison data, and practical layout guidance that are not collected in a single place in the Analog Devices datasheet.
HMC8411 - 0.01-10GHz GaAs pHEMT LNA | Analog Devices
The HMC8411 is a gallium arsenide (GaAs), monolithic microwave integrated circuit (MMIC), pseudomorphic high electron mobility transistor (pHEMT), low noise wideband amplifier from Analog Devices. It operates from 0.01 GHz to 10 GHz, providing a typical gain of 15.5 dB, a 1.7 dB typical noise figure, and a typical output third-order intercept point (OIP3) of [DATA_NEEDED: OIP3 value] dBm. The device is housed in a 6-lead LFCSP (2x2 mm) package, designed for surface mount assembly, and is recommended for new designs. A low noise amplifier (LNA) is a critical component in RF front-end systems, placed at the first stage of a receiver chain to amplify weak signals while adding minimal noise. The HMC8411 belongs to the category of RF amplifiers, specifically wideband LNAs, which are essential in applications such as communications, radar, and test equipment. Its wideband coverage from 10 MHz to 10 GHz makes it versatile for various frequency bands. Key features include a low noise figure of 1.7 dB, which is crucial for maintaining signal integrity in sensitive receivers, and a gain of 15.5 dB to boost signal levels. The device operates over a supply voltage of [DATA_NEEDED: supply voltage] V and consumes [DATA_NEEDED: supply current] mA. It is designed for 50-ohm systems, simplifying integration into standard RF chains. The LFCSP package offers excellent thermal performance and small footprint, ideal for compact designs. Technically, the HMC8411 leverages GaAs pHEMT technology, which provides high electron mobility and low noise characteristics, making it superior to silicon-based amplifiers for high-frequency applications. The device includes internal matching networks, reducing external component count and simplifying PCB layout. It is specified for operation over the temperature range of -40°C to +85°C, ensuring reliability in harsh environments. Typical applications include cellular infrastructure, point-to-point radios, satellite communications, radar systems, and test instrumentation. Its wideband nature allows it to be used in software-defined radios and broadband receivers. The HMC8411 is also suitable for military and aerospace applications where high performance and reliability are paramount. When designing with the HMC8411, ensure proper bias sequencing to avoid damage. The evaluation board EV1HMC8411LP2F uses Rogers 4350 material with 50-ohm impedance traces, providing a reference for layout. Adequate decoupling on the supply pins is essential to maintain stability and performance.
IPQ6000 - Quad A53 Wi-Fi 6 SoC, FCBGA-570 | Qualcomm
The Qualcomm IPQ6000 is a quad-core ARM Cortex-A53 Wi-Fi 6 (802.11ax) system-on-chip designed for residential gateways, access points and mesh nodes. It integrates four A53 cores clocked up to 1.2 GHz, a dual-band 2x2 2.4 GHz plus 2x2 5 GHz radio subsystem, hardware crypto engine, and Gigabit Ethernet MACs in a single FCBGA-570 package, enabling fanless router/AP designs at sub-10 W total board power. What is a Wi-Fi SoC? A Wi-Fi SoC (System-on-Chip) integrates the CPU, memory controller, radio baseband/MAC, network interfaces and security accelerators onto a single die, replacing a traditional CPU + Wi-Fi chipset + Ethernet PHY stack. The IPQ6000 belongs to Qualcomm's IPQ series, part of the broader Networking Pro platform that scales from entry-level home routers up to enterprise/carrier gateways. Its hypernym hierarchy is: Wi-Fi SoC -> wireless networking SoC -> networking SoC -> integrated circuit. Key features include 802.11ax with MU-MIMO and OFDMA, dual-band dual-concurrent (DBDC) radio, integrated 2.5G/1G Ethernet MACs, USB 3.0, PCIe 2.0, and hardware NAT/IPsec offload. According to Qualcomm, the IPQ6000 targets Wi-Fi 6 entry-tier mainlines and is firmware-compatible with the IPQ601x/401x/40xx series, allowing ODM reuse across product tiers. The SoC pairs with Qualcomm companion radios such as the QCN5024 (2.4 GHz) and QCN5052/QCN6024 (5 GHz) front-end modules via serial GMII/RGMII. Memory support is DDR3L up to 1 GB with 16-bit ECC option. Power is supplied from a multi-rail PMU at roughly 0.9 V core, 1.8 V I/O and 3.3 V analog, requiring strict sequencing to prevent latch-up. Typical applications include home Wi-Fi 6 routers, ISP gateways, mesh Wi-Fi nodes, small-business access points, and IoT bridges. Compex Systems' AP.CP03 reference board demonstrates a complete dual-band DBDC + MU-MIMO + OFDMA design on the IPQ6000, validating industrial deployment. For thermal design, plan for 7-9 W board power dissipation. Use a 4-layer FR4 stack-up with a continuous ground plane beneath the FCBGA, and follow Qualcomm's exposed-die via-in-pad pattern (NSMD pad, 0.2 mm laser via, microvia-in-pad preferred). This page consolidates distributor stock/pricing, descriptions from the official IPQ6000 datasheet 80-YB726-3, and same-family drop-in alternatives not synthesised in a single OEM document.
IPQ6000+QCN5052+QCN5022+QCA8075 - WiFi 6 Dual-Band SoC Solution | Qualcomm
The Qualcomm IPQ6000+QCN5052+QCN5022+QCA8075 is a Wi-Fi 6 (802.11ax) dual-band networking chipset solution built around the IPQ6000 quad-core ARM Cortex-A53 application processor. The IPQ6000 integrates four 64-bit A53 cores running at 1.2 GHz with dual-band 2x2 MIMO MAC/baseband/radio, supporting 802.11a/b/g/n/ac/ax operations up to 1775 Mbps aggregate throughput. Companion radios QCN5022 (2.4 GHz) and QCN5052 (5 GHz) deliver the front-end, while the QCA8075 provides multi-port Gigabit Ethernet switching. A Wi-Fi 6 access point SoC solution is a system-on-chip platform that combines an applications processor, dual-band radio transceivers, and an Ethernet switch into a chipset reference that powers next-generation wireless routers, mesh nodes, and enterprise APs. Within the broader silicon taxonomy, the IPQ6000 belongs to the Qualcomm Atheros Immersive Home / Networking Pro family of Wi-Fi SoCs, sitting under the network processor hierarchy that bridges ARM Cortex CPUs with integrated MAC/baseband radios - a class of devices essential for high-throughput, low-latency wireless edge networking. Key features of the IPQ6000+QCN5052+QCN5022+QCA8075 solution include 2.4 GHz (2x2) + 5.8 GHz (2x2) simultaneous dual-band operation with combined PHY rate up to 1775 Mbps, DFS (Dynamic Frequency Selection) support for radar-aware channel use, and wireless probe plus positioning-engine capability for indoor location services. The QCN5022 and QCN5052 are housed in 100-pin DRQFN packages, and the QCA8075 in a 108-pin DRQFN package, supporting surface-mount PCB integration on compact AP motherboards. The architecture supports up to 16 SSIDs, mesh networking, and cloud-managed deployment. Technical depth: the IPQ6000's quad-core Cortex-A53 cluster enables hardware-accelerated encryption (IPSec/L2TP), QoS queues, and offloaded packet processing. Combined with the QCA8075 5-port Gigabit switch and the dual-radio QCN5022/QCN5052 front-ends, the solution provides a deterministic low-latency pipeline suitable for industrial-grade WiFi 6 deployments. Compared with older IPQ40xx solutions, the IPQ6000 doubles CPU cores and adds 802.11ax OFDMA/MU-MIMO scheduling on-chip. Typical applications include industrial Wi-Fi 6 access points, ceiling-mount dual-band APs, coal-mine intrinsically safe wireless gateways, IoT routers with RS485, and SMB/enterprise fat APs. The 1.775 Gbps aggregated throughput makes the platform well-suited to high-density venues, warehouses, and outdoor mesh nodes. Design consideration: when using this solution, allocate PCB ground planes under each DRQFN-exposed pad for thermal dissipation, and ensure host board routing preserves 100-ohm differential impedance for the 2.4 GHz and 5 GHz RF paths. Verify DFS regional compliance before enabling 5 GHz channels in your deployment country. This page synthesizes distributor pricing, chipset-level cross-references (e.g., IPQ6010 variant), and design notes not consolidated on the standard Qualcomm product brief.
IPQ8071A - Quad-Core 1.4GHz Wi-Fi 6 Networking SoC | Qualcomm
The Qualcomm IPQ8071A is a quad-core ARM Cortex-A53 networking SoC clocked at up to 1.4 GHz, integrated with a dual-band Wi-Fi 6 (802.11ax) subsystem, a 2.5G Ethernet MAC, and hardware-accelerated packet processing engines, supplied in a 772-ball FCBGA package. It delivers up to 6.0 Gbps aggregate PHY rate (AX6000 class) across 2.4 GHz and 5 GHz radios with 4x4 MU-MIMO, OFDMA, and 1024-QAM support. A system-on-chip (SoC) for wireless routers and access points is an integrated circuit that combines a CPU, memory controller, networking interfaces, wireless MAC/baseband, and security accelerators on a single die. The IPQ8071A sits in the Wi-Fi 6 (802.11ax) SoC taxonomy and is widely used in flagship consumer routers (e.g., Xiaomi AX3600) and SMB/enterprise Wi-Fi 6 access points. SoCs in this category replace multi-chip designs that previously required a host CPU plus a discrete Wi-Fi chip. Key differentiating specifications include a quad-core Cortex-A53 CPU cluster with hardware crypto acceleration, dual-band concurrent 4x4 radios with 160 MHz channel support on 5 GHz, dedicated 2.5G Multi-Gig Ethernet MAC/PHY interface, and Qualcomm's NUPU (Network Processing Unit) engines for NAT, QoS, and encryption offload. The 14nm process node contributes to the 1.4 GHz clock headroom under typical router thermal envelopes. Architecturally, IPQ8071A pairs the application processor cluster with two radio subsystems (one for 2.4 GHz, one for 5 GHz), an integrated 2.5G Ethernet MAC, USB 3.0, PCIe 2.0, and multiple RGMII interfaces for external PHYs. The on-chip NUPU pipelines accelerate IPSec/L2TP/PPTP VPN termination and hardware NAT, allowing line-rate throughput without consuming CPU cycles. Typical applications include flagship AX6000/AX5400 dual-band Wi-Fi 6 routers (Xiaomi AX3600/AX1800/AX6000 class), SMB Wi-Fi 6 access points, 2.5G-capable mesh nodes, and home gateways requiring 1G+ WAN-LAN NAT throughput. The 2.5G Ethernet MAC makes it ideal for multi-gig broadband deployments above 1 Gbps. Design consideration: provide a solid copper ground plane beneath the FCBGA and a minimum 4-layer stack-up; the SoC's 6+ W typical board dissipation demands thermal vias and an exposed copper spreader. Software development uses Qualcomm's QSDK / OpenWrt fork with ath11k WLAN driver support. This page synthesizes distributor pricing, drop-in alternatives within the Qualcomm IPQ family, and practical design notes not found in the manufacturer short-form datasheet.
IRIS-W101-00B - Tri-Radio Wi-Fi 6/BLE/802.15.4 Module | u-blox
The u-blox IRIS-W101-00B is a stand-alone, dual-band Wi-Fi 6 and Bluetooth Low Energy wireless microcontroller module with integrated IEEE 802.15.4 support, based on the NXP RW612 silicon platform. Operating in the 2.4 GHz and 5 GHz bands, it supports Wi-Fi 802.11a/b/g/n/ac/ax, Bluetooth v5.3 (LE), and Zigbee/Thread via 802.15.4 in a surface-mount module with antenna pin (antenna not included). The IRIS-W101-00B is positioned for the open CPU variant of the IRIS-W10 series, allowing customer application code to run directly on the module's Cortex-M33 host processor. A Wi-Fi 6/BLE/802.15.4 module is a highly integrated radio SoM (system-on-module) that combines a wireless MCU, RF front-end, passives, and regulatory-certified firmware into a single shielded package, simplifying host-integration and accelerating time-to-market. These modules belong to the broader RF & Wireless category, sitting above discrete RF transceivers and below the host MCU in the typical IoT connectivity hierarchy. The "tri-radio" designation means three independent radios (Wi-Fi, Bluetooth LE, 802.15.4) share the same silicon die and antenna path while coexisting via u-blox's validated radio management firmware. The IRIS-W101-00B features dual-band Wi-Fi 6 with OFDMA, MU-MIMO, and Target Wake Time (TWT) for low-power operation, Bluetooth LE 5.3 including LE Audio and long-range coded PHY, and 802.15.4 for Thread/Zigbee mesh. The module's antenna pin allows OEM antenna selection (chip, PCB trace, or external SMA) and supports u-blox's antenna partner ecosystem. Wi-Fi 6 features such as OFDMA and BSS coloring improve network efficiency, while 802.11ax brings up to 9.6 Gbps theoretical throughput at the protocol level. The integrated power-management IC and DC-DC converters reduce external BOM count, and on-board regulatory certifications (FCC/IC/CE) streamline end-product compliance. Typical applications include industrial IoT gateways, smart-home hubs supporting Matter over Thread or Wi-Fi, asset-tracking devices, building automation controllers, and medical telemetry devices. The open CPU variant (W101) lets OEMs embed their own application firmware on the Cortex-M33 core, eliminating the need for an external host MCU in many designs. Wi-Fi 6 enables higher device density in environments such as warehouses, hospitals, and apartment complexes where legacy Wi-Fi 5 networks become congested. When designing with the IRIS-W101-00B, place the antenna as far from ground planes and metal enclosures as practical, follow u-blox's reference PCB layout for the antenna feed-line 50 ohm impedance, and provide adequate clearance around the module's RF section per the IRIS-W10 system integration manual. Decoupling capacitors on all VDD pins and a clean 3.3 V supply are essential for radio performance. The module's firmware is updatable over-the-air (OTA) and via UART, supporting long product lifecycles. This page synthesizes distributor pricing, regulatory information, and application notes not found on the manufacturer datasheet alone, enabling engineers to evaluate the IRIS-W101-00B alongside competing tri-radio modules without leaving XAIPART.
IRIS-W101-10B - Tri-Radio Wi-Fi 6 + BLE + 802.15.4 Module | u-blox
The u-blox IRIS-W101-10B is a stand-alone, surface-mount tri-radio wireless MCU module that integrates dual-band Wi-Fi 6 (802.11a/b/g/n/ax), Bluetooth 5.x Low Energy, and IEEE 802.15.4 (Thread/Zigbee) connectivity on the NXP RW612 Open-CPU silicon. Housed in a compact surface-mount module with 16 MB flash and an antenna pin (external antenna NOT included), the part is targeted at IoT edge nodes that need a single certified multi-protocol radio building block. A wireless module such as the IRIS-W101-10B is a pre-certified radio sub-system that combines an RF transceiver, modem, MAC, host processor interface, and regulatory-approved PCB antenna or RF pin. Wireless module -> radio module -> transceiver module -> RF module -> electronic component. Wireless modules sit in the broader hierarchy wireless SoC -> IoT connectivity IC -> semiconductor, and they are widely used as drop-in radio blocks to shorten FCC/CE/RED certification cycles for end products. Key features of the IRIS-W101-10B include dual-band 2.4 GHz and 5 GHz Wi-Fi 6 operation, Bluetooth LE 5.x with long-range and high-throughput modes, IEEE 802.15.4 with Thread and Zigbee support, an Open-CPU architecture that allows customer firmware to run directly on the module, and 16 MB of on-module flash for OTA-capable designs. The module is supplied as a tape-and-reel surface-mount device for high-volume SMT assembly and ships from distributors as an active production part. The RW612 platform inside the module uses an Arm Cortex-M33 application processor together with dedicated Wi-Fi and Bluetooth radio subsystems, enabling concurrent multi-protocol operation without an external host MCU for many use cases. The 802.11ax (Wi-Fi 6) features such as OFDMA, MU-MIMO, and target wake time (TWT) reduce latency and power consumption in dense IoT deployments. Typical applications include smart-home gateways and Matter bridges, industrial IoT edge nodes, asset-tracking and logistics devices, building-automation HVAC and lighting controllers, medical telemetry peripherals, and wireless sensor networks that combine Thread mesh plus BLE provisioning. The antenna-pin variant (-10B) is preferred where the antenna is placed away from the module for enclosure/RF reasons. When designing with the IRIS-W101-10B, follow the u-blox system integration manual (SIM) for host-board keep-out, antenna routing, and regulatory re-compliance. Because the Open CPU runs customer application code on the module, allocate the 16 MB flash for firmware + OTA staging and reserve a secure boot strategy. All ratings quoted are from the manufacturer datasheet and current distributor stock as of the verification date. This page synthesizes distributor pricing, drop-in IRIS-W10 family alternatives, and practical design notes that are not duplicated in the manufacturer datasheet, helping engineers select between antenna-pin and trace variants without re-reading the full product family manual.