74HC165D,652 vs 74HC165D,653 비교
다음의 상세 나란히 비교: 74HC165D,652 제조: Nexperia 및 74HC165D,653 제조: Nexperia. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.
사양 비교
| 파라미터 | 74HC165D,652 | 74HC165D,653 |
|---|---|---|
| 브랜드 | Nexperia | Nexperia |
| 카테고리 | Logic ICs | Logic ICs |
| 수명 주기 상태 | 활성 | 활성 |
| 재고 상태 | In Stock | In Stock |
| 단가 (USD) | $0.16 | $0.15 |
| Logic Type | Shift Register | Shift Register (Parallel-in/Serial-out) |
| 기능 | Parallel or Serial to Serial | Parallel or Serial to Serial |
| Number of Elements | 1 | 1 |
| Number of Bits per Element | 8 | 8 |
| 출력 유형 | Differential (complementary Q7 and Q7-bar) | Differential (Q7 and Q7-bar complementary outputs) |
| Supply Voltage (VCC) | 2 V to 6 V | 2 V to 6 V |
| Logic Family | 74HC (high-speed Si-gate CMOS) | — |
| Input Type | CMOS (HC); pin-compatible with TTL/LSTTL | — |
| 동작 온도 | -40 °C to +125 °C | -40 C to +125 C |
| 패키지 | 16-SOIC (SOT109-1), 0.154" (3.90 mm) width | 16-pin SOIC (SOT109-1) |
| 실장 유형 | Surface Mount | Surface Mount |
| 핀 수 | 16 | — |
| Standard Compliance | JEDEC standard no. 7A | — |
| Pin Compatible With | Low-power Schottky TTL (LSTTL) | — |
| Parallel Load | Asynchronous via SH/LD-bar | — |
| Serial Data Input | DS (for daisy-chaining) | — |
| Clock Input | CP (rising-edge triggered) with clock inhibit (CE-bar) | — |
| RoHS 상태 | Compliant | Compliant |
| Input Voltage | — | 0 V to VCC |
| Output Drive (IO) | — | ±5.2 mA |
| Propagation Delay (tpd) | — | 6 ns typical at VCC = 5 V, CL = 50 pF [DATA_NEEDED: explicit propagation delay value] |
| MSL 레벨 | — | 1 (per JEDEC J-STD-020) |
| JEDEC Compliance | — | JESD7A (per datasheet) |
| Pin Compatibility | — | LSTTL 74LS165 |
| Technology | — | High-speed Si-gate CMOS |