A3PE3000L-PQG208I vs A3PE3000L-PQ208 비교
다음의 상세 나란히 비교: A3PE3000L-PQG208I 제조: Microchip Technology 및 A3PE3000L-PQ208 제조: Microchip Technology. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.
Microchip Technology
A3PE3000L-PQG208I - ProASIC3L Flash FPGA 3M Gates | Microchip
A3PE3000L-PQG208I ✓ 활성Microchip Technology
A3PE3000L-PQ208 - 3M Gate Low-Power Flash FPGA | Microchip
A3PE3000L-PQ208 ✓ 활성사양 비교
| 파라미터 | A3PE3000L-PQG208I | A3PE3000L-PQ208 |
|---|---|---|
| 브랜드 | Microchip Technology | Microchip Technology |
| 카테고리 | FPGA & CPLD | FPGA & CPLD |
| 수명 주기 상태 | 활성 | 활성 |
| 재고 상태 | In Stock | In Stock |
| 단가 (USD) | $48.90 | $310.69 |
| Family | ProASIC3L | ProASIC3L (ProASIC3EL) |
| System Gates | 3000000 | 3,000,000 |
| Total RAM Bits | 516096 | — |
| Number of I/O | 147 | — |
| Supply Voltage Range | 1.14 V to 1.575 V | — |
| Core Voltage | 1.2 V (low-power option), 1.2 V to 1.5 V range | 1.2 V |
| 동작 온도 | -40C to +100C (TJ) | 0C to +70C |
| 패키지 | 208-BFQFP (PQFP 28x28 mm) | 208-BFQFP (PQ208), 1.0 mm pitch |
| 실장 유형 | Surface Mount | Surface Mount |
| Technology | 130 nm flash process | — |
| Maximum Operating Frequency | 781.25 MHz | — |
| Configuration Memory | On-chip flash, single-chip (no external boot device) | — |
| Special Features | FlashFreeze technology, Power Driven Layout support | — |
| Moisture Sensitivity | MSL rated (Yes per distributor data) | — |
| Packaging | Tray, factory pack quantity 24 | Tray |
| RoHS 상태 | Lead free (per Microchip/Mouser listing of family) | RoHS Non-Compliant (contains lead) |
| Height | 3.4 mm | — |
| Length x Width | 28 mm x 28 mm | — |
| Embedded SRAM | — | 504 kbits true dual-port |
| User I/Os (PQ208) | — | 147 |
| 공급 전압 | — | 1.5 V |
| Maximum Frequency | — | 781.25 MHz |
| Process Technology | — | 130 nm, 7-layer metal (6 copper) CMOS |
| Logic Family | — | CMOS |
| Program Type | — | Flash-based, In-System Programmable |
| Power-Up Behavior | — | Live At Power-Up Level 0 |
| Configuration | — | Single-chip solution (no external boot device) |
| Boundary Scan | — | IEEE 1149.1 (JTAG) |