A54SX32-PQ208 vs A54SX32-1PQG208I 비교
다음의 상세 나란히 비교: A54SX32-PQ208 제조: Microchip Technology 및 A54SX32-1PQG208I 제조: Microchip Technology. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.
Microchip Technology
A54SX32-1PQG208I - 32K Gate SX FPGA, 208-PQFP | Microchip
A54SX32-1PQG208I ✓ 활성사양 비교
| 파라미터 | A54SX32-PQ208 | A54SX32-1PQG208I |
|---|---|---|
| 브랜드 | Microchip Technology | Microchip Technology |
| 카테고리 | FPGA & CPLD | FPGA & CPLD |
| 수명 주기 상태 | 활성 | 활성 |
| 재고 상태 | In Stock | In Stock |
| 단가 (USD) | $44.75 | $44.90 |
| Family | SX (Actel/Microsemi antifuse FPGA) | SX (Actel/Microsemi SX) |
| Gate Count | 48,000 gates (32K system gates) | — |
| Logic Modules (CLBs) | 2880 | — |
| User I/O | 174 configurable I/O pins | 174 |
| Max Clock Frequency (Internal) | 280 MHz to 320 MHz (speed-grade dependent) | — |
| Clock-to-Out (Pin-to-Pin) | 3.7 ns | — |
| Input Set-Up Time | 0.1 ns | — |
| Clock Skew | 0.25 ns | — |
| Supply Voltage (Core) | 3.0 V to 3.6 V (nominal 3.3 V) | — |
| Dual Rail Support | 4.75 V to 5.25 V (5.0 V operation option) | — |
| PCI Compliance | 66 MHz PCI single-chip solution | — |
| Programming Technology | Antifuse (one-time programmable, non-volatile) | — |
| 패키지 | 208-pin Plastic Quad Flat Package (PQFP/BFQFP), 28 mm x 28 mm | 208-BFQFP (208-PQFP) |
| 실장 유형 | Surface Mount | Surface Mount |
| Pin Locking | 100% resource utilization with 100% pin locking | — |
| 동작 온도 | [DATA_NEEDED: operating temperature range] | [DATA_NEEDED: operating temperature range] |
| RoHS 상태 | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| System Gates | — | 48000 |
| Equivalent Gates | — | 32000 |
| Logic Cells / Modules | — | 1800 |
| 최대 클록 주파수 | — | 280 MHz |
| Process Technology | — | 0.35 um CMOS antifuse |
| 공급 전압 | — | 3.3 V / 5 V |
| Speed Grade | — | -1 |
| Programmability Type | — | Antifuse (one-time programmable) |
| Configuration | — | Non-volatile, live at power-up |
| Temperature Grade | — | Industrial (I suffix) |
| MSL 레벨 | — | [DATA_NEEDED: moisture sensitivity level] |