ATF22V10C-5JC vs ATF22V10C-7JC 비교
다음의 상세 나란히 비교: ATF22V10C-5JC 제조: Microchip Technology 및 ATF22V10C-7JC 제조: Microchip Technology. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.
Microchip Technology
ATF22V10C-5JC - 500-Gate EE PLD, 10 Macrocells, 5ns | Microchip
ATF22V10C-5JC ✓ 활성Microchip Technology
ATF22V10C-7JC - 500-Gate 7 ns EE PLD | Microchip Technology
ATF22V10C-7JC Unknown사양 비교
| 파라미터 | ATF22V10C-5JC | ATF22V10C-7JC |
|---|---|---|
| 브랜드 | Microchip Technology | Microchip Technology |
| 카테고리 | Logic ICs | Logic ICs |
| 수명 주기 상태 | 활성 | Unknown |
| Device Type | EE PLD (Electrically Erasable Programmable Logic Device) | 22V10-series electrically erasable programmable logic device |
| Family | ATF22V10C / 22V10 | — |
| Macrocells | 10 macrocells | 10 macrocells |
| Total Gates | 500 gates | — |
| Propagation Delay (tPD) | 5 ns (min, -5 speed grade) | — |
| Max Frequency | 166 MHz (per FindIC listing of device attributes) | — |
| 공급 전압 | 5 V nominal | 5 V |
| Supply Tolerance (Commercial) | 5 V +/- 5% | — |
| Supply Tolerance (Military/Industrial) | 5 V +/- 10% | — |
| Power-Down Current | 10 uA (typical) | — |
| Technology | CMOS with electrically erasable Flash configuration memory | CMOS electrically erasable flash-memory technology |
| Input Latch Feature | Yes - holds inputs to previous logic states | — |
| Fusemap Compatibility | JEDEC GAL22V10 fusemap compatible (pin-to-pin) | — |
| 패키지 | 28-PLCC (QCCJ), J-lead, 11.51 mm x 11.51 mm | 28-pin PLCC |
| Package Code | QCCJ | — |
| Terminals | 28 J-bend (J-lead) terminals | — |
| Package Shape | Square | — |
| Temperature Grade | Commercial | Industrial temperature |
| 실장 유형 | Surface Mount | Surface mount |
| Programmable | Yes - in-circuit electrically erasable | — |
| RoHS 상태 | [DATA_NEEDED: RoHS compliance statement] | [DATA_NEEDED: RoHS status] |
| Datasheet Document | ATF22V10C(Q) Complete Datasheet (Microchip doc0735 PDF) | — |
| Programmable Logic Type | — | EEPLD |
| Logic Density | — | 500 gates |
| Speed Grade | — | 7 ns |
| Reported Propagation Delay | — | 7.5 ns |
| Package Body Size | — | 11.51 mm x 11.51 mm |
| Power-Down Control | — | Optional pin-controlled power-down; PLCC pin 5 |
| Supported Fusemap | — | JEDEC 22V10 fusemap compatible |
| Family Maximum Speed | — | Down to 5 ns |
| Family Typical Power Dissipation | — | As low as 100 uA |
| REACH Status | — | [DATA_NEEDED: REACH status] |
| AEC-Q100 Qualification | — | [DATA_NEEDED: AEC-Q100 qualification] |