CDK1307CILP40 vs CDK1308AILP40 비교
다음의 상세 나란히 비교: CDK1307CILP40 제조: MaxLinear 및 CDK1308AILP40 제조: MaxLinear. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.
사양 비교
| 파라미터 | CDK1307CILP40 | CDK1308AILP40 |
|---|---|---|
| 브랜드 | MaxLinear | MaxLinear |
| 카테고리 | ADC/DAC | ADC/DAC |
| 수명 주기 상태 | 활성 | 활성 |
| 재고 상태 | In Stock | In Stock |
| 단가 (USD) | $3.95 | $4.10 |
| Part Number | CDK1307CILP40 | — |
| Manufacturer | MaxLinear (formerly Exar/Cadeka) | MaxLinear (formerly Exar Corporation) |
| 기능 | Analog-to-Digital Converter (ADC) | — |
| 분해능 | 12-bit / 13-bit selectable | 10 bit |
| Sample Rate | 65 MSPS (family supports 20/40/65/80 MSPS) | — |
| Architecture | Multi-stage pipeline with digital error correction | Proprietary, digital error correction |
| Input Type | Single-ended analog input | — |
| Full-Scale Input Range | 1 Vpp typical | — |
| Supply Voltage (Analog) | 3.3 V | — |
| Supply Voltage (Digital) | 3.3 V | — |
| Reference | Internal (1.2 V bandgap) | Internal (no external reference required) |
| Output Interface | Parallel CMOS | — |
| Control Interface | CMOS serial configuration | CMOS |
| 패키지 | 40-pin LQFP (LP) | 40-pin QFN |
| 동작 온도 | -40 C to +85 C (industrial) | — |
| RoHS 상태 | Compliant | Compliant (per distributor listings) |
| Maximum Sample Rate | — | 20 MSPS |
| Family Sample Rate Options | — | 20 / 40 / 65 / 80 MSPS |
| Digital Interface | — | CMOS, parallel |
| Power-Down Pin (PD_N) | — | Yes (active low) |
| Sleep Pin (SLP_N) | — | Yes (active low) |
| 실장 유형 | — | Surface Mount |
| Power Consumption | — | Ultra-low (per family datasheet, exact value [DATA_NEEDED: power consumption mW]) |
| 동작 온도 범위 | — | [DATA_NEEDED: operating temperature range] |
| 공급 전압 | — | [DATA_NEEDED: AVDD / DRVDD values] |