CDK2308DILP64 vs CDK2308BILP64 비교

다음의 상세 나란히 비교: CDK2308DILP64 제조: MaxLinear 및 CDK2308BILP64 제조: MaxLinear. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.

사양 비교

파라미터 CDK2308DILP64 CDK2308BILP64
브랜드 MaxLinear MaxLinear
카테고리 ADC/DAC ADC/DAC
수명 주기 상태 활성 활성
재고 상태 In Stock In Stock
단가 (USD) $9.85 $7.25
분해능 10 bit 10 bit
Number of Channels 2 (Dual) 2 (dual)
Sampling Rate (max) 80 MSPS —
Supported Sample Rates 20 / 40 / 65 / 80 MSPS (programmable) —
Architecture Pipelined ADC Pipelined with on-chip track-and-hold
Input Type Single-ended analog Differential analog input
Power Dissipation 78 mW per channel at 80 MSPS —
Supply Voltage (AVDD) [DATA_NEEDED: AVDD nominal voltage] —
Supply Voltage (DRVDD) [DATA_NEEDED: DRVDD nominal voltage] —
Input Bandwidth [DATA_NEEDED: -3 dB input bandwidth] Up to 100 MHz IF (full-power)
SNR [DATA_NEEDED: SNR at full scale] —
SFDR [DATA_NEEDED: SFDR] —
ENOB [DATA_NEEDED: effective number of bits] —
패키지 64-QFN (9x9 mm) 64-pin QFN (LP), 9x9 mm with exposed pad
동작 온도 범위 -40 C to +85 C [DATA_NEEDED: industrial / extended range]
실장 유형 Surface Mount Surface Mount
MSL 레벨 [DATA_NEEDED: MSL rating] [DATA_NEEDED: MSL rating]
RoHS 상태 Compliant Compliant
Power-Down Modes Per-channel standby, chip standby, full power-down Per-channel, standby, full power-down
Track-and-Hold Amplifier Integrated, optimized for IF frequencies —
Sample Rate (B grade) — 40 MSPS per channel
Family Speed Grades — 20 / 40 / 65 / 80 MSPS (A/B/C/D grades)
공급 전압 — 3.3 V (analog and digital)
Power Consumption — [DATA_NEEDED: total power at 40 MSPS]
Output Interface — Parallel CMOS
Lead-Free — Yes
Datasheet Document — Cadeka / Exar CDK2308 family datasheet (15 pages)

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