EP1K30TC144-1N vs EP1K50TC144-1 비교
다음의 상세 나란히 비교: EP1K30TC144-1N 제조: Altera 및 EP1K50TC144-1 제조: Altera. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.
사양 비교
| 파라미터 | EP1K30TC144-1N | EP1K50TC144-1 |
|---|---|---|
| 브랜드 | Altera | Altera |
| 카테고리 | FPGA & CPLD | FPGA & CPLD |
| 수명 주기 상태 | Obsolete | NRND |
| 재고 상태 | In Stock | In Stock |
| 단가 (USD) | $11.50 | $9.95 |
| Series | ACEX-1K | — |
| Number of Logic Elements (LEs) | 1,728 | — |
| Typical Gates | 30,000 | — |
| Number of Logic Array Blocks (LABs) | 216 | — |
| Embedded Memory (EAB) | 24,576 bits (6 EABs) | — |
| Number of User I/O | 102 | — |
| Number of I/O Banks | 4 | — |
| Package Type | 144-LQFP (TQFP) | — |
| 실장 유형 | Surface Mount | Surface Mount (Gull-Wing Leads) |
| Core Voltage | 2.5 V | 2.5 V |
| I/O Voltage | 3.3 V (LVCMOS/LVTTL); 2.5 V tolerant | 2.5 V (5-V tolerant I/O) |
| 동작 온도 | [DATA_NEEDED: operating temperature range] | — |
| Process Technology | 0.18 µm SRAM | CMOS |
| Configuration | SRAM-based, JTAG (IEEE 1149.1) + serial/parallel passive | — |
| PLLs | 6 (per device family) | — |
| RoHS 상태 | [DATA_NEEDED: RoHS compliance status] | — |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| MSL 레벨 | [DATA_NEEDED: MSL moisture sensitivity level] | [DATA_NEEDED: MSL moisture sensitivity level] |
| Family | — | ACEX-1K |
| Logic Elements / Cells | — | 2,880 |
| System Gates | — | 50,000 |
| Embedded Memory (Bits) | — | 40,960 |
| Logic Array Blocks (LABs) | — | 360 |
| User I/O Pins | — | 102 |
| Maximum Internal Frequency | — | 250 MHz |
| Embedded Array Blocks (EABs) | — | Dual-port, configurable as RAM/ROM |
| 패키지 | — | 144-pin LQFP (TQFP) |
| Operating Temperature Grade | — | Commercial |
| Programming Interface | — | JTAG (IEEE 1149.1) + serial configuration |
| Development Tools | — | MAX+PLUS II, Quartus |
| Lead-Free / RoHS | — | [DATA_NEEDED: Lead-free / RoHS status] |