EP1S10B672C7N vs EP1S20B672C7N 비교
다음의 상세 나란히 비교: EP1S10B672C7N 제조: Intel 및 EP1S20B672C7N 제조: Intel. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.
사양 비교
| 파라미터 | EP1S10B672C7N | EP1S20B672C7N |
|---|---|---|
| 브랜드 | Intel | Intel |
| 카테고리 | FPGA & CPLD | FPGA & CPLD |
| 수명 주기 상태 | NRND | Obsolete |
| 재고 상태 | In Stock | In Stock |
| 단가 (USD) | $67.90 | $320.00 |
| Manufacturer | Intel / Altera | — |
| Product Family | Stratix | — |
| Logic Family | CMOS | CMOS |
| Logic Elements/Cells | 10570 cells | — |
| Maximum Internal Clock | 420.17 MHz | — |
| Core Supply Voltage | 1.5 V | — |
| Technology Node | 130 nm | — |
| Package Code | BGA | — |
| Number of Terminals | 672 | — |
| Package Body Size | 35 x 35 mm | — |
| Ball Pitch | 1.27 mm | — |
| Package Shape | Square | — |
| Temperature Grade | Commercial extended, 0 to 85 C | — |
| Terminal Form | Ball | — |
| Configuration/JTAG | JTAG boundary-scan per Stratix family data sheet | — |
| Number of User I/O in 672-BGA | [DATA_NEEDED: user I/O count] | — |
| Total RAM Bits | [DATA_NEEDED: total RAM bits] | — |
| Embedded PLLs | [DATA_NEEDED: PLL count] | — |
| Config Device Compatibility | [DATA_NEEDED: supported configuration devices] | — |
| RoHS | unknown - N suffix may indicate Pb-free, not verified in fetched data | — |
| Series | — | Stratix |
| Family | — | Stratix (original) |
| Process Technology | — | 0.13 µm CMOS |
| Logic Elements (LEs) | — | 18,460 |
| LABs / CLBs | — | 1,846 |
| Embedded Memory Bits | — | 1,669,248 bits |
| Maximum User I/O | — | 426 |
| Number of Pins / Balls | — | 672 |
| Package Type | — | 672-BBGA (Fine-pitch BGA, 35 × 35 mm, 1.27 mm pitch) |
| Supply Voltage (Core, VCCINT) | — | 1.5 V |
| 동작 온도 | — | 0 °C to 85 °C (Commercial Extended) |
| Speed Grade | — | -7 |
| 실장 유형 | — | Surface Mount (BGA) |
| MSL 레벨 | — | 3 (per JEDEC J-STD-020) |
| RoHS 상태 | — | [DATA_NEEDED: RoHS compliance] |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |