EP1SGX25FF1020I7 vs EP1SGX25FF1020I5N 비교
다음의 상세 나란히 비교: EP1SGX25FF1020I7 제조: Altera 및 EP1SGX25FF1020I5N 제조: Altera. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.
Altera
EP1SGX25FF1020I7 - Stratix GX FPGA 25,660 Cells, 1.5V, FC-FBGA-1020 | Altera / Intel
EP1SGX25FF1020I7 ObsoleteAltera
EP1SGX25FF1020I5N - Stratix GX FPGA, 25,660 LEs, FBGA-1020 | Altera
EP1SGX25FF1020I5N ⚠ 최종 구매사양 비교
| 파라미터 | EP1SGX25FF1020I7 | EP1SGX25FF1020I5N |
|---|---|---|
| 브랜드 | Altera | Altera |
| 카테고리 | FPGA & CPLD | FPGA & CPLD |
| 수명 주기 상태 | Obsolete | 최종 구매 |
| 재고 상태 | In Stock | In Stock |
| 단가 (USD) | $210.00 | $2,050.00 |
| Family | Stratix GX | Stratix GX |
| Series | EP1SGX25 | EP1SGX25 |
| Logic Cells | 25,660 | — |
| Configurable Logic Blocks (CLBs) | 2,566 | 2,566 |
| Process Technology | 130 nm CMOS | 130 nm CMOS |
| Core Supply Voltage | 1.5 V | 1.5 V |
| 패키지 | FC-FBGA-1020 (Flip-Chip Fine-pitch BGA) | FBGA-1020 (33 x 33 mm, 1.00 mm pitch) |
| Number of Terminals / Balls | 1020 | — |
| Terminal Form | Ball | — |
| Temperature Grade (suffix 'I') | Industrial | — |
| Speed Grade | 7 (highest production grade) | 5 |
| Terminal Pitch | [DATA_NEEDED: terminal pitch] | 1.00 mm |
| Combinatorial Delay per CLB | 9.48 ns (per Microchip USA listing) | — |
| Combinatorial Delay Variant | [DATA_NEEDED: tPD per CLB variant speed grade] | — |
| Maximum Internal Clock Frequency | [DATA_NEEDED: max Fmax in MHz per speed grade] | — |
| Embedded Transceivers | Yes (Stratix GX feature) | — |
| Configuration Method | SRAM-based (volatile, requires configuration at power-up) | — |
| 실장 유형 | Surface Mount (FC-FBGA) | Surface Mount (BGA) |
| MSL 레벨 | [DATA_NEEDED: MSL level] | — |
| RoHS 상태 | [DATA_NEEDED: RoHS compliance] | Compliant (per digchip) |
| Logic Elements (LEs) | — | 25,660 |
| Maximum Operating Frequency | — | [DATA_NEEDED: datasheet fmax value] |
| Operating Temperature Grade | — | Industrial (I) |
| 동작 온도 범위 | — | 0 C to 85 C (per digchip listing) |
| Ball Count | — | 1020 |
| Lead-Free Finish | — | Yes (lead-free, per digchip) |
| Logic Family | — | CMOS |