EP20K100CQ240C8 vs EP20K100CQ240C8ES 비교
다음의 상세 나란히 비교: EP20K100CQ240C8 제조: Intel 및 EP20K100CQ240C8ES 제조: Intel. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.
사양 비교
| 파라미터 | EP20K100CQ240C8 | EP20K100CQ240C8ES |
|---|---|---|
| 브랜드 | Intel | Intel |
| 카테고리 | FPGA & CPLD | FPGA & CPLD |
| 수명 주기 상태 | Obsolete | Obsolete |
| 재고 상태 | In Stock | In Stock |
| 단가 (USD) | $26.80 | $39.60 |
| Family | APEX 20K | — |
| Series | EP20K100 | — |
| Typical Gates | 100,000 | — |
| Maximum System Gates | 263,000 | — |
| Logic Elements | 4,160 | — |
| Embedded Memory (ESB) | 53,248 bits | — |
| User I/O Pins | 189 | — |
| 패키지 | 240-pin PQFP (QFP) | — |
| Speed Grade | C8 (commercial, -8) | — |
| 동작 온도 | 0C to +85C (commercial) | — |
| Core Voltage | 2.5 V | — |
| I/O Standards | LVTTL, LVCMOS, PCI | — |
| Configuration Interface | JTAG (IEEE 1149.1), serial/parallel | — |
| RoHS 상태 | [DATA_NEEDED: RoHS status] | Unknown - not confirmed in scraped listing |
| Programming Method | SRAM-based, in-system programmable | — |
| Device Type | — | FPGA (Field Programmable Gate Array) |
| Product Family | — | Intel/Altera EP20K series FPGA family |
| Number of Logic Elements / Cells | — | 4,160 |
| Total RAM Bits | — | 53,248 bits |
| Number of User I/O | — | 189 |
| 패키지 / 케이스 | — | 240-BFQFP / QFP-240 |
| Package Type | — | Quad Flat Package |
| Packaging | — | Tray |
| 실장 유형 | — | Surface Mount |
| Ordering/ Speed Grade Suffix | — | C8ES |
| Stock Quantity | — | 4,816 pieces per Heisener listing |
| Lead Time | — | To Be Confirmed |
| Unit Price | — | Request a Quote |
| Minimum Operating Temperature | — | [DATA_NEEDED: minimum operating temperature] |
| Maximum Operating Temperature | — | [DATA_NEEDED: maximum operating temperature] |
| Core / I/O Supply Voltage | — | [DATA_NEEDED: VCCINT and VCCIO voltage] |
| Supported I/O Standards | — | [DATA_NEEDED: supported I/O standards] |
| Differential I/O Pairs | — | [DATA_NEEDED: number of differential I/O pairs] |
| Configuration Schemes | — | [DATA_NEEDED: supported configuration schemes] |