EP20K400CF672C8ES vs EP20K400CF672C-8 비교

다음의 상세 나란히 비교: EP20K400CF672C8ES 제조: Altera 및 EP20K400CF672C-8 제조: Altera. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.

사양 비교

파라미터 EP20K400CF672C8ES EP20K400CF672C-8
브랜드 Altera Altera
카테고리 FPGA & CPLD FPGA & CPLD
수명 주기 상태 Obsolete Obsolete
재고 상태 In Stock In Stock
단가 (USD) $158.40 $95.00
Family APEX 20KC APEX 20K
Series EP20K400 —
Logic Cells / Macros 16,640 —
System Gates (typical) 400,000 —
System Gates (maximum) 212,992 [DATA_NEEDED: confirm datasheet interpretation] —
Maximum User I/O 488 (per Globalspec) / 484 (per Microchip USA) [DATA_NEEDED: confirm canonical value] 488
Bidirectional I/O 484 —
Propagation Delay 2.5 ns —
Maximum Internal Frequency 301.21 MHz —
Process Technology 0.15 µm CMOS 0.15 µm all-layer copper CMOS
Nominal Supply Voltage 1.8 V —
Supply Voltage Range 1.71 V to 1.89 V —
동작 온도 0°C to 85°C (Commercial) —
패키지 672-BGA FineLine (FC-FBGA / S-PBGA-B672) —
Logic Family CMOS —
Architecture MultiCore™ (LUT + Embedded System Block) —
Programming Method JTAG / in-system via configuration memory —
RoHS 상태 [DATA_NEEDED: not stated in verified data] [DATA_NEEDED: RoHS compliance]
Logic Elements — 16,640
Typical Gates — 400,000
Macros — 1,664
Number of I/O Banks — [DATA_NEEDED: number of I/O banks]
Package Type — PBGA-672 (FineLine BGA, 27 x 27 mm, 1.0 mm pitch)
Core Voltage (VCCINT) — 1.8 V nominal (1.71 V to 1.89 V)
I/O Voltage (VCCIO) — [DATA_NEEDED: VCCIO options]
Pin-to-Pin Delay (tPD) — 1.78 ns (speed grade -8)
Speed Grade — -8
Temperature Grade (C) — Commercial, 0 °C to 85 °C
Embedded Memory Type — ESB (RAM / ROM / CAM)
Configuration Interface — JTAG (IEEE 1149.1), Passive Serial, Passive Parallel
JTAG Support — Yes (IEEE 1149.1 boundary-scan)
실장 유형 — Surface Mount (BGA)
MSL 레벨 — [DATA_NEEDED: MSL level]

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