EP20K400CF672I8 vs EP20K400CF672C-8 비교
다음의 상세 나란히 비교: EP20K400CF672I8 제조: Intel 및 EP20K400CF672C-8 제조: Altera. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.
사양 비교
| 파라미터 | EP20K400CF672I8 | EP20K400CF672C-8 |
|---|---|---|
| 브랜드 | Intel | Altera |
| 카테고리 | FPGA & CPLD | FPGA & CPLD |
| 수명 주기 상태 | Obsolete | Obsolete |
| 재고 상태 | In Stock | In Stock |
| 단가 (USD) | $0.00 | $95.00 |
| Family | APEX 20KC | APEX 20K |
| Series | EP20K400 | — |
| Manufacturer | Intel (formerly Altera) | — |
| Device Type | FPGA - Field Programmable Gate Array | — |
| Logic Elements / Cells | 16,640 | — |
| System Gates | 400,000 | — |
| Embedded Memory (RAM bits) | 212,992 | — |
| Number of Logic Macros | 1664 | — |
| User I/O Pins | 488 | — |
| Supply Voltage - Core | 1.8 V | — |
| I/O Voltage (MultiVolt) | 1.5 V / 1.8 V / 2.5 V / 3.3 V | — |
| Maximum Internal Frequency | 301.21 MHz | — |
| Process Technology | 0.15 µm CMOS | 0.15 µm all-layer copper CMOS |
| Speed Grade | I8 | -8 |
| Package Type | 672-pin FC-FBGA (FineLine BGA) | PBGA-672 (FineLine BGA, 27 x 27 mm, 1.0 mm pitch) |
| Operating Temperature (Industrial) | -40 °C to +100 °C | — |
| 실장 유형 | Surface Mount (BGA) | Surface Mount (BGA) |
| Configuration Method | Passive Serial / Active Serial / JTAG (IEEE 1149.1) | — |
| PLLs | 4 | — |
| MSL 레벨 | [DATA_NEEDED: MSL moisture sensitivity level] | [DATA_NEEDED: MSL level] |
| RoHS 상태 | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: RoHS compliance] |
| Logic Elements | — | 16,640 |
| Typical Gates | — | 400,000 |
| Macros | — | 1,664 |
| Maximum User I/O | — | 488 |
| Number of I/O Banks | — | [DATA_NEEDED: number of I/O banks] |
| Core Voltage (VCCINT) | — | 1.8 V nominal (1.71 V to 1.89 V) |
| I/O Voltage (VCCIO) | — | [DATA_NEEDED: VCCIO options] |
| Pin-to-Pin Delay (tPD) | — | 1.78 ns (speed grade -8) |
| Temperature Grade (C) | — | Commercial, 0 °C to 85 °C |
| Embedded Memory Type | — | ESB (RAM / ROM / CAM) |
| Configuration Interface | — | JTAG (IEEE 1149.1), Passive Serial, Passive Parallel |
| JTAG Support | — | Yes (IEEE 1149.1 boundary-scan) |