EP20K400GC655-1 vs EP20K400GC655-1X 비교
다음의 상세 나란히 비교: EP20K400GC655-1 제조: Intel 및 EP20K400GC655-1X 제조: Altera. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.
Intel
EP20K400GC655-1 - 400K Gate APEX 20K FPGA, 655-pin CPGA | Intel/Altera
EP20K400GC655-1 Obsolete사양 비교
| 파라미터 | EP20K400GC655-1 | EP20K400GC655-1X |
|---|---|---|
| 브랜드 | Intel | Altera |
| 카테고리 | FPGA & CPLD | FPGA & CPLD |
| 수명 주기 상태 | Obsolete | Obsolete |
| 재고 상태 | In Stock | In Stock |
| 단가 (USD) | $135.00 | $193.04 |
| Family | APEX 20K | — |
| Series | EP20K400 | — |
| Logic Elements | 16,640 | 16640 cells |
| Maximum Gates | 1,052,000 | — |
| Typical Gates | 400,000 | — |
| Embedded System Blocks (ESBs) | 4 | — |
| Total RAM Bits | 212,992 | — |
| Maximum User I/O | 502 | — |
| Dedicated Inputs | 6 | — |
| Process Technology | 0.22 µm CMOS | 0.22 um |
| Core Supply Voltage | 2.5 V | 2.5 V |
| I/O Supply Voltage | 3.3 V | 2.5 V / 3.3 V |
| Maximum Internal Frequency | 250 MHz | — |
| Propagation Delay | 2.5 ns | 2.5 ns |
| 패키지 | 655-pin CPGA (Ceramic Pin Grid Array) | — |
| 핀 수 | 655 | — |
| 실장 유형 | Through-Hole | — |
| 동작 온도 | 0 °C to +85 °C (commercial) | — |
| Configuration Modes | Passive Serial, Passive Parallel Async, Passive Parallel Sync | — |
| Boundary Scan | IEEE 1149.1 (JTAG) | — |
| RoHS 상태 | Non-compliant (contains lead in ceramic package) | unknown |
| Product Family | — | Altera APEX 20K |
| Device Type | — | Field Programmable Gate Array (FPGA) |
| Technology | — | CMOS |
| Gate Count | — | 400K gates |
| Maximum System Frequency | — | 250 MHz |
| Number of User I/O | — | 496 |
| Number of Dedicated Inputs | — | 6 |
| Number of Terminals | — | 655 |
| Package Type | — | CPGA-655 (Ceramic Pin Grid Array) |
| Package Body Material | — | Ceramic |
| 동작 온도 범위 | — | [DATA_NEEDED: operating temperature range] |
| Embedded RAM Bits | — | [DATA_NEEDED: embedded RAM bits] |