EP2SGX90F1508 vs EP2SGX90FF1508I3 비교
다음의 상세 나란히 비교: EP2SGX90F1508 제조: Altera 및 EP2SGX90FF1508I3 제조: Altera. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.
사양 비교
| 파라미터 | EP2SGX90F1508 | EP2SGX90FF1508I3 |
|---|---|---|
| 브랜드 | Altera | Altera |
| 카테고리 | FPGA & CPLD | FPGA & CPLD |
| 수명 주기 상태 | 활성 | 최종 구매 |
| 재고 상태 | In Stock | In Stock |
| 단가 (USD) | $0.00 | $1,195.00 |
| Device Type | Field Programmable Gate Array (FPGA) | — |
| Product Family | Stratix II GX | — |
| Logic Elements | 90960 | — |
| Logic Array Blocks | 4548 | — |
| User I/O | 650 | — |
| Embedded Memory | 4520448 bits | — |
| 패키지 | 1508-BBGA, FCBGA | 1508-ball FineLine BGA (40 mm) |
| 핀 수 | 1508 balls | — |
| 실장 유형 | Surface Mount | Surface Mount (BGA) |
| Configuration | FPGA programmable | — |
| Application Area | Communications and embedded digital processing | — |
| Operating Voltage | [DATA_NEEDED: operating voltage] | — |
| Transceiver Count | [DATA_NEEDED: transceiver count] | — |
| Maximum Transceiver Data Rate | [DATA_NEEDED: maximum transceiver data rate] | 6.375 Gbps |
| 동작 온도 | [DATA_NEEDED: operating temperature range] | — |
| RoHS 상태 | [DATA_NEEDED: RoHS status] | — |
| REACH Status | [DATA_NEEDED: REACH status] | — |
| AEC-Q100 Qualification | [DATA_NEEDED: AEC-Q100 qualification] | — |
| Lead-Free Status | [DATA_NEEDED: lead-free status] | — |
| Family | — | Stratix II GX |
| Logic Elements / Cells | — | 90,960 |
| Configurable Logic Blocks (CLBs) | — | 90,960 |
| Embedded Memory (Total) | — | 4.5 Mbits |
| High-Speed Transceiver Channels | — | 4 to 20 (device-dependent) |
| Maximum User Clock Frequency | — | 622.08 MHz |
| Core Supply Voltage (VCCINT) | — | 1.15 V to 1.25 V |
| Process Technology | — | 90 nm CMOS |
| Operating Temperature Grade | — | Industrial (-40 °C to +100 °C ambient) |
| Lead-Free / RoHS | — | Compliant (Pb-free finish, RoHS per Altera PCN) |
| Configuration Method | — | SRAM, JTAG, Passive Serial, Fast Passive Parallel |
| Hard IP Cores | — | PCI Express Gen1, Serial RapidIO, 10G Ethernet PHY |