EP610DC-25 vs EP610DM-35 비교
다음의 상세 나란히 비교: EP610DC-25 제조: Rochester Electronics 및 EP610DM-35 제조: Altera. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.
Rochester Electronics
EP610DC-25 - 16-Macrocell Classic EPLD, 25ns tPD, CDIP-24 | Rochester
EP610DC-25 ✓ 활성사양 비교
| 파라미터 | EP610DC-25 | EP610DM-35 |
|---|---|---|
| 브랜드 | Rochester Electronics | Altera |
| 카테고리 | FPGA & CPLD | FPGA & CPLD |
| 수명 주기 상태 | 활성 | Obsolete |
| 재고 상태 | In Stock | In Stock |
| 단가 (USD) | $9.95 | $23.40 |
| Family | Altera Classic EPLD | — |
| Product Type | EPLD (Erasable Programmable Logic Device) | — |
| Macrocells | 16 | — |
| Equivalent Gates | 300 | — |
| Maximum Propagation Delay (tPD) | 25 ns | — |
| Pipelined Data Rate | Up to 100 MHz | — |
| Number of I/O Pins | 22 | — |
| Number of Dedicated Inputs | 4 | — |
| Total Pin Count | 24 | — |
| 패키지 | 24-pin CDIP (Ceramic DIP, through-hole) | 24-pin CDIP (CERDIP) with UV window |
| 실장 유형 | Through Hole | — |
| Supply Voltage (VCC) | 4.75 V to 5.25 V (5 V nominal) | 5 V (single supply) |
| 동작 온도 | 0 C to +70 C | — |
| Technology | CMOS EPROM (UV-erasable) | — |
| Programming Method | JEDEC fuse-map / UV-erase | — |
| Speed Grade Suffix | -25 (25 ns tPD) | — |
| Manufacturer | — | Altera (Rochester Electronics authorized stock) |
| Part Family | — | Classic EPLD |
| Logic Family | — | PAL-type EPLD, CMOS, UV-erasable |
| Number of Macrocells | — | 16 |
| Number of Gates | — | 300 |
| Propagation Delay (tPD) | — | 35 ns |
| Pipelined Data Rate (fMAX) | — | 100 MHz |
| Temperature Grade (M) | — | Military -55°C to +125°C |
| I/O Pins | — | 24 dedicated I/O (input + bidirectional) |
| Programmability | — | UV-erasable, reprogrammable |
| 동작 온도 범위 | — | -55°C to +125°C |
| MSL 레벨 | — | [DATA_NEEDED: MSL rating] |
| RoHS 상태 | — | Non-compliant (contains lead, hermetic CERDIP) |