EP910LC44 vs EP910LC44-40 비교
다음의 상세 나란히 비교: EP910LC44 제조: Altera 및 EP910LC44-40 제조: Altera. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.
사양 비교
| 파라미터 | EP910LC44 | EP910LC44-40 |
|---|---|---|
| 브랜드 | Altera | Altera |
| 카테고리 | FPGA & CPLD | FPGA & CPLD |
| 수명 주기 상태 | 최종 구매 | Obsolete |
| 재고 상태 | In Stock | In Stock |
| 단가 (USD) | $8.95 | $9.75 |
| Product Family | Classic EPLD (EP910 Series) | — |
| Manufacturer | Altera Corporation (now Intel PSG) | — |
| Device Type | Erasable Programmable Logic Device (EPLD) | — |
| Macrocells | 24 | 24 |
| Total Product Terms | 240 | — |
| Dedicated Inputs | 12 | 12 |
| I/O Pins | 24 | 24 (bidirectional) |
| Total Input Pins | 36 (12 dedicated + 24 I/O as inputs) | — |
| Global Clock Inputs | 2 | 2 |
| Supply Voltage (VCC) | 4.75 V to 5.25 V (5 V nominal) | 5 V (nominal) |
| Propagation Delay (LC grade) | [DATA_NEEDED: propagation delay for LC suffix - exact tPD not in verified data] | — |
| Propagation Delay (LC-30 grade) | 33 ns (per EP910LC44-30 verified data) | — |
| Process Technology | CMOS | — |
| 패키지 | 44-pin PLCC (J-leaded) | 44-pin PLCC (Plastic Leaded Chip Carrier) |
| 동작 온도 | [DATA_NEEDED: commercial 0C-70C or industrial -40C-85C - not in verified data] | 0C to +70C (commercial) |
| Programming Method | EPROM (erasable UV for ceramic; OTP for plastic PLCC) | JEDEC file via LP6/MP9 or compatible programmer |
| Architecture | AND-OR sum-of-products with programmable macrocell feedback | — |
| Logic Compatibility | TTL-compatible CMOS I/O | TTL-compatible I/O |
| RoHS 상태 | [DATA_NEEDED: not stated in verified data] | [DATA_NEEDED: RoHS compliance] |
| Family | — | Altera Classic EPLD |
| Product Terms (Total) | — | 240 |
| Total Inputs | — | 36 |
| Propagation Delay (tPD) | — | 40 ns |
| Technology | — | CMOS, UV-erasable EPROM |
| 실장 유형 | — | Surface Mount |