EPC2T132U vs EPC2T32U-CAF48 비교
다음의 상세 나란히 비교: EPC2T132U 제조: Intel 및 EPC2T32U-CAF48 제조: Altera. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.
Altera
EPC2T32U-CAF48 - Altera/Intel 2Mb Config Device, 8MHz, 48-QFN | XAIPART
EPC2T32U-CAF48 ⚠ 최종 구매사양 비교
| 파라미터 | EPC2T132U | EPC2T32U-CAF48 |
|---|---|---|
| 브랜드 | Intel | Altera |
| 카테고리 | Memory ICs | Memory ICs |
| 수명 주기 상태 | Obsolete | 최종 구매 |
| 재고 상태 | In Stock | In Stock |
| 단가 (USD) | $0.00 | $17.60 |
| Manufacturer | Intel (formerly Altera) | — |
| Product Type | FPGA Configuration Device (Boot PROM) | — |
| Target FPGAs | Altera APEX II, Cyclone, Stratix, and other SRAM-based LUT FPGAs | — |
| Configuration Memory Size | [DATA_NEEDED: configuration memory size in bits] | — |
| 공급 전압 | 3.3 V | — |
| 인터페이스 | Serial (Passive Serial), JTAG (IEEE 1149.1), Passive Parallel | — |
| In-System Programmability | Yes (via JTAG) | — |
| JTAG Support | Yes (IEEE 1149.1 compliant TAP) | — |
| Configuration Clock | Internal oscillator (no external crystal required) | — |
| Data Compression | Yes (up to 2x compression vs competing PROMs) | — |
| 동작 온도 | [DATA_NEEDED: operating temperature range] | -40 C to +85 C (industrial grade, "U") |
| 패키지 | 132-pin UQFP (Ultra-thin Quad Flat Pack) | 48-pin QFN (CAF suffix) |
| 실장 유형 | Surface Mount | Surface Mount |
| MSL 레벨 | [DATA_NEEDED: MSL level] | [DATA_NEEDED: MSL level] |
| RoHS 상태 | [DATA_NEEDED: RoHS status] | Compliant |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| 수명 주기 상태 | Obsolete (per Altera/Intel product discontinuance) | — |
| Compatible Quartus Version | [DATA_NEEDED: Quartus version supporting EPC2] | — |
| 메모리 유형 | — | Non-volatile flash configuration memory |
| Memory Density | — | 2 Mb (2097152 bits) |
| Configuration Interface | — | Altera FPP (8-bit) / PS (4-wire) / AS (serial) |
| Maximum Configuration Clock (DCLK) | — | 8 MHz |
| Supply Voltage (VCC) | — | 3.3 V (typical) |
| I/O Tolerance | — | 5 V tolerant |
| Program/Erase Endurance | — | 10,000 cycles per sector minimum |
| Data Retention | — | 20 years minimum |
| Programming Interface | — | IEEE 1149.1 (JTAG) / IEEE 1532 |
| Lead-Free Finish | — | Yes (CAF suffix indicates lead-free) |
| Supported FPGA Families | — | Cyclone, Cyclone II, Stratix, APEX 20K, ACEX 1K, Mercury, Excalibur |