EPM3032ALC44-10N vs EPM3032ALC44-7 비교
다음의 상세 나란히 비교: EPM3032ALC44-10N 제조: Altera 및 EPM3032ALC44-7 제조: Altera. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.
사양 비교
| 파라미터 | EPM3032ALC44-10N | EPM3032ALC44-7 |
|---|---|---|
| 브랜드 | Altera | Altera |
| 카테고리 | FPGA & CPLD | FPGA & CPLD |
| 수명 주기 상태 | NRND | Obsolete |
| 재고 상태 | In Stock | In Stock |
| 단가 (USD) | $0.94 | $0.95 |
| Family | MAX 3000A | MAX 3000A |
| Product Type | CPLD (Complex Programmable Logic Device) | — |
| Logic Gates | 600 gates | — |
| Macrocells | 32 | — |
| Logic Array Blocks (LABs) | 2 | 2 |
| User I/O Pins | 34 | — |
| Propagation Delay (tPD) | 10 ns | — |
| Internal fMAX | 103.1 MHz | — |
| Supply Voltage (VCCINT) | 3.3 V | — |
| I/O Voltage (VCCIO) | 1.8 V / 2.5 V / 3.3 V / 5.0 V (MultiVolt I/O) | — |
| Technology | CMOS EEPROM-based | — |
| In-System Programmability | Yes, via IEEE 1149.1 JTAG | — |
| ISP Standard Compliance | IEEE Std. 1532 | — |
| Boundary-Scan Test (BST) | Yes, IEEE 1149.1 compliant | — |
| 패키지 | 44-pin PLCC (J-Lead, surface mount) | 44-pin PLCC (J-Lead), 16.59 x 16.59 mm, 3.81 mm height |
| 실장 유형 | Surface Mount | Surface Mount |
| 동작 온도 | [DATA_NEEDED: industrial/commercial range] | 0 °C to +70 °C (Commercial) |
| RoHS 상태 | [DATA_NEEDED: compliant or non-compliant] | Not Compliant (per Arrow listing) |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Logic Elements / Macrocells | — | 32 macrocells |
| System Gates | — | 600 |
| Number of User I/O Pins | — | 34 |
| Global Clocks | — | 2 |
| Propagation Delay (tPD1, max) | — | 7.5 ns |
| Maximum Internal Frequency (fMAX) | — | 138.9 MHz |
| Supply Voltage (VCCINT / VCCIO) | — | 3.3 V |
| I/O Tolerant Voltage | — | 2.5 V / 3.3 V / 5.0 V (MultiVolt) |
| Program Memory Type | — | EEPROM |
| In-System Programming (ISP) | — | Yes - IEEE 1149.1 JTAG |
| Part Status | — | Obsolete |
| ECCN | — | EAR99 |