EPM3064ATI44-7N vs EPM3064ATI44-10N 비교
다음의 상세 나란히 비교: EPM3064ATI44-7N 제조: Altera 및 EPM3064ATI44-10N 제조: Altera. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.
사양 비교
| 파라미터 | EPM3064ATI44-7N | EPM3064ATI44-10N |
|---|---|---|
| 브랜드 | Altera | Altera |
| 카테고리 | FPGA & CPLD | FPGA & CPLD |
| 수명 주기 상태 | NRND | Obsolete |
| 재고 상태 | In Stock | In Stock |
| 단가 (USD) | $5.10 | $3.95 |
| Family | MAX 3000A | MAX 3000A |
| Logic Elements / Macrocells | 64 macrocells | — |
| Usable Gates | 1,250 gates | 1250 |
| Maximum Frequency (fMAX) | 135.1 MHz | 100 MHz |
| Pin-to-Pin Logic Delay | 7 ns (speed grade -7) | — |
| User I/O Count | 34 I/O | — |
| Dedicated Input Pins | 4 | — |
| Supply Voltage (VCCINT) | 3.3 V | — |
| I/O Bank Voltage (VCCIO) | 1.8 V / 2.5 V / 3.3 V / 5 V tolerant (multiVolt) | — |
| Program Memory Type | EEPROM (in-system programmable) | — |
| Programming Interface | IEEE 1149.1 JTAG | — |
| 패키지 | 44-pin TQFP (10x10 mm, 0.8 mm pitch) | 44-pin TQFP |
| Operating Temperature Grade | Industrial (-40C to +85C) | — |
| RoHS 상태 | Compliant (lead-free, 'N' suffix) | Non-Compliant (per digchip datasheet excerpt) |
| Process Technology | 0.30 µm CMOS EEPROM | CMOS EEPROM |
| Product Type | — | CPLD (Complex Programmable Logic Device) |
| Macrocells | — | 64 |
| User I/Os | — | 34 |
| Dedicated Inputs | — | 4 |
| Logic Blocks | — | 4 |
| Pin-to-Pin Delay | — | 10 ns (-10 speed grade) |
| Programmable Type | — | In-System Programmable (EEPROM) |
| ISP Interface | — | IEEE Std. 1149.1 (JTAG) |
| ISP Standard Compliance | — | IEEE Std. 1532 |
| Core Supply Voltage (VCCINT) | — | 3.3 V |
| I/O Supply Voltage (VCCIO) | — | 3.3 V or 2.5 V (MultiVolt) |
| 동작 온도 | — | -40C to +85C (Industrial, "N" suffix) |
| Boundary-Scan Test | — | Built-in (JTAG) |
| 실장 유형 | — | Surface Mount |
| Lead-Free Status | — | Contains Lead (per digchip datasheet excerpt) |